mcxa_pac/flexpwm0/
mctrl2.rs

1#[doc = "Register `MCTRL2` reader"]
2pub type R = crate::R<Mctrl2Spec>;
3#[doc = "Register `MCTRL2` writer"]
4pub type W = crate::W<Mctrl2Spec>;
5#[doc = "Write protect\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Wrprot {
10    #[doc = "0: Write protection off (default)."]
11    Disabled = 0,
12    #[doc = "1: Write protection on."]
13    Enabled = 1,
14    #[doc = "2: Write protection off and locked until chip reset."]
15    DisabledLocked = 2,
16    #[doc = "3: Write protection on and locked until chip reset."]
17    EnabledLocked = 3,
18}
19impl From<Wrprot> for u8 {
20    #[inline(always)]
21    fn from(variant: Wrprot) -> Self {
22        variant as _
23    }
24}
25impl crate::FieldSpec for Wrprot {
26    type Ux = u8;
27}
28impl crate::IsEnum for Wrprot {}
29#[doc = "Field `WRPROT` reader - Write protect"]
30pub type WrprotR = crate::FieldReader<Wrprot>;
31impl WrprotR {
32    #[doc = "Get enumerated values variant"]
33    #[inline(always)]
34    pub const fn variant(&self) -> Wrprot {
35        match self.bits {
36            0 => Wrprot::Disabled,
37            1 => Wrprot::Enabled,
38            2 => Wrprot::DisabledLocked,
39            3 => Wrprot::EnabledLocked,
40            _ => unreachable!(),
41        }
42    }
43    #[doc = "Write protection off (default)."]
44    #[inline(always)]
45    pub fn is_disabled(&self) -> bool {
46        *self == Wrprot::Disabled
47    }
48    #[doc = "Write protection on."]
49    #[inline(always)]
50    pub fn is_enabled(&self) -> bool {
51        *self == Wrprot::Enabled
52    }
53    #[doc = "Write protection off and locked until chip reset."]
54    #[inline(always)]
55    pub fn is_disabled_locked(&self) -> bool {
56        *self == Wrprot::DisabledLocked
57    }
58    #[doc = "Write protection on and locked until chip reset."]
59    #[inline(always)]
60    pub fn is_enabled_locked(&self) -> bool {
61        *self == Wrprot::EnabledLocked
62    }
63}
64#[doc = "Field `WRPROT` writer - Write protect"]
65pub type WrprotW<'a, REG> = crate::FieldWriter<'a, REG, 2, Wrprot, crate::Safe>;
66impl<'a, REG> WrprotW<'a, REG>
67where
68    REG: crate::Writable + crate::RegisterSpec,
69    REG::Ux: From<u8>,
70{
71    #[doc = "Write protection off (default)."]
72    #[inline(always)]
73    pub fn disabled(self) -> &'a mut crate::W<REG> {
74        self.variant(Wrprot::Disabled)
75    }
76    #[doc = "Write protection on."]
77    #[inline(always)]
78    pub fn enabled(self) -> &'a mut crate::W<REG> {
79        self.variant(Wrprot::Enabled)
80    }
81    #[doc = "Write protection off and locked until chip reset."]
82    #[inline(always)]
83    pub fn disabled_locked(self) -> &'a mut crate::W<REG> {
84        self.variant(Wrprot::DisabledLocked)
85    }
86    #[doc = "Write protection on and locked until chip reset."]
87    #[inline(always)]
88    pub fn enabled_locked(self) -> &'a mut crate::W<REG> {
89        self.variant(Wrprot::EnabledLocked)
90    }
91}
92#[doc = "Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig\n\nValue on reset: 0"]
93#[cfg_attr(feature = "defmt", derive(defmt::Format))]
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95#[repr(u8)]
96pub enum StretchCntPrsc {
97    #[doc = "0: Stretch count is zero, no stretch."]
98    Disabled = 0,
99    #[doc = "1: Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 2 IPBus clock period."]
100    Enabled = 1,
101    #[doc = "2: Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 4 IPBus clock period."]
102    DisabledLocked = 2,
103    #[doc = "3: Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 8 IPBus clock period."]
104    EnabledLocked = 3,
105}
106impl From<StretchCntPrsc> for u8 {
107    #[inline(always)]
108    fn from(variant: StretchCntPrsc) -> Self {
109        variant as _
110    }
111}
112impl crate::FieldSpec for StretchCntPrsc {
113    type Ux = u8;
114}
115impl crate::IsEnum for StretchCntPrsc {}
116#[doc = "Field `STRETCH_CNT_PRSC` reader - Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig"]
117pub type StretchCntPrscR = crate::FieldReader<StretchCntPrsc>;
118impl StretchCntPrscR {
119    #[doc = "Get enumerated values variant"]
120    #[inline(always)]
121    pub const fn variant(&self) -> StretchCntPrsc {
122        match self.bits {
123            0 => StretchCntPrsc::Disabled,
124            1 => StretchCntPrsc::Enabled,
125            2 => StretchCntPrsc::DisabledLocked,
126            3 => StretchCntPrsc::EnabledLocked,
127            _ => unreachable!(),
128        }
129    }
130    #[doc = "Stretch count is zero, no stretch."]
131    #[inline(always)]
132    pub fn is_disabled(&self) -> bool {
133        *self == StretchCntPrsc::Disabled
134    }
135    #[doc = "Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 2 IPBus clock period."]
136    #[inline(always)]
137    pub fn is_enabled(&self) -> bool {
138        *self == StretchCntPrsc::Enabled
139    }
140    #[doc = "Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 4 IPBus clock period."]
141    #[inline(always)]
142    pub fn is_disabled_locked(&self) -> bool {
143        *self == StretchCntPrsc::DisabledLocked
144    }
145    #[doc = "Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 8 IPBus clock period."]
146    #[inline(always)]
147    pub fn is_enabled_locked(&self) -> bool {
148        *self == StretchCntPrsc::EnabledLocked
149    }
150}
151#[doc = "Field `STRETCH_CNT_PRSC` writer - Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig"]
152pub type StretchCntPrscW<'a, REG> = crate::FieldWriter<'a, REG, 2, StretchCntPrsc, crate::Safe>;
153impl<'a, REG> StretchCntPrscW<'a, REG>
154where
155    REG: crate::Writable + crate::RegisterSpec,
156    REG::Ux: From<u8>,
157{
158    #[doc = "Stretch count is zero, no stretch."]
159    #[inline(always)]
160    pub fn disabled(self) -> &'a mut crate::W<REG> {
161        self.variant(StretchCntPrsc::Disabled)
162    }
163    #[doc = "Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 2 IPBus clock period."]
164    #[inline(always)]
165    pub fn enabled(self) -> &'a mut crate::W<REG> {
166        self.variant(StretchCntPrsc::Enabled)
167    }
168    #[doc = "Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 4 IPBus clock period."]
169    #[inline(always)]
170    pub fn disabled_locked(self) -> &'a mut crate::W<REG> {
171        self.variant(StretchCntPrsc::DisabledLocked)
172    }
173    #[doc = "Stretch mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig for 8 IPBus clock period."]
174    #[inline(always)]
175    pub fn enabled_locked(self) -> &'a mut crate::W<REG> {
176        self.variant(StretchCntPrsc::EnabledLocked)
177    }
178}
179impl R {
180    #[doc = "Bits 2:3 - Write protect"]
181    #[inline(always)]
182    pub fn wrprot(&self) -> WrprotR {
183        WrprotR::new(((self.bits >> 2) & 3) as u8)
184    }
185    #[doc = "Bits 6:7 - Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig"]
186    #[inline(always)]
187    pub fn stretch_cnt_prsc(&self) -> StretchCntPrscR {
188        StretchCntPrscR::new(((self.bits >> 6) & 3) as u8)
189    }
190}
191#[cfg(feature = "debug")]
192impl core::fmt::Debug for R {
193    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
194        f.debug_struct("MCTRL2")
195            .field("wrprot", &self.wrprot())
196            .field("stretch_cnt_prsc", &self.stretch_cnt_prsc())
197            .finish()
198    }
199}
200impl W {
201    #[doc = "Bits 2:3 - Write protect"]
202    #[inline(always)]
203    pub fn wrprot(&mut self) -> WrprotW<'_, Mctrl2Spec> {
204        WrprotW::new(self, 2)
205    }
206    #[doc = "Bits 6:7 - Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig"]
207    #[inline(always)]
208    pub fn stretch_cnt_prsc(&mut self) -> StretchCntPrscW<'_, Mctrl2Spec> {
209        StretchCntPrscW::new(self, 6)
210    }
211}
212#[doc = "Master Control 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mctrl2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mctrl2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
213pub struct Mctrl2Spec;
214impl crate::RegisterSpec for Mctrl2Spec {
215    type Ux = u16;
216}
217#[doc = "`read()` method returns [`mctrl2::R`](R) reader structure"]
218impl crate::Readable for Mctrl2Spec {}
219#[doc = "`write(|w| ..)` method takes [`mctrl2::W`](W) writer structure"]
220impl crate::Writable for Mctrl2Spec {
221    type Safety = crate::Unsafe;
222}
223#[doc = "`reset()` method sets MCTRL2 to value 0"]
224impl crate::Resettable for Mctrl2Spec {}
mcxa_pac/flexpwm0/mctrl2.rs

mcxa_pac/flexpwm0/
mctrl2.rs
