mcxa_pac/flexio0/
timersden.rs

1#[doc = "Register `TIMERSDEN` reader"]
2pub type R = crate::R<TimersdenSpec>;
3#[doc = "Register `TIMERSDEN` writer"]
4pub type W = crate::W<TimersdenSpec>;
5#[doc = "Field `TSDE` reader - Timer Status DMA Enable"]
6pub type TsdeR = crate::FieldReader;
7#[doc = "Field `TSDE` writer - Timer Status DMA Enable"]
8pub type TsdeW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
9impl R {
10    #[doc = "Bits 0:3 - Timer Status DMA Enable"]
11    #[inline(always)]
12    pub fn tsde(&self) -> TsdeR {
13        TsdeR::new((self.bits & 0x0f) as u8)
14    }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("TIMERSDEN").field("tsde", &self.tsde()).finish()
20    }
21}
22impl W {
23    #[doc = "Bits 0:3 - Timer Status DMA Enable"]
24    #[inline(always)]
25    pub fn tsde(&mut self) -> TsdeW<'_, TimersdenSpec> {
26        TsdeW::new(self, 0)
27    }
28}
29#[doc = "Timer Status DMA Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timersden::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timersden::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct TimersdenSpec;
31impl crate::RegisterSpec for TimersdenSpec {
32    type Ux = u32;
33}
34#[doc = "`read()` method returns [`timersden::R`](R) reader structure"]
35impl crate::Readable for TimersdenSpec {}
36#[doc = "`write(|w| ..)` method takes [`timersden::W`](W) writer structure"]
37impl crate::Writable for TimersdenSpec {
38    type Safety = crate::Unsafe;
39}
40#[doc = "`reset()` method sets TIMERSDEN to value 0"]
41impl crate::Resettable for TimersdenSpec {}
mcxa_pac/flexio0/timersden.rs

mcxa_pac/flexio0/
timersden.rs
