mcxa_pac/flexio0/
timcmp.rs

1#[doc = "Register `TIMCMP[%s]` reader"]
2pub type R = crate::R<TimcmpSpec>;
3#[doc = "Register `TIMCMP[%s]` writer"]
4pub type W = crate::W<TimcmpSpec>;
5#[doc = "Field `CMP` reader - Timer Compare Value"]
6pub type CmpR = crate::FieldReader<u16>;
7#[doc = "Field `CMP` writer - Timer Compare Value"]
8pub type CmpW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9impl R {
10    #[doc = "Bits 0:15 - Timer Compare Value"]
11    #[inline(always)]
12    pub fn cmp(&self) -> CmpR {
13        CmpR::new((self.bits & 0xffff) as u16)
14    }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("TIMCMP").field("cmp", &self.cmp()).finish()
20    }
21}
22impl W {
23    #[doc = "Bits 0:15 - Timer Compare Value"]
24    #[inline(always)]
25    pub fn cmp(&mut self) -> CmpW<'_, TimcmpSpec> {
26        CmpW::new(self, 0)
27    }
28}
29#[doc = "Timer Compare\n\nYou can [`read`](crate::Reg::read) this register and get [`timcmp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timcmp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct TimcmpSpec;
31impl crate::RegisterSpec for TimcmpSpec {
32    type Ux = u32;
33}
34#[doc = "`read()` method returns [`timcmp::R`](R) reader structure"]
35impl crate::Readable for TimcmpSpec {}
36#[doc = "`write(|w| ..)` method takes [`timcmp::W`](W) writer structure"]
37impl crate::Writable for TimcmpSpec {
38    type Safety = crate::Unsafe;
39}
40#[doc = "`reset()` method sets TIMCMP[%s] to value 0"]
41impl crate::Resettable for TimcmpSpec {}
mcxa_pac/flexio0/timcmp.rs

mcxa_pac/flexio0/
timcmp.rs
