mcxa_pac/eim0/
eichen.rs

1#[doc = "Register `EICHEN` reader"]
2pub type R = crate::R<EichenSpec>;
3#[doc = "Register `EICHEN` writer"]
4pub type W = crate::W<EichenSpec>;
5#[doc = "Error Injection Channel 0 Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Eich0en {
9    #[doc = "0: Error injection is disabled on Error Injection Channel 0"]
10    Disable = 0,
11    #[doc = "1: Error injection is enabled on Error Injection Channel 0"]
12    Enable = 1,
13}
14impl From<Eich0en> for bool {
15    #[inline(always)]
16    fn from(variant: Eich0en) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `EICH0EN` reader - Error Injection Channel 0 Enable"]
21pub type Eich0enR = crate::BitReader<Eich0en>;
22impl Eich0enR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Eich0en {
26        match self.bits {
27            false => Eich0en::Disable,
28            true => Eich0en::Enable,
29        }
30    }
31    #[doc = "Error injection is disabled on Error Injection Channel 0"]
32    #[inline(always)]
33    pub fn is_disable(&self) -> bool {
34        *self == Eich0en::Disable
35    }
36    #[doc = "Error injection is enabled on Error Injection Channel 0"]
37    #[inline(always)]
38    pub fn is_enable(&self) -> bool {
39        *self == Eich0en::Enable
40    }
41}
42#[doc = "Field `EICH0EN` writer - Error Injection Channel 0 Enable"]
43pub type Eich0enW<'a, REG> = crate::BitWriter<'a, REG, Eich0en>;
44impl<'a, REG> Eich0enW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Error injection is disabled on Error Injection Channel 0"]
49    #[inline(always)]
50    pub fn disable(self) -> &'a mut crate::W<REG> {
51        self.variant(Eich0en::Disable)
52    }
53    #[doc = "Error injection is enabled on Error Injection Channel 0"]
54    #[inline(always)]
55    pub fn enable(self) -> &'a mut crate::W<REG> {
56        self.variant(Eich0en::Enable)
57    }
58}
59impl R {
60    #[doc = "Bit 31 - Error Injection Channel 0 Enable"]
61    #[inline(always)]
62    pub fn eich0en(&self) -> Eich0enR {
63        Eich0enR::new(((self.bits >> 31) & 1) != 0)
64    }
65}
66#[cfg(feature = "debug")]
67impl core::fmt::Debug for R {
68    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
69        f.debug_struct("EICHEN").field("eich0en", &self.eich0en()).finish()
70    }
71}
72impl W {
73    #[doc = "Bit 31 - Error Injection Channel 0 Enable"]
74    #[inline(always)]
75    pub fn eich0en(&mut self) -> Eich0enW<'_, EichenSpec> {
76        Eich0enW::new(self, 31)
77    }
78}
79#[doc = "Error Injection Channel Enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`eichen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eichen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct EichenSpec;
81impl crate::RegisterSpec for EichenSpec {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`eichen::R`](R) reader structure"]
85impl crate::Readable for EichenSpec {}
86#[doc = "`write(|w| ..)` method takes [`eichen::W`](W) writer structure"]
87impl crate::Writable for EichenSpec {
88    type Safety = crate::Unsafe;
89}
90#[doc = "`reset()` method sets EICHEN to value 0"]
91impl crate::Resettable for EichenSpec {}
mcxa_pac/eim0/eichen.rs

mcxa_pac/eim0/
eichen.rs
