mcxa_pac/dac0/
der.rs

1#[doc = "Register `DER` reader"]
2pub type R = crate::R<DerSpec>;
3#[doc = "Register `DER` writer"]
4pub type W = crate::W<DerSpec>;
5#[doc = "FIFO Empty DMA Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum EmptyDmaen {
9    #[doc = "0: Disables"]
10    Disabled = 0,
11    #[doc = "1: Enables"]
12    Enabled = 1,
13}
14impl From<EmptyDmaen> for bool {
15    #[inline(always)]
16    fn from(variant: EmptyDmaen) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `EMPTY_DMAEN` reader - FIFO Empty DMA Enable"]
21pub type EmptyDmaenR = crate::BitReader<EmptyDmaen>;
22impl EmptyDmaenR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> EmptyDmaen {
26        match self.bits {
27            false => EmptyDmaen::Disabled,
28            true => EmptyDmaen::Enabled,
29        }
30    }
31    #[doc = "Disables"]
32    #[inline(always)]
33    pub fn is_disabled(&self) -> bool {
34        *self == EmptyDmaen::Disabled
35    }
36    #[doc = "Enables"]
37    #[inline(always)]
38    pub fn is_enabled(&self) -> bool {
39        *self == EmptyDmaen::Enabled
40    }
41}
42#[doc = "Field `EMPTY_DMAEN` writer - FIFO Empty DMA Enable"]
43pub type EmptyDmaenW<'a, REG> = crate::BitWriter<'a, REG, EmptyDmaen>;
44impl<'a, REG> EmptyDmaenW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disables"]
49    #[inline(always)]
50    pub fn disabled(self) -> &'a mut crate::W<REG> {
51        self.variant(EmptyDmaen::Disabled)
52    }
53    #[doc = "Enables"]
54    #[inline(always)]
55    pub fn enabled(self) -> &'a mut crate::W<REG> {
56        self.variant(EmptyDmaen::Enabled)
57    }
58}
59#[doc = "FIFO Watermark DMA Enable\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum WmDmaen {
63    #[doc = "0: Disables"]
64    Disabled = 0,
65    #[doc = "1: Enables"]
66    Enabled = 1,
67}
68impl From<WmDmaen> for bool {
69    #[inline(always)]
70    fn from(variant: WmDmaen) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `WM_DMAEN` reader - FIFO Watermark DMA Enable"]
75pub type WmDmaenR = crate::BitReader<WmDmaen>;
76impl WmDmaenR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> WmDmaen {
80        match self.bits {
81            false => WmDmaen::Disabled,
82            true => WmDmaen::Enabled,
83        }
84    }
85    #[doc = "Disables"]
86    #[inline(always)]
87    pub fn is_disabled(&self) -> bool {
88        *self == WmDmaen::Disabled
89    }
90    #[doc = "Enables"]
91    #[inline(always)]
92    pub fn is_enabled(&self) -> bool {
93        *self == WmDmaen::Enabled
94    }
95}
96#[doc = "Field `WM_DMAEN` writer - FIFO Watermark DMA Enable"]
97pub type WmDmaenW<'a, REG> = crate::BitWriter<'a, REG, WmDmaen>;
98impl<'a, REG> WmDmaenW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Disables"]
103    #[inline(always)]
104    pub fn disabled(self) -> &'a mut crate::W<REG> {
105        self.variant(WmDmaen::Disabled)
106    }
107    #[doc = "Enables"]
108    #[inline(always)]
109    pub fn enabled(self) -> &'a mut crate::W<REG> {
110        self.variant(WmDmaen::Enabled)
111    }
112}
113impl R {
114    #[doc = "Bit 1 - FIFO Empty DMA Enable"]
115    #[inline(always)]
116    pub fn empty_dmaen(&self) -> EmptyDmaenR {
117        EmptyDmaenR::new(((self.bits >> 1) & 1) != 0)
118    }
119    #[doc = "Bit 2 - FIFO Watermark DMA Enable"]
120    #[inline(always)]
121    pub fn wm_dmaen(&self) -> WmDmaenR {
122        WmDmaenR::new(((self.bits >> 2) & 1) != 0)
123    }
124}
125#[cfg(feature = "debug")]
126impl core::fmt::Debug for R {
127    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
128        f.debug_struct("DER")
129            .field("empty_dmaen", &self.empty_dmaen())
130            .field("wm_dmaen", &self.wm_dmaen())
131            .finish()
132    }
133}
134impl W {
135    #[doc = "Bit 1 - FIFO Empty DMA Enable"]
136    #[inline(always)]
137    pub fn empty_dmaen(&mut self) -> EmptyDmaenW<'_, DerSpec> {
138        EmptyDmaenW::new(self, 1)
139    }
140    #[doc = "Bit 2 - FIFO Watermark DMA Enable"]
141    #[inline(always)]
142    pub fn wm_dmaen(&mut self) -> WmDmaenW<'_, DerSpec> {
143        WmDmaenW::new(self, 2)
144    }
145}
146#[doc = "DMA Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`der::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`der::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
147pub struct DerSpec;
148impl crate::RegisterSpec for DerSpec {
149    type Ux = u32;
150}
151#[doc = "`read()` method returns [`der::R`](R) reader structure"]
152impl crate::Readable for DerSpec {}
153#[doc = "`write(|w| ..)` method takes [`der::W`](W) writer structure"]
154impl crate::Writable for DerSpec {
155    type Safety = crate::Unsafe;
156}
157#[doc = "`reset()` method sets DER to value 0"]
158impl crate::Resettable for DerSpec {}
mcxa_pac/dac0/der.rs

mcxa_pac/dac0/
der.rs
