mcxa_pac/cmp0/
rrcr1.rs

1#[doc = "Register `RRCR1` reader"]
2pub type R = crate::R<Rrcr1Spec>;
3#[doc = "Register `RRCR1` writer"]
4pub type W = crate::W<Rrcr1Spec>;
5#[doc = "Channel 0 Input Enable in Trigger Mode\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum RrCh0en {
9    #[doc = "0: Disable"]
10    Disable = 0,
11    #[doc = "1: Enable"]
12    Enable = 1,
13}
14impl From<RrCh0en> for bool {
15    #[inline(always)]
16    fn from(variant: RrCh0en) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `RR_CH0EN` reader - Channel 0 Input Enable in Trigger Mode"]
21pub type RrCh0enR = crate::BitReader<RrCh0en>;
22impl RrCh0enR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> RrCh0en {
26        match self.bits {
27            false => RrCh0en::Disable,
28            true => RrCh0en::Enable,
29        }
30    }
31    #[doc = "Disable"]
32    #[inline(always)]
33    pub fn is_disable(&self) -> bool {
34        *self == RrCh0en::Disable
35    }
36    #[doc = "Enable"]
37    #[inline(always)]
38    pub fn is_enable(&self) -> bool {
39        *self == RrCh0en::Enable
40    }
41}
42#[doc = "Field `RR_CH0EN` writer - Channel 0 Input Enable in Trigger Mode"]
43pub type RrCh0enW<'a, REG> = crate::BitWriter<'a, REG, RrCh0en>;
44impl<'a, REG> RrCh0enW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disable"]
49    #[inline(always)]
50    pub fn disable(self) -> &'a mut crate::W<REG> {
51        self.variant(RrCh0en::Disable)
52    }
53    #[doc = "Enable"]
54    #[inline(always)]
55    pub fn enable(self) -> &'a mut crate::W<REG> {
56        self.variant(RrCh0en::Enable)
57    }
58}
59#[doc = "Channel 1 Input Enable in Trigger Mode\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RrCh1en {
63    #[doc = "0: Disable"]
64    Disable = 0,
65    #[doc = "1: Enable"]
66    Enable = 1,
67}
68impl From<RrCh1en> for bool {
69    #[inline(always)]
70    fn from(variant: RrCh1en) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `RR_CH1EN` reader - Channel 1 Input Enable in Trigger Mode"]
75pub type RrCh1enR = crate::BitReader<RrCh1en>;
76impl RrCh1enR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> RrCh1en {
80        match self.bits {
81            false => RrCh1en::Disable,
82            true => RrCh1en::Enable,
83        }
84    }
85    #[doc = "Disable"]
86    #[inline(always)]
87    pub fn is_disable(&self) -> bool {
88        *self == RrCh1en::Disable
89    }
90    #[doc = "Enable"]
91    #[inline(always)]
92    pub fn is_enable(&self) -> bool {
93        *self == RrCh1en::Enable
94    }
95}
96#[doc = "Field `RR_CH1EN` writer - Channel 1 Input Enable in Trigger Mode"]
97pub type RrCh1enW<'a, REG> = crate::BitWriter<'a, REG, RrCh1en>;
98impl<'a, REG> RrCh1enW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Disable"]
103    #[inline(always)]
104    pub fn disable(self) -> &'a mut crate::W<REG> {
105        self.variant(RrCh1en::Disable)
106    }
107    #[doc = "Enable"]
108    #[inline(always)]
109    pub fn enable(self) -> &'a mut crate::W<REG> {
110        self.variant(RrCh1en::Enable)
111    }
112}
113#[doc = "Channel 2 Input Enable in Trigger Mode\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum RrCh2en {
117    #[doc = "0: Disable"]
118    Disable = 0,
119    #[doc = "1: Enable"]
120    Enable = 1,
121}
122impl From<RrCh2en> for bool {
123    #[inline(always)]
124    fn from(variant: RrCh2en) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `RR_CH2EN` reader - Channel 2 Input Enable in Trigger Mode"]
129pub type RrCh2enR = crate::BitReader<RrCh2en>;
130impl RrCh2enR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> RrCh2en {
134        match self.bits {
135            false => RrCh2en::Disable,
136            true => RrCh2en::Enable,
137        }
138    }
139    #[doc = "Disable"]
140    #[inline(always)]
141    pub fn is_disable(&self) -> bool {
142        *self == RrCh2en::Disable
143    }
144    #[doc = "Enable"]
145    #[inline(always)]
146    pub fn is_enable(&self) -> bool {
147        *self == RrCh2en::Enable
148    }
149}
150#[doc = "Field `RR_CH2EN` writer - Channel 2 Input Enable in Trigger Mode"]
151pub type RrCh2enW<'a, REG> = crate::BitWriter<'a, REG, RrCh2en>;
152impl<'a, REG> RrCh2enW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Disable"]
157    #[inline(always)]
158    pub fn disable(self) -> &'a mut crate::W<REG> {
159        self.variant(RrCh2en::Disable)
160    }
161    #[doc = "Enable"]
162    #[inline(always)]
163    pub fn enable(self) -> &'a mut crate::W<REG> {
164        self.variant(RrCh2en::Enable)
165    }
166}
167#[doc = "Channel 3 Input Enable in Trigger Mode\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum RrCh3en {
171    #[doc = "0: Disable"]
172    Disable = 0,
173    #[doc = "1: Enable"]
174    Enable = 1,
175}
176impl From<RrCh3en> for bool {
177    #[inline(always)]
178    fn from(variant: RrCh3en) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `RR_CH3EN` reader - Channel 3 Input Enable in Trigger Mode"]
183pub type RrCh3enR = crate::BitReader<RrCh3en>;
184impl RrCh3enR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> RrCh3en {
188        match self.bits {
189            false => RrCh3en::Disable,
190            true => RrCh3en::Enable,
191        }
192    }
193    #[doc = "Disable"]
194    #[inline(always)]
195    pub fn is_disable(&self) -> bool {
196        *self == RrCh3en::Disable
197    }
198    #[doc = "Enable"]
199    #[inline(always)]
200    pub fn is_enable(&self) -> bool {
201        *self == RrCh3en::Enable
202    }
203}
204#[doc = "Field `RR_CH3EN` writer - Channel 3 Input Enable in Trigger Mode"]
205pub type RrCh3enW<'a, REG> = crate::BitWriter<'a, REG, RrCh3en>;
206impl<'a, REG> RrCh3enW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disable"]
211    #[inline(always)]
212    pub fn disable(self) -> &'a mut crate::W<REG> {
213        self.variant(RrCh3en::Disable)
214    }
215    #[doc = "Enable"]
216    #[inline(always)]
217    pub fn enable(self) -> &'a mut crate::W<REG> {
218        self.variant(RrCh3en::Enable)
219    }
220}
221#[doc = "Channel 4 Input Enable in Trigger Mode\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum RrCh4en {
225    #[doc = "0: Disable"]
226    Disable = 0,
227    #[doc = "1: Enable"]
228    Enable = 1,
229}
230impl From<RrCh4en> for bool {
231    #[inline(always)]
232    fn from(variant: RrCh4en) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `RR_CH4EN` reader - Channel 4 Input Enable in Trigger Mode"]
237pub type RrCh4enR = crate::BitReader<RrCh4en>;
238impl RrCh4enR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> RrCh4en {
242        match self.bits {
243            false => RrCh4en::Disable,
244            true => RrCh4en::Enable,
245        }
246    }
247    #[doc = "Disable"]
248    #[inline(always)]
249    pub fn is_disable(&self) -> bool {
250        *self == RrCh4en::Disable
251    }
252    #[doc = "Enable"]
253    #[inline(always)]
254    pub fn is_enable(&self) -> bool {
255        *self == RrCh4en::Enable
256    }
257}
258#[doc = "Field `RR_CH4EN` writer - Channel 4 Input Enable in Trigger Mode"]
259pub type RrCh4enW<'a, REG> = crate::BitWriter<'a, REG, RrCh4en>;
260impl<'a, REG> RrCh4enW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Disable"]
265    #[inline(always)]
266    pub fn disable(self) -> &'a mut crate::W<REG> {
267        self.variant(RrCh4en::Disable)
268    }
269    #[doc = "Enable"]
270    #[inline(always)]
271    pub fn enable(self) -> &'a mut crate::W<REG> {
272        self.variant(RrCh4en::Enable)
273    }
274}
275#[doc = "Channel 5 Input Enable in Trigger Mode\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum RrCh5en {
279    #[doc = "0: Disable"]
280    Disable = 0,
281    #[doc = "1: Enable"]
282    Enable = 1,
283}
284impl From<RrCh5en> for bool {
285    #[inline(always)]
286    fn from(variant: RrCh5en) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `RR_CH5EN` reader - Channel 5 Input Enable in Trigger Mode"]
291pub type RrCh5enR = crate::BitReader<RrCh5en>;
292impl RrCh5enR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> RrCh5en {
296        match self.bits {
297            false => RrCh5en::Disable,
298            true => RrCh5en::Enable,
299        }
300    }
301    #[doc = "Disable"]
302    #[inline(always)]
303    pub fn is_disable(&self) -> bool {
304        *self == RrCh5en::Disable
305    }
306    #[doc = "Enable"]
307    #[inline(always)]
308    pub fn is_enable(&self) -> bool {
309        *self == RrCh5en::Enable
310    }
311}
312#[doc = "Field `RR_CH5EN` writer - Channel 5 Input Enable in Trigger Mode"]
313pub type RrCh5enW<'a, REG> = crate::BitWriter<'a, REG, RrCh5en>;
314impl<'a, REG> RrCh5enW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Disable"]
319    #[inline(always)]
320    pub fn disable(self) -> &'a mut crate::W<REG> {
321        self.variant(RrCh5en::Disable)
322    }
323    #[doc = "Enable"]
324    #[inline(always)]
325    pub fn enable(self) -> &'a mut crate::W<REG> {
326        self.variant(RrCh5en::Enable)
327    }
328}
329#[doc = "Channel 6 Input Enable in Trigger Mode\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum RrCh6en {
333    #[doc = "0: Disable"]
334    Disable = 0,
335    #[doc = "1: Enable"]
336    Enable = 1,
337}
338impl From<RrCh6en> for bool {
339    #[inline(always)]
340    fn from(variant: RrCh6en) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `RR_CH6EN` reader - Channel 6 Input Enable in Trigger Mode"]
345pub type RrCh6enR = crate::BitReader<RrCh6en>;
346impl RrCh6enR {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> RrCh6en {
350        match self.bits {
351            false => RrCh6en::Disable,
352            true => RrCh6en::Enable,
353        }
354    }
355    #[doc = "Disable"]
356    #[inline(always)]
357    pub fn is_disable(&self) -> bool {
358        *self == RrCh6en::Disable
359    }
360    #[doc = "Enable"]
361    #[inline(always)]
362    pub fn is_enable(&self) -> bool {
363        *self == RrCh6en::Enable
364    }
365}
366#[doc = "Field `RR_CH6EN` writer - Channel 6 Input Enable in Trigger Mode"]
367pub type RrCh6enW<'a, REG> = crate::BitWriter<'a, REG, RrCh6en>;
368impl<'a, REG> RrCh6enW<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "Disable"]
373    #[inline(always)]
374    pub fn disable(self) -> &'a mut crate::W<REG> {
375        self.variant(RrCh6en::Disable)
376    }
377    #[doc = "Enable"]
378    #[inline(always)]
379    pub fn enable(self) -> &'a mut crate::W<REG> {
380        self.variant(RrCh6en::Enable)
381    }
382}
383#[doc = "Channel 7 Input Enable in Trigger Mode\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum RrCh7en {
387    #[doc = "0: Disable"]
388    Disable = 0,
389    #[doc = "1: Enable"]
390    Enable = 1,
391}
392impl From<RrCh7en> for bool {
393    #[inline(always)]
394    fn from(variant: RrCh7en) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `RR_CH7EN` reader - Channel 7 Input Enable in Trigger Mode"]
399pub type RrCh7enR = crate::BitReader<RrCh7en>;
400impl RrCh7enR {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> RrCh7en {
404        match self.bits {
405            false => RrCh7en::Disable,
406            true => RrCh7en::Enable,
407        }
408    }
409    #[doc = "Disable"]
410    #[inline(always)]
411    pub fn is_disable(&self) -> bool {
412        *self == RrCh7en::Disable
413    }
414    #[doc = "Enable"]
415    #[inline(always)]
416    pub fn is_enable(&self) -> bool {
417        *self == RrCh7en::Enable
418    }
419}
420#[doc = "Field `RR_CH7EN` writer - Channel 7 Input Enable in Trigger Mode"]
421pub type RrCh7enW<'a, REG> = crate::BitWriter<'a, REG, RrCh7en>;
422impl<'a, REG> RrCh7enW<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "Disable"]
427    #[inline(always)]
428    pub fn disable(self) -> &'a mut crate::W<REG> {
429        self.variant(RrCh7en::Disable)
430    }
431    #[doc = "Enable"]
432    #[inline(always)]
433    pub fn enable(self) -> &'a mut crate::W<REG> {
434        self.variant(RrCh7en::Enable)
435    }
436}
437#[doc = "Fixed Port\n\nValue on reset: 0"]
438#[cfg_attr(feature = "defmt", derive(defmt::Format))]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum Fixp {
441    #[doc = "0: Fix the plus port. Sweep only the inputs to the minus port."]
442    FixPlus = 0,
443    #[doc = "1: Fix the minus port. Sweep only the inputs to the plus port."]
444    FixMinus = 1,
445}
446impl From<Fixp> for bool {
447    #[inline(always)]
448    fn from(variant: Fixp) -> Self {
449        variant as u8 != 0
450    }
451}
452#[doc = "Field `FIXP` reader - Fixed Port"]
453pub type FixpR = crate::BitReader<Fixp>;
454impl FixpR {
455    #[doc = "Get enumerated values variant"]
456    #[inline(always)]
457    pub const fn variant(&self) -> Fixp {
458        match self.bits {
459            false => Fixp::FixPlus,
460            true => Fixp::FixMinus,
461        }
462    }
463    #[doc = "Fix the plus port. Sweep only the inputs to the minus port."]
464    #[inline(always)]
465    pub fn is_fix_plus(&self) -> bool {
466        *self == Fixp::FixPlus
467    }
468    #[doc = "Fix the minus port. Sweep only the inputs to the plus port."]
469    #[inline(always)]
470    pub fn is_fix_minus(&self) -> bool {
471        *self == Fixp::FixMinus
472    }
473}
474#[doc = "Field `FIXP` writer - Fixed Port"]
475pub type FixpW<'a, REG> = crate::BitWriter<'a, REG, Fixp>;
476impl<'a, REG> FixpW<'a, REG>
477where
478    REG: crate::Writable + crate::RegisterSpec,
479{
480    #[doc = "Fix the plus port. Sweep only the inputs to the minus port."]
481    #[inline(always)]
482    pub fn fix_plus(self) -> &'a mut crate::W<REG> {
483        self.variant(Fixp::FixPlus)
484    }
485    #[doc = "Fix the minus port. Sweep only the inputs to the plus port."]
486    #[inline(always)]
487    pub fn fix_minus(self) -> &'a mut crate::W<REG> {
488        self.variant(Fixp::FixMinus)
489    }
490}
491#[doc = "Fixed Channel Select\n\nValue on reset: 0"]
492#[cfg_attr(feature = "defmt", derive(defmt::Format))]
493#[derive(Clone, Copy, Debug, PartialEq, Eq)]
494#[repr(u8)]
495pub enum Fixch {
496    #[doc = "0: Channel 0"]
497    FixCh0 = 0,
498    #[doc = "1: Channel 1"]
499    FixCh1 = 1,
500    #[doc = "2: Channel 2"]
501    FixCh2 = 2,
502    #[doc = "3: Channel 3"]
503    FixCh3 = 3,
504    #[doc = "4: Channel 4"]
505    FixCh4 = 4,
506    #[doc = "5: Channel 5"]
507    FixCh5 = 5,
508    #[doc = "6: Channel 6"]
509    FixCh6 = 6,
510    #[doc = "7: Channel 7"]
511    FixCh7 = 7,
512}
513impl From<Fixch> for u8 {
514    #[inline(always)]
515    fn from(variant: Fixch) -> Self {
516        variant as _
517    }
518}
519impl crate::FieldSpec for Fixch {
520    type Ux = u8;
521}
522impl crate::IsEnum for Fixch {}
523#[doc = "Field `FIXCH` reader - Fixed Channel Select"]
524pub type FixchR = crate::FieldReader<Fixch>;
525impl FixchR {
526    #[doc = "Get enumerated values variant"]
527    #[inline(always)]
528    pub const fn variant(&self) -> Fixch {
529        match self.bits {
530            0 => Fixch::FixCh0,
531            1 => Fixch::FixCh1,
532            2 => Fixch::FixCh2,
533            3 => Fixch::FixCh3,
534            4 => Fixch::FixCh4,
535            5 => Fixch::FixCh5,
536            6 => Fixch::FixCh6,
537            7 => Fixch::FixCh7,
538            _ => unreachable!(),
539        }
540    }
541    #[doc = "Channel 0"]
542    #[inline(always)]
543    pub fn is_fix_ch0(&self) -> bool {
544        *self == Fixch::FixCh0
545    }
546    #[doc = "Channel 1"]
547    #[inline(always)]
548    pub fn is_fix_ch1(&self) -> bool {
549        *self == Fixch::FixCh1
550    }
551    #[doc = "Channel 2"]
552    #[inline(always)]
553    pub fn is_fix_ch2(&self) -> bool {
554        *self == Fixch::FixCh2
555    }
556    #[doc = "Channel 3"]
557    #[inline(always)]
558    pub fn is_fix_ch3(&self) -> bool {
559        *self == Fixch::FixCh3
560    }
561    #[doc = "Channel 4"]
562    #[inline(always)]
563    pub fn is_fix_ch4(&self) -> bool {
564        *self == Fixch::FixCh4
565    }
566    #[doc = "Channel 5"]
567    #[inline(always)]
568    pub fn is_fix_ch5(&self) -> bool {
569        *self == Fixch::FixCh5
570    }
571    #[doc = "Channel 6"]
572    #[inline(always)]
573    pub fn is_fix_ch6(&self) -> bool {
574        *self == Fixch::FixCh6
575    }
576    #[doc = "Channel 7"]
577    #[inline(always)]
578    pub fn is_fix_ch7(&self) -> bool {
579        *self == Fixch::FixCh7
580    }
581}
582#[doc = "Field `FIXCH` writer - Fixed Channel Select"]
583pub type FixchW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fixch, crate::Safe>;
584impl<'a, REG> FixchW<'a, REG>
585where
586    REG: crate::Writable + crate::RegisterSpec,
587    REG::Ux: From<u8>,
588{
589    #[doc = "Channel 0"]
590    #[inline(always)]
591    pub fn fix_ch0(self) -> &'a mut crate::W<REG> {
592        self.variant(Fixch::FixCh0)
593    }
594    #[doc = "Channel 1"]
595    #[inline(always)]
596    pub fn fix_ch1(self) -> &'a mut crate::W<REG> {
597        self.variant(Fixch::FixCh1)
598    }
599    #[doc = "Channel 2"]
600    #[inline(always)]
601    pub fn fix_ch2(self) -> &'a mut crate::W<REG> {
602        self.variant(Fixch::FixCh2)
603    }
604    #[doc = "Channel 3"]
605    #[inline(always)]
606    pub fn fix_ch3(self) -> &'a mut crate::W<REG> {
607        self.variant(Fixch::FixCh3)
608    }
609    #[doc = "Channel 4"]
610    #[inline(always)]
611    pub fn fix_ch4(self) -> &'a mut crate::W<REG> {
612        self.variant(Fixch::FixCh4)
613    }
614    #[doc = "Channel 5"]
615    #[inline(always)]
616    pub fn fix_ch5(self) -> &'a mut crate::W<REG> {
617        self.variant(Fixch::FixCh5)
618    }
619    #[doc = "Channel 6"]
620    #[inline(always)]
621    pub fn fix_ch6(self) -> &'a mut crate::W<REG> {
622        self.variant(Fixch::FixCh6)
623    }
624    #[doc = "Channel 7"]
625    #[inline(always)]
626    pub fn fix_ch7(self) -> &'a mut crate::W<REG> {
627        self.variant(Fixch::FixCh7)
628    }
629}
630impl R {
631    #[doc = "Bit 0 - Channel 0 Input Enable in Trigger Mode"]
632    #[inline(always)]
633    pub fn rr_ch0en(&self) -> RrCh0enR {
634        RrCh0enR::new((self.bits & 1) != 0)
635    }
636    #[doc = "Bit 1 - Channel 1 Input Enable in Trigger Mode"]
637    #[inline(always)]
638    pub fn rr_ch1en(&self) -> RrCh1enR {
639        RrCh1enR::new(((self.bits >> 1) & 1) != 0)
640    }
641    #[doc = "Bit 2 - Channel 2 Input Enable in Trigger Mode"]
642    #[inline(always)]
643    pub fn rr_ch2en(&self) -> RrCh2enR {
644        RrCh2enR::new(((self.bits >> 2) & 1) != 0)
645    }
646    #[doc = "Bit 3 - Channel 3 Input Enable in Trigger Mode"]
647    #[inline(always)]
648    pub fn rr_ch3en(&self) -> RrCh3enR {
649        RrCh3enR::new(((self.bits >> 3) & 1) != 0)
650    }
651    #[doc = "Bit 4 - Channel 4 Input Enable in Trigger Mode"]
652    #[inline(always)]
653    pub fn rr_ch4en(&self) -> RrCh4enR {
654        RrCh4enR::new(((self.bits >> 4) & 1) != 0)
655    }
656    #[doc = "Bit 5 - Channel 5 Input Enable in Trigger Mode"]
657    #[inline(always)]
658    pub fn rr_ch5en(&self) -> RrCh5enR {
659        RrCh5enR::new(((self.bits >> 5) & 1) != 0)
660    }
661    #[doc = "Bit 6 - Channel 6 Input Enable in Trigger Mode"]
662    #[inline(always)]
663    pub fn rr_ch6en(&self) -> RrCh6enR {
664        RrCh6enR::new(((self.bits >> 6) & 1) != 0)
665    }
666    #[doc = "Bit 7 - Channel 7 Input Enable in Trigger Mode"]
667    #[inline(always)]
668    pub fn rr_ch7en(&self) -> RrCh7enR {
669        RrCh7enR::new(((self.bits >> 7) & 1) != 0)
670    }
671    #[doc = "Bit 16 - Fixed Port"]
672    #[inline(always)]
673    pub fn fixp(&self) -> FixpR {
674        FixpR::new(((self.bits >> 16) & 1) != 0)
675    }
676    #[doc = "Bits 20:22 - Fixed Channel Select"]
677    #[inline(always)]
678    pub fn fixch(&self) -> FixchR {
679        FixchR::new(((self.bits >> 20) & 7) as u8)
680    }
681}
682#[cfg(feature = "debug")]
683impl core::fmt::Debug for R {
684    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
685        f.debug_struct("RRCR1")
686            .field("rr_ch0en", &self.rr_ch0en())
687            .field("rr_ch1en", &self.rr_ch1en())
688            .field("rr_ch2en", &self.rr_ch2en())
689            .field("rr_ch3en", &self.rr_ch3en())
690            .field("rr_ch4en", &self.rr_ch4en())
691            .field("rr_ch5en", &self.rr_ch5en())
692            .field("rr_ch6en", &self.rr_ch6en())
693            .field("rr_ch7en", &self.rr_ch7en())
694            .field("fixp", &self.fixp())
695            .field("fixch", &self.fixch())
696            .finish()
697    }
698}
699impl W {
700    #[doc = "Bit 0 - Channel 0 Input Enable in Trigger Mode"]
701    #[inline(always)]
702    pub fn rr_ch0en(&mut self) -> RrCh0enW<'_, Rrcr1Spec> {
703        RrCh0enW::new(self, 0)
704    }
705    #[doc = "Bit 1 - Channel 1 Input Enable in Trigger Mode"]
706    #[inline(always)]
707    pub fn rr_ch1en(&mut self) -> RrCh1enW<'_, Rrcr1Spec> {
708        RrCh1enW::new(self, 1)
709    }
710    #[doc = "Bit 2 - Channel 2 Input Enable in Trigger Mode"]
711    #[inline(always)]
712    pub fn rr_ch2en(&mut self) -> RrCh2enW<'_, Rrcr1Spec> {
713        RrCh2enW::new(self, 2)
714    }
715    #[doc = "Bit 3 - Channel 3 Input Enable in Trigger Mode"]
716    #[inline(always)]
717    pub fn rr_ch3en(&mut self) -> RrCh3enW<'_, Rrcr1Spec> {
718        RrCh3enW::new(self, 3)
719    }
720    #[doc = "Bit 4 - Channel 4 Input Enable in Trigger Mode"]
721    #[inline(always)]
722    pub fn rr_ch4en(&mut self) -> RrCh4enW<'_, Rrcr1Spec> {
723        RrCh4enW::new(self, 4)
724    }
725    #[doc = "Bit 5 - Channel 5 Input Enable in Trigger Mode"]
726    #[inline(always)]
727    pub fn rr_ch5en(&mut self) -> RrCh5enW<'_, Rrcr1Spec> {
728        RrCh5enW::new(self, 5)
729    }
730    #[doc = "Bit 6 - Channel 6 Input Enable in Trigger Mode"]
731    #[inline(always)]
732    pub fn rr_ch6en(&mut self) -> RrCh6enW<'_, Rrcr1Spec> {
733        RrCh6enW::new(self, 6)
734    }
735    #[doc = "Bit 7 - Channel 7 Input Enable in Trigger Mode"]
736    #[inline(always)]
737    pub fn rr_ch7en(&mut self) -> RrCh7enW<'_, Rrcr1Spec> {
738        RrCh7enW::new(self, 7)
739    }
740    #[doc = "Bit 16 - Fixed Port"]
741    #[inline(always)]
742    pub fn fixp(&mut self) -> FixpW<'_, Rrcr1Spec> {
743        FixpW::new(self, 16)
744    }
745    #[doc = "Bits 20:22 - Fixed Channel Select"]
746    #[inline(always)]
747    pub fn fixch(&mut self) -> FixchW<'_, Rrcr1Spec> {
748        FixchW::new(self, 20)
749    }
750}
751#[doc = "Round Robin Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`rrcr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rrcr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
752pub struct Rrcr1Spec;
753impl crate::RegisterSpec for Rrcr1Spec {
754    type Ux = u32;
755}
756#[doc = "`read()` method returns [`rrcr1::R`](R) reader structure"]
757impl crate::Readable for Rrcr1Spec {}
758#[doc = "`write(|w| ..)` method takes [`rrcr1::W`](W) writer structure"]
759impl crate::Writable for Rrcr1Spec {
760    type Safety = crate::Unsafe;
761}
762#[doc = "`reset()` method sets RRCR1 to value 0"]
763impl crate::Resettable for Rrcr1Spec {}
mcxa_pac/cmp0/rrcr1.rs

mcxa_pac/cmp0/
rrcr1.rs
