mcxa_pac/can0/
timer.rs

1#[doc = "Register `TIMER` reader"]
2pub type R = crate::R<TimerSpec>;
3#[doc = "Register `TIMER` writer"]
4pub type W = crate::W<TimerSpec>;
5#[doc = "Field `TIMER` reader - Timer Value"]
6pub type TimerR = crate::FieldReader<u16>;
7#[doc = "Field `TIMER` writer - Timer Value"]
8pub type TimerW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9impl R {
10    #[doc = "Bits 0:15 - Timer Value"]
11    #[inline(always)]
12    pub fn timer(&self) -> TimerR {
13        TimerR::new((self.bits & 0xffff) as u16)
14    }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("TIMER").field("timer", &self.timer()).finish()
20    }
21}
22impl W {
23    #[doc = "Bits 0:15 - Timer Value"]
24    #[inline(always)]
25    pub fn timer(&mut self) -> TimerW<'_, TimerSpec> {
26        TimerW::new(self, 0)
27    }
28}
29#[doc = "Free-Running Timer\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct TimerSpec;
31impl crate::RegisterSpec for TimerSpec {
32    type Ux = u32;
33}
34#[doc = "`read()` method returns [`timer::R`](R) reader structure"]
35impl crate::Readable for TimerSpec {}
36#[doc = "`write(|w| ..)` method takes [`timer::W`](W) writer structure"]
37impl crate::Writable for TimerSpec {
38    type Safety = crate::Unsafe;
39}
40#[doc = "`reset()` method sets TIMER to value 0"]
41impl crate::Resettable for TimerSpec {}
mcxa_pac/can0/timer.rs

mcxa_pac/can0/
timer.rs
