mcxa_pac/
flexio0.rs

1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    verid: Verid,
6    param: Param,
7    ctrl: Ctrl,
8    pin: Pin,
9    shiftstat: Shiftstat,
10    shifterr: Shifterr,
11    timstat: Timstat,
12    _reserved7: [u8; 0x04],
13    shiftsien: Shiftsien,
14    shifteien: Shifteien,
15    timien: Timien,
16    _reserved10: [u8; 0x04],
17    shiftsden: Shiftsden,
18    _reserved11: [u8; 0x04],
19    timersden: Timersden,
20    _reserved12: [u8; 0x04],
21    shiftstate: Shiftstate,
22    _reserved13: [u8; 0x04],
23    trgstat: Trgstat,
24    trigien: Trigien,
25    pinstat: Pinstat,
26    pinien: Pinien,
27    pinren: Pinren,
28    pinfen: Pinfen,
29    pinoutd: Pinoutd,
30    pinoute: Pinoute,
31    pinoutdis: Pinoutdis,
32    pinoutclr: Pinoutclr,
33    pinoutset: Pinoutset,
34    pinouttog: Pinouttog,
35    _reserved25: [u8; 0x08],
36    shiftctl: [Shiftctl; 4],
37    _reserved26: [u8; 0x70],
38    shiftcfg: [Shiftcfg; 4],
39    _reserved27: [u8; 0xf0],
40    shiftbuf: [Shiftbuf; 4],
41    _reserved28: [u8; 0x70],
42    shiftbufbis: [Shiftbufbis; 4],
43    _reserved29: [u8; 0x70],
44    shiftbufbys: [Shiftbufbys; 4],
45    _reserved30: [u8; 0x70],
46    shiftbufbbs: [Shiftbufbbs; 4],
47    _reserved31: [u8; 0x70],
48    timctl: [Timctl; 4],
49    _reserved32: [u8; 0x70],
50    timcfg: [Timcfg; 4],
51    _reserved33: [u8; 0x70],
52    timcmp: [Timcmp; 4],
53    _reserved34: [u8; 0x0170],
54    shiftbufnbs: [Shiftbufnbs; 4],
55    _reserved35: [u8; 0x70],
56    shiftbufhws: [Shiftbufhws; 4],
57    _reserved36: [u8; 0x70],
58    shiftbufnis: [Shiftbufnis; 4],
59    _reserved37: [u8; 0x70],
60    shiftbufoes: [Shiftbufoes; 4],
61    _reserved38: [u8; 0x70],
62    shiftbufeos: [Shiftbufeos; 4],
63    _reserved39: [u8; 0x70],
64    shiftbufhbs: [Shiftbufhbs; 4],
65}
66impl RegisterBlock {
67    #[doc = "0x00 - Version ID"]
68    #[inline(always)]
69    pub const fn verid(&self) -> &Verid {
70        &self.verid
71    }
72    #[doc = "0x04 - Parameter"]
73    #[inline(always)]
74    pub const fn param(&self) -> &Param {
75        &self.param
76    }
77    #[doc = "0x08 - FLEXIO Control"]
78    #[inline(always)]
79    pub const fn ctrl(&self) -> &Ctrl {
80        &self.ctrl
81    }
82    #[doc = "0x0c - Pin State"]
83    #[inline(always)]
84    pub const fn pin(&self) -> &Pin {
85        &self.pin
86    }
87    #[doc = "0x10 - Shifter Status"]
88    #[inline(always)]
89    pub const fn shiftstat(&self) -> &Shiftstat {
90        &self.shiftstat
91    }
92    #[doc = "0x14 - Shifter Error"]
93    #[inline(always)]
94    pub const fn shifterr(&self) -> &Shifterr {
95        &self.shifterr
96    }
97    #[doc = "0x18 - Timer Status Flag"]
98    #[inline(always)]
99    pub const fn timstat(&self) -> &Timstat {
100        &self.timstat
101    }
102    #[doc = "0x20 - Shifter Status Interrupt Enable"]
103    #[inline(always)]
104    pub const fn shiftsien(&self) -> &Shiftsien {
105        &self.shiftsien
106    }
107    #[doc = "0x24 - Shifter Error Interrupt Enable"]
108    #[inline(always)]
109    pub const fn shifteien(&self) -> &Shifteien {
110        &self.shifteien
111    }
112    #[doc = "0x28 - Timer Interrupt Enable"]
113    #[inline(always)]
114    pub const fn timien(&self) -> &Timien {
115        &self.timien
116    }
117    #[doc = "0x30 - Shifter Status DMA Enable"]
118    #[inline(always)]
119    pub const fn shiftsden(&self) -> &Shiftsden {
120        &self.shiftsden
121    }
122    #[doc = "0x38 - Timer Status DMA Enable"]
123    #[inline(always)]
124    pub const fn timersden(&self) -> &Timersden {
125        &self.timersden
126    }
127    #[doc = "0x40 - Shifter State"]
128    #[inline(always)]
129    pub const fn shiftstate(&self) -> &Shiftstate {
130        &self.shiftstate
131    }
132    #[doc = "0x48 - Trigger Status"]
133    #[inline(always)]
134    pub const fn trgstat(&self) -> &Trgstat {
135        &self.trgstat
136    }
137    #[doc = "0x4c - External Trigger Interrupt Enable"]
138    #[inline(always)]
139    pub const fn trigien(&self) -> &Trigien {
140        &self.trigien
141    }
142    #[doc = "0x50 - Pin Status"]
143    #[inline(always)]
144    pub const fn pinstat(&self) -> &Pinstat {
145        &self.pinstat
146    }
147    #[doc = "0x54 - Pin Interrupt Enable"]
148    #[inline(always)]
149    pub const fn pinien(&self) -> &Pinien {
150        &self.pinien
151    }
152    #[doc = "0x58 - Pin Rising Edge Enable"]
153    #[inline(always)]
154    pub const fn pinren(&self) -> &Pinren {
155        &self.pinren
156    }
157    #[doc = "0x5c - Pin Falling Edge Enable"]
158    #[inline(always)]
159    pub const fn pinfen(&self) -> &Pinfen {
160        &self.pinfen
161    }
162    #[doc = "0x60 - Pin Output Data"]
163    #[inline(always)]
164    pub const fn pinoutd(&self) -> &Pinoutd {
165        &self.pinoutd
166    }
167    #[doc = "0x64 - Pin Output Enable"]
168    #[inline(always)]
169    pub const fn pinoute(&self) -> &Pinoute {
170        &self.pinoute
171    }
172    #[doc = "0x68 - Pin Output Disable"]
173    #[inline(always)]
174    pub const fn pinoutdis(&self) -> &Pinoutdis {
175        &self.pinoutdis
176    }
177    #[doc = "0x6c - Pin Output Clear"]
178    #[inline(always)]
179    pub const fn pinoutclr(&self) -> &Pinoutclr {
180        &self.pinoutclr
181    }
182    #[doc = "0x70 - Pin Output Set"]
183    #[inline(always)]
184    pub const fn pinoutset(&self) -> &Pinoutset {
185        &self.pinoutset
186    }
187    #[doc = "0x74 - Pin Output Toggle"]
188    #[inline(always)]
189    pub const fn pinouttog(&self) -> &Pinouttog {
190        &self.pinouttog
191    }
192    #[doc = "0x80..0x90 - Shifter Control"]
193    #[inline(always)]
194    pub const fn shiftctl(&self, n: usize) -> &Shiftctl {
195        &self.shiftctl[n]
196    }
197    #[doc = "Iterator for array of:"]
198    #[doc = "0x80..0x90 - Shifter Control"]
199    #[inline(always)]
200    pub fn shiftctl_iter(&self) -> impl Iterator<Item = &Shiftctl> {
201        self.shiftctl.iter()
202    }
203    #[doc = "0x100..0x110 - Shifter Configuration"]
204    #[inline(always)]
205    pub const fn shiftcfg(&self, n: usize) -> &Shiftcfg {
206        &self.shiftcfg[n]
207    }
208    #[doc = "Iterator for array of:"]
209    #[doc = "0x100..0x110 - Shifter Configuration"]
210    #[inline(always)]
211    pub fn shiftcfg_iter(&self) -> impl Iterator<Item = &Shiftcfg> {
212        self.shiftcfg.iter()
213    }
214    #[doc = "0x200..0x210 - Shifter Buffer"]
215    #[inline(always)]
216    pub const fn shiftbuf(&self, n: usize) -> &Shiftbuf {
217        &self.shiftbuf[n]
218    }
219    #[doc = "Iterator for array of:"]
220    #[doc = "0x200..0x210 - Shifter Buffer"]
221    #[inline(always)]
222    pub fn shiftbuf_iter(&self) -> impl Iterator<Item = &Shiftbuf> {
223        self.shiftbuf.iter()
224    }
225    #[doc = "0x280..0x290 - Shifter Buffer Bit Swapped"]
226    #[inline(always)]
227    pub const fn shiftbufbis(&self, n: usize) -> &Shiftbufbis {
228        &self.shiftbufbis[n]
229    }
230    #[doc = "Iterator for array of:"]
231    #[doc = "0x280..0x290 - Shifter Buffer Bit Swapped"]
232    #[inline(always)]
233    pub fn shiftbufbis_iter(&self) -> impl Iterator<Item = &Shiftbufbis> {
234        self.shiftbufbis.iter()
235    }
236    #[doc = "0x300..0x310 - Shifter Buffer Byte Swapped"]
237    #[inline(always)]
238    pub const fn shiftbufbys(&self, n: usize) -> &Shiftbufbys {
239        &self.shiftbufbys[n]
240    }
241    #[doc = "Iterator for array of:"]
242    #[doc = "0x300..0x310 - Shifter Buffer Byte Swapped"]
243    #[inline(always)]
244    pub fn shiftbufbys_iter(&self) -> impl Iterator<Item = &Shiftbufbys> {
245        self.shiftbufbys.iter()
246    }
247    #[doc = "0x380..0x390 - Shifter Buffer Bit Byte Swapped"]
248    #[inline(always)]
249    pub const fn shiftbufbbs(&self, n: usize) -> &Shiftbufbbs {
250        &self.shiftbufbbs[n]
251    }
252    #[doc = "Iterator for array of:"]
253    #[doc = "0x380..0x390 - Shifter Buffer Bit Byte Swapped"]
254    #[inline(always)]
255    pub fn shiftbufbbs_iter(&self) -> impl Iterator<Item = &Shiftbufbbs> {
256        self.shiftbufbbs.iter()
257    }
258    #[doc = "0x400..0x410 - Timer Control"]
259    #[inline(always)]
260    pub const fn timctl(&self, n: usize) -> &Timctl {
261        &self.timctl[n]
262    }
263    #[doc = "Iterator for array of:"]
264    #[doc = "0x400..0x410 - Timer Control"]
265    #[inline(always)]
266    pub fn timctl_iter(&self) -> impl Iterator<Item = &Timctl> {
267        self.timctl.iter()
268    }
269    #[doc = "0x480..0x490 - Timer Configuration"]
270    #[inline(always)]
271    pub const fn timcfg(&self, n: usize) -> &Timcfg {
272        &self.timcfg[n]
273    }
274    #[doc = "Iterator for array of:"]
275    #[doc = "0x480..0x490 - Timer Configuration"]
276    #[inline(always)]
277    pub fn timcfg_iter(&self) -> impl Iterator<Item = &Timcfg> {
278        self.timcfg.iter()
279    }
280    #[doc = "0x500..0x510 - Timer Compare"]
281    #[inline(always)]
282    pub const fn timcmp(&self, n: usize) -> &Timcmp {
283        &self.timcmp[n]
284    }
285    #[doc = "Iterator for array of:"]
286    #[doc = "0x500..0x510 - Timer Compare"]
287    #[inline(always)]
288    pub fn timcmp_iter(&self) -> impl Iterator<Item = &Timcmp> {
289        self.timcmp.iter()
290    }
291    #[doc = "0x680..0x690 - Shifter Buffer Nibble Byte Swapped"]
292    #[inline(always)]
293    pub const fn shiftbufnbs(&self, n: usize) -> &Shiftbufnbs {
294        &self.shiftbufnbs[n]
295    }
296    #[doc = "Iterator for array of:"]
297    #[doc = "0x680..0x690 - Shifter Buffer Nibble Byte Swapped"]
298    #[inline(always)]
299    pub fn shiftbufnbs_iter(&self) -> impl Iterator<Item = &Shiftbufnbs> {
300        self.shiftbufnbs.iter()
301    }
302    #[doc = "0x700..0x710 - Shifter Buffer Halfword Swapped"]
303    #[inline(always)]
304    pub const fn shiftbufhws(&self, n: usize) -> &Shiftbufhws {
305        &self.shiftbufhws[n]
306    }
307    #[doc = "Iterator for array of:"]
308    #[doc = "0x700..0x710 - Shifter Buffer Halfword Swapped"]
309    #[inline(always)]
310    pub fn shiftbufhws_iter(&self) -> impl Iterator<Item = &Shiftbufhws> {
311        self.shiftbufhws.iter()
312    }
313    #[doc = "0x780..0x790 - Shifter Buffer Nibble Swapped"]
314    #[inline(always)]
315    pub const fn shiftbufnis(&self, n: usize) -> &Shiftbufnis {
316        &self.shiftbufnis[n]
317    }
318    #[doc = "Iterator for array of:"]
319    #[doc = "0x780..0x790 - Shifter Buffer Nibble Swapped"]
320    #[inline(always)]
321    pub fn shiftbufnis_iter(&self) -> impl Iterator<Item = &Shiftbufnis> {
322        self.shiftbufnis.iter()
323    }
324    #[doc = "0x800..0x810 - Shifter Buffer Odd Even Swapped"]
325    #[inline(always)]
326    pub const fn shiftbufoes(&self, n: usize) -> &Shiftbufoes {
327        &self.shiftbufoes[n]
328    }
329    #[doc = "Iterator for array of:"]
330    #[doc = "0x800..0x810 - Shifter Buffer Odd Even Swapped"]
331    #[inline(always)]
332    pub fn shiftbufoes_iter(&self) -> impl Iterator<Item = &Shiftbufoes> {
333        self.shiftbufoes.iter()
334    }
335    #[doc = "0x880..0x890 - Shifter Buffer Even Odd Swapped"]
336    #[inline(always)]
337    pub const fn shiftbufeos(&self, n: usize) -> &Shiftbufeos {
338        &self.shiftbufeos[n]
339    }
340    #[doc = "Iterator for array of:"]
341    #[doc = "0x880..0x890 - Shifter Buffer Even Odd Swapped"]
342    #[inline(always)]
343    pub fn shiftbufeos_iter(&self) -> impl Iterator<Item = &Shiftbufeos> {
344        self.shiftbufeos.iter()
345    }
346    #[doc = "0x900..0x910 - Shifter Buffer Halfword Byte Swapped"]
347    #[inline(always)]
348    pub const fn shiftbufhbs(&self, n: usize) -> &Shiftbufhbs {
349        &self.shiftbufhbs[n]
350    }
351    #[doc = "Iterator for array of:"]
352    #[doc = "0x900..0x910 - Shifter Buffer Halfword Byte Swapped"]
353    #[inline(always)]
354    pub fn shiftbufhbs_iter(&self) -> impl Iterator<Item = &Shiftbufhbs> {
355        self.shiftbufhbs.iter()
356    }
357}
358#[doc = "VERID (r) register accessor: Version ID\n\nYou can [`read`](crate::Reg::read) this register and get [`verid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@verid`] module"]
359#[doc(alias = "VERID")]
360pub type Verid = crate::Reg<verid::VeridSpec>;
361#[doc = "Version ID"]
362pub mod verid;
363#[doc = "PARAM (r) register accessor: Parameter\n\nYou can [`read`](crate::Reg::read) this register and get [`param::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@param`] module"]
364#[doc(alias = "PARAM")]
365pub type Param = crate::Reg<param::ParamSpec>;
366#[doc = "Parameter"]
367pub mod param;
368#[doc = "CTRL (rw) register accessor: FLEXIO Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"]
369#[doc(alias = "CTRL")]
370pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
371#[doc = "FLEXIO Control"]
372pub mod ctrl;
373#[doc = "PIN (r) register accessor: Pin State\n\nYou can [`read`](crate::Reg::read) this register and get [`pin::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pin`] module"]
374#[doc(alias = "PIN")]
375pub type Pin = crate::Reg<pin::PinSpec>;
376#[doc = "Pin State"]
377pub mod pin;
378#[doc = "SHIFTSTAT (rw) register accessor: Shifter Status\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftstat`] module"]
379#[doc(alias = "SHIFTSTAT")]
380pub type Shiftstat = crate::Reg<shiftstat::ShiftstatSpec>;
381#[doc = "Shifter Status"]
382pub mod shiftstat;
383#[doc = "SHIFTERR (rw) register accessor: Shifter Error\n\nYou can [`read`](crate::Reg::read) this register and get [`shifterr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shifterr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shifterr`] module"]
384#[doc(alias = "SHIFTERR")]
385pub type Shifterr = crate::Reg<shifterr::ShifterrSpec>;
386#[doc = "Shifter Error"]
387pub mod shifterr;
388#[doc = "TIMSTAT (rw) register accessor: Timer Status Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`timstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timstat`] module"]
389#[doc(alias = "TIMSTAT")]
390pub type Timstat = crate::Reg<timstat::TimstatSpec>;
391#[doc = "Timer Status Flag"]
392pub mod timstat;
393#[doc = "SHIFTSIEN (rw) register accessor: Shifter Status Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftsien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftsien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftsien`] module"]
394#[doc(alias = "SHIFTSIEN")]
395pub type Shiftsien = crate::Reg<shiftsien::ShiftsienSpec>;
396#[doc = "Shifter Status Interrupt Enable"]
397pub mod shiftsien;
398#[doc = "SHIFTEIEN (rw) register accessor: Shifter Error Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`shifteien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shifteien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shifteien`] module"]
399#[doc(alias = "SHIFTEIEN")]
400pub type Shifteien = crate::Reg<shifteien::ShifteienSpec>;
401#[doc = "Shifter Error Interrupt Enable"]
402pub mod shifteien;
403#[doc = "TIMIEN (rw) register accessor: Timer Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timien`] module"]
404#[doc(alias = "TIMIEN")]
405pub type Timien = crate::Reg<timien::TimienSpec>;
406#[doc = "Timer Interrupt Enable"]
407pub mod timien;
408#[doc = "SHIFTSDEN (rw) register accessor: Shifter Status DMA Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftsden::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftsden::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftsden`] module"]
409#[doc(alias = "SHIFTSDEN")]
410pub type Shiftsden = crate::Reg<shiftsden::ShiftsdenSpec>;
411#[doc = "Shifter Status DMA Enable"]
412pub mod shiftsden;
413#[doc = "TIMERSDEN (rw) register accessor: Timer Status DMA Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timersden::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timersden::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timersden`] module"]
414#[doc(alias = "TIMERSDEN")]
415pub type Timersden = crate::Reg<timersden::TimersdenSpec>;
416#[doc = "Timer Status DMA Enable"]
417pub mod timersden;
418#[doc = "SHIFTSTATE (rw) register accessor: Shifter State\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftstate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftstate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftstate`] module"]
419#[doc(alias = "SHIFTSTATE")]
420pub type Shiftstate = crate::Reg<shiftstate::ShiftstateSpec>;
421#[doc = "Shifter State"]
422pub mod shiftstate;
423#[doc = "TRGSTAT (rw) register accessor: Trigger Status\n\nYou can [`read`](crate::Reg::read) this register and get [`trgstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trgstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trgstat`] module"]
424#[doc(alias = "TRGSTAT")]
425pub type Trgstat = crate::Reg<trgstat::TrgstatSpec>;
426#[doc = "Trigger Status"]
427pub mod trgstat;
428#[doc = "TRIGIEN (rw) register accessor: External Trigger Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`trigien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigien`] module"]
429#[doc(alias = "TRIGIEN")]
430pub type Trigien = crate::Reg<trigien::TrigienSpec>;
431#[doc = "External Trigger Interrupt Enable"]
432pub mod trigien;
433#[doc = "PINSTAT (rw) register accessor: Pin Status\n\nYou can [`read`](crate::Reg::read) this register and get [`pinstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinstat`] module"]
434#[doc(alias = "PINSTAT")]
435pub type Pinstat = crate::Reg<pinstat::PinstatSpec>;
436#[doc = "Pin Status"]
437pub mod pinstat;
438#[doc = "PINIEN (rw) register accessor: Pin Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`pinien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinien`] module"]
439#[doc(alias = "PINIEN")]
440pub type Pinien = crate::Reg<pinien::PinienSpec>;
441#[doc = "Pin Interrupt Enable"]
442pub mod pinien;
443#[doc = "PINREN (rw) register accessor: Pin Rising Edge Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`pinren::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinren::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinren`] module"]
444#[doc(alias = "PINREN")]
445pub type Pinren = crate::Reg<pinren::PinrenSpec>;
446#[doc = "Pin Rising Edge Enable"]
447pub mod pinren;
448#[doc = "PINFEN (rw) register accessor: Pin Falling Edge Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`pinfen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinfen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinfen`] module"]
449#[doc(alias = "PINFEN")]
450pub type Pinfen = crate::Reg<pinfen::PinfenSpec>;
451#[doc = "Pin Falling Edge Enable"]
452pub mod pinfen;
453#[doc = "PINOUTD (rw) register accessor: Pin Output Data\n\nYou can [`read`](crate::Reg::read) this register and get [`pinoutd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinoutd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinoutd`] module"]
454#[doc(alias = "PINOUTD")]
455pub type Pinoutd = crate::Reg<pinoutd::PinoutdSpec>;
456#[doc = "Pin Output Data"]
457pub mod pinoutd;
458#[doc = "PINOUTE (rw) register accessor: Pin Output Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`pinoute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinoute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinoute`] module"]
459#[doc(alias = "PINOUTE")]
460pub type Pinoute = crate::Reg<pinoute::PinouteSpec>;
461#[doc = "Pin Output Enable"]
462pub mod pinoute;
463#[doc = "PINOUTDIS (rw) register accessor: Pin Output Disable\n\nYou can [`read`](crate::Reg::read) this register and get [`pinoutdis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinoutdis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinoutdis`] module"]
464#[doc(alias = "PINOUTDIS")]
465pub type Pinoutdis = crate::Reg<pinoutdis::PinoutdisSpec>;
466#[doc = "Pin Output Disable"]
467pub mod pinoutdis;
468#[doc = "PINOUTCLR (rw) register accessor: Pin Output Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`pinoutclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinoutclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinoutclr`] module"]
469#[doc(alias = "PINOUTCLR")]
470pub type Pinoutclr = crate::Reg<pinoutclr::PinoutclrSpec>;
471#[doc = "Pin Output Clear"]
472pub mod pinoutclr;
473#[doc = "PINOUTSET (rw) register accessor: Pin Output Set\n\nYou can [`read`](crate::Reg::read) this register and get [`pinoutset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinoutset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinoutset`] module"]
474#[doc(alias = "PINOUTSET")]
475pub type Pinoutset = crate::Reg<pinoutset::PinoutsetSpec>;
476#[doc = "Pin Output Set"]
477pub mod pinoutset;
478#[doc = "PINOUTTOG (rw) register accessor: Pin Output Toggle\n\nYou can [`read`](crate::Reg::read) this register and get [`pinouttog::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pinouttog::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pinouttog`] module"]
479#[doc(alias = "PINOUTTOG")]
480pub type Pinouttog = crate::Reg<pinouttog::PinouttogSpec>;
481#[doc = "Pin Output Toggle"]
482pub mod pinouttog;
483#[doc = "SHIFTCTL (rw) register accessor: Shifter Control\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftctl`] module"]
484#[doc(alias = "SHIFTCTL")]
485pub type Shiftctl = crate::Reg<shiftctl::ShiftctlSpec>;
486#[doc = "Shifter Control"]
487pub mod shiftctl;
488#[doc = "SHIFTCFG (rw) register accessor: Shifter Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftcfg`] module"]
489#[doc(alias = "SHIFTCFG")]
490pub type Shiftcfg = crate::Reg<shiftcfg::ShiftcfgSpec>;
491#[doc = "Shifter Configuration"]
492pub mod shiftcfg;
493#[doc = "SHIFTBUF (rw) register accessor: Shifter Buffer\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbuf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbuf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbuf`] module"]
494#[doc(alias = "SHIFTBUF")]
495pub type Shiftbuf = crate::Reg<shiftbuf::ShiftbufSpec>;
496#[doc = "Shifter Buffer"]
497pub mod shiftbuf;
498#[doc = "SHIFTBUFBIS (rw) register accessor: Shifter Buffer Bit Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufbis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufbis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufbis`] module"]
499#[doc(alias = "SHIFTBUFBIS")]
500pub type Shiftbufbis = crate::Reg<shiftbufbis::ShiftbufbisSpec>;
501#[doc = "Shifter Buffer Bit Swapped"]
502pub mod shiftbufbis;
503#[doc = "SHIFTBUFBYS (rw) register accessor: Shifter Buffer Byte Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufbys::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufbys::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufbys`] module"]
504#[doc(alias = "SHIFTBUFBYS")]
505pub type Shiftbufbys = crate::Reg<shiftbufbys::ShiftbufbysSpec>;
506#[doc = "Shifter Buffer Byte Swapped"]
507pub mod shiftbufbys;
508#[doc = "SHIFTBUFBBS (rw) register accessor: Shifter Buffer Bit Byte Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufbbs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufbbs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufbbs`] module"]
509#[doc(alias = "SHIFTBUFBBS")]
510pub type Shiftbufbbs = crate::Reg<shiftbufbbs::ShiftbufbbsSpec>;
511#[doc = "Shifter Buffer Bit Byte Swapped"]
512pub mod shiftbufbbs;
513#[doc = "TIMCTL (rw) register accessor: Timer Control\n\nYou can [`read`](crate::Reg::read) this register and get [`timctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timctl`] module"]
514#[doc(alias = "TIMCTL")]
515pub type Timctl = crate::Reg<timctl::TimctlSpec>;
516#[doc = "Timer Control"]
517pub mod timctl;
518#[doc = "TIMCFG (rw) register accessor: Timer Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`timcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timcfg`] module"]
519#[doc(alias = "TIMCFG")]
520pub type Timcfg = crate::Reg<timcfg::TimcfgSpec>;
521#[doc = "Timer Configuration"]
522pub mod timcfg;
523#[doc = "TIMCMP (rw) register accessor: Timer Compare\n\nYou can [`read`](crate::Reg::read) this register and get [`timcmp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timcmp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timcmp`] module"]
524#[doc(alias = "TIMCMP")]
525pub type Timcmp = crate::Reg<timcmp::TimcmpSpec>;
526#[doc = "Timer Compare"]
527pub mod timcmp;
528#[doc = "SHIFTBUFNBS (rw) register accessor: Shifter Buffer Nibble Byte Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufnbs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufnbs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufnbs`] module"]
529#[doc(alias = "SHIFTBUFNBS")]
530pub type Shiftbufnbs = crate::Reg<shiftbufnbs::ShiftbufnbsSpec>;
531#[doc = "Shifter Buffer Nibble Byte Swapped"]
532pub mod shiftbufnbs;
533#[doc = "SHIFTBUFHWS (rw) register accessor: Shifter Buffer Halfword Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufhws::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufhws::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufhws`] module"]
534#[doc(alias = "SHIFTBUFHWS")]
535pub type Shiftbufhws = crate::Reg<shiftbufhws::ShiftbufhwsSpec>;
536#[doc = "Shifter Buffer Halfword Swapped"]
537pub mod shiftbufhws;
538#[doc = "SHIFTBUFNIS (rw) register accessor: Shifter Buffer Nibble Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufnis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufnis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufnis`] module"]
539#[doc(alias = "SHIFTBUFNIS")]
540pub type Shiftbufnis = crate::Reg<shiftbufnis::ShiftbufnisSpec>;
541#[doc = "Shifter Buffer Nibble Swapped"]
542pub mod shiftbufnis;
543#[doc = "SHIFTBUFOES (rw) register accessor: Shifter Buffer Odd Even Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufoes::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufoes::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufoes`] module"]
544#[doc(alias = "SHIFTBUFOES")]
545pub type Shiftbufoes = crate::Reg<shiftbufoes::ShiftbufoesSpec>;
546#[doc = "Shifter Buffer Odd Even Swapped"]
547pub mod shiftbufoes;
548#[doc = "SHIFTBUFEOS (rw) register accessor: Shifter Buffer Even Odd Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufeos::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufeos::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufeos`] module"]
549#[doc(alias = "SHIFTBUFEOS")]
550pub type Shiftbufeos = crate::Reg<shiftbufeos::ShiftbufeosSpec>;
551#[doc = "Shifter Buffer Even Odd Swapped"]
552pub mod shiftbufeos;
553#[doc = "SHIFTBUFHBS (rw) register accessor: Shifter Buffer Halfword Byte Swapped\n\nYou can [`read`](crate::Reg::read) this register and get [`shiftbufhbs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shiftbufhbs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shiftbufhbs`] module"]
554#[doc(alias = "SHIFTBUFHBS")]
555pub type Shiftbufhbs = crate::Reg<shiftbufhbs::ShiftbufhbsSpec>;
556#[doc = "Shifter Buffer Halfword Byte Swapped"]
557pub mod shiftbufhbs;
mcxa_pac/flexio0.rs

mcxa_pac/
flexio0.rs
