mc6809_core/lib.rs
1// Copyright 2026 Martin Åkesson
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! # emu6809-core
16//!
17//! A Motorola 6809 CPU emulator core.
18//!
19//! Provides a [`Cpu`] that executes 6809 instructions against any memory system
20//! implementing the [`Memory`] trait. Peripheral timing and interrupt signals are
21//! handled separately via the [`Bus`] trait, which is called by the host loop
22//! independently of the CPU.
23//!
24//! ## Example
25//!
26//! ```rust
27//! use mc6809_core::{Cpu, Memory};
28//!
29//! struct FlatRam([u8; 65536]);
30//!
31//! impl Memory for FlatRam {
32//! fn read(&mut self, addr: u16) -> u8 { self.0[addr as usize] }
33//! fn write(&mut self, addr: u16, val: u8) { self.0[addr as usize] = val; }
34//! }
35//!
36//! let mut mem = FlatRam([0; 65536]);
37//! // Place a reset vector pointing to 0x0400
38//! mem.0[0xFFFE] = 0x04;
39//! mem.0[0xFFFF] = 0x00;
40//! // Place a NOP at 0x0400
41//! mem.0[0x0400] = 0x12;
42//!
43//! let mut cpu = Cpu::new();
44//! cpu.reset(&mut mem);
45//! assert_eq!(cpu.reg.pc, 0x0400);
46//! cpu.step(&mut mem);
47//! assert_eq!(cpu.reg.pc, 0x0401);
48//! ```
49
50pub mod addressing;
51pub mod alu;
52pub mod bus;
53mod cpu;
54pub mod registers;
55
56pub use bus::{Bus, BusSignals, Memory};
57pub use cpu::Cpu;
58pub use cpu::instruction_cycles;
59pub use registers::{ConditionCodes, Registers};
60
61#[cfg(test)]
62mod tests;