1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 ctrl: Ctrl,
5 status: Status,
6 int_en: IntEn,
7 int_fl: IntFl,
8 clkdiv: Clkdiv,
9 osr: Osr,
10 txpeek: Txpeek,
11 pnr: Pnr,
12 fifo: Fifo,
13 _reserved9: [u8; 0x0c],
14 dma: Dma,
15 wken: Wken,
16 wkfl: Wkfl,
17}
18impl RegisterBlock {
19 #[doc = "0x00 - Control register"]
20 #[inline(always)]
21 pub const fn ctrl(&self) -> &Ctrl {
22 &self.ctrl
23 }
24 #[doc = "0x04 - Status register"]
25 #[inline(always)]
26 pub const fn status(&self) -> &Status {
27 &self.status
28 }
29 #[doc = "0x08 - Interrupt Enable control register"]
30 #[inline(always)]
31 pub const fn int_en(&self) -> &IntEn {
32 &self.int_en
33 }
34 #[doc = "0x0c - Interrupt status flags Control register"]
35 #[inline(always)]
36 pub const fn int_fl(&self) -> &IntFl {
37 &self.int_fl
38 }
39 #[doc = "0x10 - Clock Divider register"]
40 #[inline(always)]
41 pub const fn clkdiv(&self) -> &Clkdiv {
42 &self.clkdiv
43 }
44 #[doc = "0x14 - Over Sampling Rate register"]
45 #[inline(always)]
46 pub const fn osr(&self) -> &Osr {
47 &self.osr
48 }
49 #[doc = "0x18 - TX FIFO Output Peek register"]
50 #[inline(always)]
51 pub const fn txpeek(&self) -> &Txpeek {
52 &self.txpeek
53 }
54 #[doc = "0x1c - Pin register"]
55 #[inline(always)]
56 pub const fn pnr(&self) -> &Pnr {
57 &self.pnr
58 }
59 #[doc = "0x20 - FIFO Read/Write register"]
60 #[inline(always)]
61 pub const fn fifo(&self) -> &Fifo {
62 &self.fifo
63 }
64 #[doc = "0x30 - DMA Configuration register"]
65 #[inline(always)]
66 pub const fn dma(&self) -> &Dma {
67 &self.dma
68 }
69 #[doc = "0x34 - Wake up enable Control register"]
70 #[inline(always)]
71 pub const fn wken(&self) -> &Wken {
72 &self.wken
73 }
74 #[doc = "0x38 - Wake up Flags register"]
75 #[inline(always)]
76 pub const fn wkfl(&self) -> &Wkfl {
77 &self.wkfl
78 }
79}
80#[doc = "CTRL (rw) register accessor: Control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
81module"]
82#[doc(alias = "CTRL")]
83pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
84#[doc = "Control register"]
85pub mod ctrl;
86#[doc = "STATUS (r) register accessor: Status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
87module"]
88#[doc(alias = "STATUS")]
89pub type Status = crate::Reg<status::StatusSpec>;
90#[doc = "Status register"]
91pub mod status;
92#[doc = "INT_EN (rw) register accessor: Interrupt Enable control register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_en`]
93module"]
94#[doc(alias = "INT_EN")]
95pub type IntEn = crate::Reg<int_en::IntEnSpec>;
96#[doc = "Interrupt Enable control register"]
97pub mod int_en;
98#[doc = "INT_FL (rw) register accessor: Interrupt status flags Control register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_fl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_fl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_fl`]
99module"]
100#[doc(alias = "INT_FL")]
101pub type IntFl = crate::Reg<int_fl::IntFlSpec>;
102#[doc = "Interrupt status flags Control register"]
103pub mod int_fl;
104#[doc = "CLKDIV (rw) register accessor: Clock Divider register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`]
105module"]
106#[doc(alias = "CLKDIV")]
107pub type Clkdiv = crate::Reg<clkdiv::ClkdivSpec>;
108#[doc = "Clock Divider register"]
109pub mod clkdiv;
110#[doc = "OSR (rw) register accessor: Over Sampling Rate register\n\nYou can [`read`](crate::Reg::read) this register and get [`osr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`osr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osr`]
111module"]
112#[doc(alias = "OSR")]
113pub type Osr = crate::Reg<osr::OsrSpec>;
114#[doc = "Over Sampling Rate register"]
115pub mod osr;
116#[doc = "TXPEEK (rw) register accessor: TX FIFO Output Peek register\n\nYou can [`read`](crate::Reg::read) this register and get [`txpeek::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txpeek::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txpeek`]
117module"]
118#[doc(alias = "TXPEEK")]
119pub type Txpeek = crate::Reg<txpeek::TxpeekSpec>;
120#[doc = "TX FIFO Output Peek register"]
121pub mod txpeek;
122#[doc = "PNR (rw) register accessor: Pin register\n\nYou can [`read`](crate::Reg::read) this register and get [`pnr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pnr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pnr`]
123module"]
124#[doc(alias = "PNR")]
125pub type Pnr = crate::Reg<pnr::PnrSpec>;
126#[doc = "Pin register"]
127pub mod pnr;
128#[doc = "FIFO (rw) register accessor: FIFO Read/Write register\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`]
129module"]
130#[doc(alias = "FIFO")]
131pub type Fifo = crate::Reg<fifo::FifoSpec>;
132#[doc = "FIFO Read/Write register"]
133pub mod fifo;
134#[doc = "DMA (rw) register accessor: DMA Configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma`]
135module"]
136#[doc(alias = "DMA")]
137pub type Dma = crate::Reg<dma::DmaSpec>;
138#[doc = "DMA Configuration register"]
139pub mod dma;
140#[doc = "WKEN (rw) register accessor: Wake up enable Control register\n\nYou can [`read`](crate::Reg::read) this register and get [`wken::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wken::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wken`]
141module"]
142#[doc(alias = "WKEN")]
143pub type Wken = crate::Reg<wken::WkenSpec>;
144#[doc = "Wake up enable Control register"]
145pub mod wken;
146#[doc = "WKFL (rw) register accessor: Wake up Flags register\n\nYou can [`read`](crate::Reg::read) this register and get [`wkfl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wkfl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wkfl`]
147module"]
148#[doc(alias = "WKFL")]
149pub type Wkfl = crate::Reg<wkfl::WkflSpec>;
150#[doc = "Wake up Flags register"]
151pub mod wkfl;