max78000_pac/owm/
ctrl_stat.rs

1#[doc = "Register `CTRL_STAT` reader"]
2pub type R = crate::R<CtrlStatSpec>;
3#[doc = "Register `CTRL_STAT` writer"]
4pub type W = crate::W<CtrlStatSpec>;
5#[doc = "Field `start_ow_reset` reader - Start OW Reset."]
6pub type StartOwResetR = crate::BitReader;
7#[doc = "Field `start_ow_reset` writer - Start OW Reset."]
8pub type StartOwResetW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `sra_mode` reader - SRA Mode."]
10pub type SraModeR = crate::BitReader;
11#[doc = "Field `sra_mode` writer - SRA Mode."]
12pub type SraModeW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `bit_bang_oe` reader - Bit Bang Output Enable."]
14pub type BitBangOeR = crate::BitReader;
15#[doc = "Field `bit_bang_oe` writer - Bit Bang Output Enable."]
16pub type BitBangOeW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ow_input` reader - OW Input State."]
18pub type OwInputR = crate::BitReader;
19#[doc = "Field `od_spec_mode` reader - Overdrive Spec Mode."]
20pub type OdSpecModeR = crate::BitReader;
21#[doc = "Field `presence_detect` reader - Presence Pulse Detected."]
22pub type PresenceDetectR = crate::BitReader;
23impl R {
24    #[doc = "Bit 0 - Start OW Reset."]
25    #[inline(always)]
26    pub fn start_ow_reset(&self) -> StartOwResetR {
27        StartOwResetR::new((self.bits & 1) != 0)
28    }
29    #[doc = "Bit 1 - SRA Mode."]
30    #[inline(always)]
31    pub fn sra_mode(&self) -> SraModeR {
32        SraModeR::new(((self.bits >> 1) & 1) != 0)
33    }
34    #[doc = "Bit 2 - Bit Bang Output Enable."]
35    #[inline(always)]
36    pub fn bit_bang_oe(&self) -> BitBangOeR {
37        BitBangOeR::new(((self.bits >> 2) & 1) != 0)
38    }
39    #[doc = "Bit 3 - OW Input State."]
40    #[inline(always)]
41    pub fn ow_input(&self) -> OwInputR {
42        OwInputR::new(((self.bits >> 3) & 1) != 0)
43    }
44    #[doc = "Bit 4 - Overdrive Spec Mode."]
45    #[inline(always)]
46    pub fn od_spec_mode(&self) -> OdSpecModeR {
47        OdSpecModeR::new(((self.bits >> 4) & 1) != 0)
48    }
49    #[doc = "Bit 7 - Presence Pulse Detected."]
50    #[inline(always)]
51    pub fn presence_detect(&self) -> PresenceDetectR {
52        PresenceDetectR::new(((self.bits >> 7) & 1) != 0)
53    }
54}
55impl W {
56    #[doc = "Bit 0 - Start OW Reset."]
57    #[inline(always)]
58    pub fn start_ow_reset(&mut self) -> StartOwResetW<CtrlStatSpec> {
59        StartOwResetW::new(self, 0)
60    }
61    #[doc = "Bit 1 - SRA Mode."]
62    #[inline(always)]
63    pub fn sra_mode(&mut self) -> SraModeW<CtrlStatSpec> {
64        SraModeW::new(self, 1)
65    }
66    #[doc = "Bit 2 - Bit Bang Output Enable."]
67    #[inline(always)]
68    pub fn bit_bang_oe(&mut self) -> BitBangOeW<CtrlStatSpec> {
69        BitBangOeW::new(self, 2)
70    }
71}
72#[doc = "1-Wire Master Control/Status.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_stat::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_stat::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
73pub struct CtrlStatSpec;
74impl crate::RegisterSpec for CtrlStatSpec {
75    type Ux = u32;
76}
77#[doc = "`read()` method returns [`ctrl_stat::R`](R) reader structure"]
78impl crate::Readable for CtrlStatSpec {}
79#[doc = "`write(|w| ..)` method takes [`ctrl_stat::W`](W) writer structure"]
80impl crate::Writable for CtrlStatSpec {
81    type Safety = crate::Unsafe;
82    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
83    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
84}
85#[doc = "`reset()` method sets CTRL_STAT to value 0"]
86impl crate::Resettable for CtrlStatSpec {
87    const RESET_VALUE: u32 = 0;
88}
max78000_pac/owm/ctrl_stat.rs

max78000_pac/owm/
ctrl_stat.rs
