max78000_pac/dvs/
stat.rs

1#[doc = "Register `STAT` reader"]
2pub type R = crate::R<StatSpec>;
3#[doc = "Register `STAT` writer"]
4pub type W = crate::W<StatSpec>;
5#[doc = "Field `DVS_STATE` reader - State machine state"]
6pub type DvsStateR = crate::FieldReader;
7#[doc = "Field `DVS_STATE` writer - State machine state"]
8pub type DvsStateW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
9#[doc = "Field `ADJ_UP_ENA` reader - DVS Raising voltage"]
10pub type AdjUpEnaR = crate::BitReader;
11#[doc = "Field `ADJ_UP_ENA` writer - DVS Raising voltage"]
12pub type AdjUpEnaW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `ADJ_DWN_ENA` reader - DVS Lowering voltage"]
14pub type AdjDwnEnaR = crate::BitReader;
15#[doc = "Field `ADJ_DWN_ENA` writer - DVS Lowering voltage"]
16pub type AdjDwnEnaW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ADJ_ACTIVE` reader - Adjustment to a Direct Voltage"]
18pub type AdjActiveR = crate::BitReader;
19#[doc = "Field `ADJ_ACTIVE` writer - Adjustment to a Direct Voltage"]
20pub type AdjActiveW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `CTR_TAP_OK` reader - Tap Enabled and the Tap is withing Hi/Low limits"]
22pub type CtrTapOkR = crate::BitReader;
23#[doc = "Field `CTR_TAP_OK` writer - Tap Enabled and the Tap is withing Hi/Low limits"]
24pub type CtrTapOkW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CTR_TAP_SEL` reader - Status of selected center tap delay line detect output"]
26pub type CtrTapSelR = crate::BitReader;
27#[doc = "Field `CTR_TAP_SEL` writer - Status of selected center tap delay line detect output"]
28pub type CtrTapSelW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `SLOW_TRIP_DET` reader - Provides the current combined status of all selected Low Range delay lines"]
30pub type SlowTripDetR = crate::BitReader;
31#[doc = "Field `SLOW_TRIP_DET` writer - Provides the current combined status of all selected Low Range delay lines"]
32pub type SlowTripDetW<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `FAST_TRIP_DET` reader - Provides the current combined status of all selected High Range delay lines"]
34pub type FastTripDetR = crate::BitReader;
35#[doc = "Field `FAST_TRIP_DET` writer - Provides the current combined status of all selected High Range delay lines"]
36pub type FastTripDetW<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `PS_IN_RANGE` reader - Indicates if the power supply is in range"]
38pub type PsInRangeR = crate::BitReader;
39#[doc = "Field `PS_IN_RANGE` writer - Indicates if the power supply is in range"]
40pub type PsInRangeW<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `PS_VCNTR` reader - Voltage Count value sent to the power supply"]
42pub type PsVcntrR = crate::FieldReader;
43#[doc = "Field `PS_VCNTR` writer - Voltage Count value sent to the power supply"]
44pub type PsVcntrW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
45#[doc = "Field `MON_DLY_OK` reader - Indicates the monitor delay count is at 0"]
46pub type MonDlyOkR = crate::BitReader;
47#[doc = "Field `MON_DLY_OK` writer - Indicates the monitor delay count is at 0"]
48pub type MonDlyOkW<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `ADJ_DLY_OK` reader - Indicates the adjustment delay count is at 0"]
50pub type AdjDlyOkR = crate::BitReader;
51#[doc = "Field `ADJ_DLY_OK` writer - Indicates the adjustment delay count is at 0"]
52pub type AdjDlyOkW<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `LO_LIMIT_DET` reader - Power supply voltage counter is at low limit"]
54pub type LoLimitDetR = crate::BitReader;
55#[doc = "Field `LO_LIMIT_DET` writer - Power supply voltage counter is at low limit"]
56pub type LoLimitDetW<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `HI_LIMIT_DET` reader - Power supply voltage counter is at high limit"]
58pub type HiLimitDetR = crate::BitReader;
59#[doc = "Field `HI_LIMIT_DET` writer - Power supply voltage counter is at high limit"]
60pub type HiLimitDetW<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `VALID_TAP` reader - At least one delay line has been enabled"]
62pub type ValidTapR = crate::BitReader;
63#[doc = "Field `VALID_TAP` writer - At least one delay line has been enabled"]
64pub type ValidTapW<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `LIMIT_ERR` reader - Interrupt flag that indicates a voltage count is at/beyond manufacturer limits"]
66pub type LimitErrR = crate::BitReader;
67#[doc = "Field `LIMIT_ERR` writer - Interrupt flag that indicates a voltage count is at/beyond manufacturer limits"]
68pub type LimitErrW<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `RANGE_ERR` reader - Interrupt flag that indicates a tap has an invalid value"]
70pub type RangeErrR = crate::BitReader;
71#[doc = "Field `RANGE_ERR` writer - Interrupt flag that indicates a tap has an invalid value"]
72pub type RangeErrW<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `ADJ_ERR` reader - Interrupt flag that indicates up and down adjustment requested simultaneously"]
74pub type AdjErrR = crate::BitReader;
75#[doc = "Field `ADJ_ERR` writer - Interrupt flag that indicates up and down adjustment requested simultaneously"]
76pub type AdjErrW<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `REF_SEL_ERR` reader - Indicates the ref select register bit is out of range"]
78pub type RefSelErrR = crate::BitReader;
79#[doc = "Field `REF_SEL_ERR` writer - Indicates the ref select register bit is out of range"]
80pub type RefSelErrW<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `FB_TO_ERR` reader - Interrupt flag that indicates a timeout while adjusting the voltage"]
82pub type FbToErrR = crate::BitReader;
83#[doc = "Field `FB_TO_ERR` writer - Interrupt flag that indicates a timeout while adjusting the voltage"]
84pub type FbToErrW<'a, REG> = crate::BitWriter<'a, REG>;
85#[doc = "Field `FB_TO_ERR_S` reader - Interrupt flag that mirror FB_TO_ERR and is write one clear"]
86pub type FbToErrSR = crate::BitReader;
87#[doc = "Field `FB_TO_ERR_S` writer - Interrupt flag that mirror FB_TO_ERR and is write one clear"]
88pub type FbToErrSW<'a, REG> = crate::BitWriter<'a, REG>;
89#[doc = "Field `FC_LV_DET_INT` reader - Interrupt flag that indicates the power supply voltage requested is below the low threshold"]
90pub type FcLvDetIntR = crate::BitReader;
91#[doc = "Field `FC_LV_DET_INT` writer - Interrupt flag that indicates the power supply voltage requested is below the low threshold"]
92pub type FcLvDetIntW<'a, REG> = crate::BitWriter<'a, REG>;
93#[doc = "Field `FC_LV_DET_S` reader - Interrupt flag that mirrors FC_LV_DET_INT"]
94pub type FcLvDetSR = crate::BitReader;
95#[doc = "Field `FC_LV_DET_S` writer - Interrupt flag that mirrors FC_LV_DET_INT"]
96pub type FcLvDetSW<'a, REG> = crate::BitWriter<'a, REG>;
97impl R {
98    #[doc = "Bits 0:3 - State machine state"]
99    #[inline(always)]
100    pub fn dvs_state(&self) -> DvsStateR {
101        DvsStateR::new((self.bits & 0x0f) as u8)
102    }
103    #[doc = "Bit 4 - DVS Raising voltage"]
104    #[inline(always)]
105    pub fn adj_up_ena(&self) -> AdjUpEnaR {
106        AdjUpEnaR::new(((self.bits >> 4) & 1) != 0)
107    }
108    #[doc = "Bit 5 - DVS Lowering voltage"]
109    #[inline(always)]
110    pub fn adj_dwn_ena(&self) -> AdjDwnEnaR {
111        AdjDwnEnaR::new(((self.bits >> 5) & 1) != 0)
112    }
113    #[doc = "Bit 6 - Adjustment to a Direct Voltage"]
114    #[inline(always)]
115    pub fn adj_active(&self) -> AdjActiveR {
116        AdjActiveR::new(((self.bits >> 6) & 1) != 0)
117    }
118    #[doc = "Bit 7 - Tap Enabled and the Tap is withing Hi/Low limits"]
119    #[inline(always)]
120    pub fn ctr_tap_ok(&self) -> CtrTapOkR {
121        CtrTapOkR::new(((self.bits >> 7) & 1) != 0)
122    }
123    #[doc = "Bit 8 - Status of selected center tap delay line detect output"]
124    #[inline(always)]
125    pub fn ctr_tap_sel(&self) -> CtrTapSelR {
126        CtrTapSelR::new(((self.bits >> 8) & 1) != 0)
127    }
128    #[doc = "Bit 9 - Provides the current combined status of all selected Low Range delay lines"]
129    #[inline(always)]
130    pub fn slow_trip_det(&self) -> SlowTripDetR {
131        SlowTripDetR::new(((self.bits >> 9) & 1) != 0)
132    }
133    #[doc = "Bit 10 - Provides the current combined status of all selected High Range delay lines"]
134    #[inline(always)]
135    pub fn fast_trip_det(&self) -> FastTripDetR {
136        FastTripDetR::new(((self.bits >> 10) & 1) != 0)
137    }
138    #[doc = "Bit 11 - Indicates if the power supply is in range"]
139    #[inline(always)]
140    pub fn ps_in_range(&self) -> PsInRangeR {
141        PsInRangeR::new(((self.bits >> 11) & 1) != 0)
142    }
143    #[doc = "Bits 12:18 - Voltage Count value sent to the power supply"]
144    #[inline(always)]
145    pub fn ps_vcntr(&self) -> PsVcntrR {
146        PsVcntrR::new(((self.bits >> 12) & 0x7f) as u8)
147    }
148    #[doc = "Bit 19 - Indicates the monitor delay count is at 0"]
149    #[inline(always)]
150    pub fn mon_dly_ok(&self) -> MonDlyOkR {
151        MonDlyOkR::new(((self.bits >> 19) & 1) != 0)
152    }
153    #[doc = "Bit 20 - Indicates the adjustment delay count is at 0"]
154    #[inline(always)]
155    pub fn adj_dly_ok(&self) -> AdjDlyOkR {
156        AdjDlyOkR::new(((self.bits >> 20) & 1) != 0)
157    }
158    #[doc = "Bit 21 - Power supply voltage counter is at low limit"]
159    #[inline(always)]
160    pub fn lo_limit_det(&self) -> LoLimitDetR {
161        LoLimitDetR::new(((self.bits >> 21) & 1) != 0)
162    }
163    #[doc = "Bit 22 - Power supply voltage counter is at high limit"]
164    #[inline(always)]
165    pub fn hi_limit_det(&self) -> HiLimitDetR {
166        HiLimitDetR::new(((self.bits >> 22) & 1) != 0)
167    }
168    #[doc = "Bit 23 - At least one delay line has been enabled"]
169    #[inline(always)]
170    pub fn valid_tap(&self) -> ValidTapR {
171        ValidTapR::new(((self.bits >> 23) & 1) != 0)
172    }
173    #[doc = "Bit 24 - Interrupt flag that indicates a voltage count is at/beyond manufacturer limits"]
174    #[inline(always)]
175    pub fn limit_err(&self) -> LimitErrR {
176        LimitErrR::new(((self.bits >> 24) & 1) != 0)
177    }
178    #[doc = "Bit 25 - Interrupt flag that indicates a tap has an invalid value"]
179    #[inline(always)]
180    pub fn range_err(&self) -> RangeErrR {
181        RangeErrR::new(((self.bits >> 25) & 1) != 0)
182    }
183    #[doc = "Bit 26 - Interrupt flag that indicates up and down adjustment requested simultaneously"]
184    #[inline(always)]
185    pub fn adj_err(&self) -> AdjErrR {
186        AdjErrR::new(((self.bits >> 26) & 1) != 0)
187    }
188    #[doc = "Bit 27 - Indicates the ref select register bit is out of range"]
189    #[inline(always)]
190    pub fn ref_sel_err(&self) -> RefSelErrR {
191        RefSelErrR::new(((self.bits >> 27) & 1) != 0)
192    }
193    #[doc = "Bit 28 - Interrupt flag that indicates a timeout while adjusting the voltage"]
194    #[inline(always)]
195    pub fn fb_to_err(&self) -> FbToErrR {
196        FbToErrR::new(((self.bits >> 28) & 1) != 0)
197    }
198    #[doc = "Bit 29 - Interrupt flag that mirror FB_TO_ERR and is write one clear"]
199    #[inline(always)]
200    pub fn fb_to_err_s(&self) -> FbToErrSR {
201        FbToErrSR::new(((self.bits >> 29) & 1) != 0)
202    }
203    #[doc = "Bit 30 - Interrupt flag that indicates the power supply voltage requested is below the low threshold"]
204    #[inline(always)]
205    pub fn fc_lv_det_int(&self) -> FcLvDetIntR {
206        FcLvDetIntR::new(((self.bits >> 30) & 1) != 0)
207    }
208    #[doc = "Bit 31 - Interrupt flag that mirrors FC_LV_DET_INT"]
209    #[inline(always)]
210    pub fn fc_lv_det_s(&self) -> FcLvDetSR {
211        FcLvDetSR::new(((self.bits >> 31) & 1) != 0)
212    }
213}
214impl W {
215    #[doc = "Bits 0:3 - State machine state"]
216    #[inline(always)]
217    pub fn dvs_state(&mut self) -> DvsStateW<StatSpec> {
218        DvsStateW::new(self, 0)
219    }
220    #[doc = "Bit 4 - DVS Raising voltage"]
221    #[inline(always)]
222    pub fn adj_up_ena(&mut self) -> AdjUpEnaW<StatSpec> {
223        AdjUpEnaW::new(self, 4)
224    }
225    #[doc = "Bit 5 - DVS Lowering voltage"]
226    #[inline(always)]
227    pub fn adj_dwn_ena(&mut self) -> AdjDwnEnaW<StatSpec> {
228        AdjDwnEnaW::new(self, 5)
229    }
230    #[doc = "Bit 6 - Adjustment to a Direct Voltage"]
231    #[inline(always)]
232    pub fn adj_active(&mut self) -> AdjActiveW<StatSpec> {
233        AdjActiveW::new(self, 6)
234    }
235    #[doc = "Bit 7 - Tap Enabled and the Tap is withing Hi/Low limits"]
236    #[inline(always)]
237    pub fn ctr_tap_ok(&mut self) -> CtrTapOkW<StatSpec> {
238        CtrTapOkW::new(self, 7)
239    }
240    #[doc = "Bit 8 - Status of selected center tap delay line detect output"]
241    #[inline(always)]
242    pub fn ctr_tap_sel(&mut self) -> CtrTapSelW<StatSpec> {
243        CtrTapSelW::new(self, 8)
244    }
245    #[doc = "Bit 9 - Provides the current combined status of all selected Low Range delay lines"]
246    #[inline(always)]
247    pub fn slow_trip_det(&mut self) -> SlowTripDetW<StatSpec> {
248        SlowTripDetW::new(self, 9)
249    }
250    #[doc = "Bit 10 - Provides the current combined status of all selected High Range delay lines"]
251    #[inline(always)]
252    pub fn fast_trip_det(&mut self) -> FastTripDetW<StatSpec> {
253        FastTripDetW::new(self, 10)
254    }
255    #[doc = "Bit 11 - Indicates if the power supply is in range"]
256    #[inline(always)]
257    pub fn ps_in_range(&mut self) -> PsInRangeW<StatSpec> {
258        PsInRangeW::new(self, 11)
259    }
260    #[doc = "Bits 12:18 - Voltage Count value sent to the power supply"]
261    #[inline(always)]
262    pub fn ps_vcntr(&mut self) -> PsVcntrW<StatSpec> {
263        PsVcntrW::new(self, 12)
264    }
265    #[doc = "Bit 19 - Indicates the monitor delay count is at 0"]
266    #[inline(always)]
267    pub fn mon_dly_ok(&mut self) -> MonDlyOkW<StatSpec> {
268        MonDlyOkW::new(self, 19)
269    }
270    #[doc = "Bit 20 - Indicates the adjustment delay count is at 0"]
271    #[inline(always)]
272    pub fn adj_dly_ok(&mut self) -> AdjDlyOkW<StatSpec> {
273        AdjDlyOkW::new(self, 20)
274    }
275    #[doc = "Bit 21 - Power supply voltage counter is at low limit"]
276    #[inline(always)]
277    pub fn lo_limit_det(&mut self) -> LoLimitDetW<StatSpec> {
278        LoLimitDetW::new(self, 21)
279    }
280    #[doc = "Bit 22 - Power supply voltage counter is at high limit"]
281    #[inline(always)]
282    pub fn hi_limit_det(&mut self) -> HiLimitDetW<StatSpec> {
283        HiLimitDetW::new(self, 22)
284    }
285    #[doc = "Bit 23 - At least one delay line has been enabled"]
286    #[inline(always)]
287    pub fn valid_tap(&mut self) -> ValidTapW<StatSpec> {
288        ValidTapW::new(self, 23)
289    }
290    #[doc = "Bit 24 - Interrupt flag that indicates a voltage count is at/beyond manufacturer limits"]
291    #[inline(always)]
292    pub fn limit_err(&mut self) -> LimitErrW<StatSpec> {
293        LimitErrW::new(self, 24)
294    }
295    #[doc = "Bit 25 - Interrupt flag that indicates a tap has an invalid value"]
296    #[inline(always)]
297    pub fn range_err(&mut self) -> RangeErrW<StatSpec> {
298        RangeErrW::new(self, 25)
299    }
300    #[doc = "Bit 26 - Interrupt flag that indicates up and down adjustment requested simultaneously"]
301    #[inline(always)]
302    pub fn adj_err(&mut self) -> AdjErrW<StatSpec> {
303        AdjErrW::new(self, 26)
304    }
305    #[doc = "Bit 27 - Indicates the ref select register bit is out of range"]
306    #[inline(always)]
307    pub fn ref_sel_err(&mut self) -> RefSelErrW<StatSpec> {
308        RefSelErrW::new(self, 27)
309    }
310    #[doc = "Bit 28 - Interrupt flag that indicates a timeout while adjusting the voltage"]
311    #[inline(always)]
312    pub fn fb_to_err(&mut self) -> FbToErrW<StatSpec> {
313        FbToErrW::new(self, 28)
314    }
315    #[doc = "Bit 29 - Interrupt flag that mirror FB_TO_ERR and is write one clear"]
316    #[inline(always)]
317    pub fn fb_to_err_s(&mut self) -> FbToErrSW<StatSpec> {
318        FbToErrSW::new(self, 29)
319    }
320    #[doc = "Bit 30 - Interrupt flag that indicates the power supply voltage requested is below the low threshold"]
321    #[inline(always)]
322    pub fn fc_lv_det_int(&mut self) -> FcLvDetIntW<StatSpec> {
323        FcLvDetIntW::new(self, 30)
324    }
325    #[doc = "Bit 31 - Interrupt flag that mirrors FC_LV_DET_INT"]
326    #[inline(always)]
327    pub fn fc_lv_det_s(&mut self) -> FcLvDetSW<StatSpec> {
328        FcLvDetSW::new(self, 31)
329    }
330}
331#[doc = "Status Fields\n\nYou can [`read`](crate::Reg::read) this register and get [`stat::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stat::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
332pub struct StatSpec;
333impl crate::RegisterSpec for StatSpec {
334    type Ux = u32;
335}
336#[doc = "`read()` method returns [`stat::R`](R) reader structure"]
337impl crate::Readable for StatSpec {}
338#[doc = "`write(|w| ..)` method takes [`stat::W`](W) writer structure"]
339impl crate::Writable for StatSpec {
340    type Safety = crate::Unsafe;
341    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
342    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
343}
344#[doc = "`reset()` method sets STAT to value 0"]
345impl crate::Resettable for StatSpec {
346    const RESET_VALUE: u32 = 0;
347}