max78000_pac/gcr/
sysie.rs

1#[doc = "Register `SYSIE` reader"]
2pub type R = crate::R<SysieSpec>;
3#[doc = "Register `SYSIE` writer"]
4pub type W = crate::W<SysieSpec>;
5#[doc = "ARM ICE Unlock Interrupt Enable.\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum Iceunlock {
8    #[doc = "0: disabled."]
9    Dis = 0,
10    #[doc = "1: enabled."]
11    En = 1,
12}
13impl From<Iceunlock> for bool {
14    #[inline(always)]
15    fn from(variant: Iceunlock) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `ICEUNLOCK` reader - ARM ICE Unlock Interrupt Enable."]
20pub type IceunlockR = crate::BitReader<Iceunlock>;
21impl IceunlockR {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> Iceunlock {
25        match self.bits {
26            false => Iceunlock::Dis,
27            true => Iceunlock::En,
28        }
29    }
30    #[doc = "disabled."]
31    #[inline(always)]
32    pub fn is_dis(&self) -> bool {
33        *self == Iceunlock::Dis
34    }
35    #[doc = "enabled."]
36    #[inline(always)]
37    pub fn is_en(&self) -> bool {
38        *self == Iceunlock::En
39    }
40}
41#[doc = "Field `ICEUNLOCK` writer - ARM ICE Unlock Interrupt Enable."]
42pub type IceunlockW<'a, REG> = crate::BitWriter<'a, REG, Iceunlock>;
43impl<'a, REG> IceunlockW<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "disabled."]
48    #[inline(always)]
49    pub fn dis(self) -> &'a mut crate::W<REG> {
50        self.variant(Iceunlock::Dis)
51    }
52    #[doc = "enabled."]
53    #[inline(always)]
54    pub fn en(self) -> &'a mut crate::W<REG> {
55        self.variant(Iceunlock::En)
56    }
57}
58impl R {
59    #[doc = "Bit 0 - ARM ICE Unlock Interrupt Enable."]
60    #[inline(always)]
61    pub fn iceunlock(&self) -> IceunlockR {
62        IceunlockR::new((self.bits & 1) != 0)
63    }
64}
65impl W {
66    #[doc = "Bit 0 - ARM ICE Unlock Interrupt Enable."]
67    #[inline(always)]
68    pub fn iceunlock(&mut self) -> IceunlockW<SysieSpec> {
69        IceunlockW::new(self, 0)
70    }
71}
72#[doc = "System Status Interrupt Enable Register.\n\nYou can [`read`](crate::Reg::read) this register and get [`sysie::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysie::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
73pub struct SysieSpec;
74impl crate::RegisterSpec for SysieSpec {
75    type Ux = u32;
76}
77#[doc = "`read()` method returns [`sysie::R`](R) reader structure"]
78impl crate::Readable for SysieSpec {}
79#[doc = "`write(|w| ..)` method takes [`sysie::W`](W) writer structure"]
80impl crate::Writable for SysieSpec {
81    type Safety = crate::Unsafe;
82    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
83    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
84}
85#[doc = "`reset()` method sets SYSIE to value 0"]
86impl crate::Resettable for SysieSpec {
87    const RESET_VALUE: u32 = 0;
88}
max78000_pac/gcr/sysie.rs

max78000_pac/gcr/
sysie.rs
