max78000_pac/gcr/
memctrl.rs

1#[doc = "Register `MEMCTRL` reader"]
2pub type R = crate::R<MemctrlSpec>;
3#[doc = "Register `MEMCTRL` writer"]
4pub type W = crate::W<MemctrlSpec>;
5#[doc = "Field `FWS` reader - Flash Wait State. These bits define the number of wait-state cycles per Flash data read access. Minimum wait state is 2."]
6pub type FwsR = crate::FieldReader;
7#[doc = "Field `FWS` writer - Flash Wait State. These bits define the number of wait-state cycles per Flash data read access. Minimum wait state is 2."]
8pub type FwsW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `SYSRAM0ECC` reader - SYSRAM0 ECC Select."]
10pub type Sysram0eccR = crate::BitReader;
11#[doc = "Field `SYSRAM0ECC` writer - SYSRAM0 ECC Select."]
12pub type Sysram0eccW<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bits 0:2 - Flash Wait State. These bits define the number of wait-state cycles per Flash data read access. Minimum wait state is 2."]
15    #[inline(always)]
16    pub fn fws(&self) -> FwsR {
17        FwsR::new((self.bits & 7) as u8)
18    }
19    #[doc = "Bit 16 - SYSRAM0 ECC Select."]
20    #[inline(always)]
21    pub fn sysram0ecc(&self) -> Sysram0eccR {
22        Sysram0eccR::new(((self.bits >> 16) & 1) != 0)
23    }
24}
25impl W {
26    #[doc = "Bits 0:2 - Flash Wait State. These bits define the number of wait-state cycles per Flash data read access. Minimum wait state is 2."]
27    #[inline(always)]
28    pub fn fws(&mut self) -> FwsW<MemctrlSpec> {
29        FwsW::new(self, 0)
30    }
31    #[doc = "Bit 16 - SYSRAM0 ECC Select."]
32    #[inline(always)]
33    pub fn sysram0ecc(&mut self) -> Sysram0eccW<MemctrlSpec> {
34        Sysram0eccW::new(self, 16)
35    }
36}
37#[doc = "Memory Clock Control Register.\n\nYou can [`read`](crate::Reg::read) this register and get [`memctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`memctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
38pub struct MemctrlSpec;
39impl crate::RegisterSpec for MemctrlSpec {
40    type Ux = u32;
41}
42#[doc = "`read()` method returns [`memctrl::R`](R) reader structure"]
43impl crate::Readable for MemctrlSpec {}
44#[doc = "`write(|w| ..)` method takes [`memctrl::W`](W) writer structure"]
45impl crate::Writable for MemctrlSpec {
46    type Safety = crate::Unsafe;
47    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
48    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
49}
50#[doc = "`reset()` method sets MEMCTRL to value 0"]
51impl crate::Resettable for MemctrlSpec {
52    const RESET_VALUE: u32 = 0;
53}
max78000_pac/gcr/memctrl.rs

max78000_pac/gcr/
memctrl.rs
