1#[doc = "Register `FCTRL0` reader"]
2pub type R = crate::R<Fctrl0Spec>;
3#[doc = "Register `FCTRL0` writer"]
4pub type W = crate::W<Fctrl0Spec>;
5#[doc = "I2C0 SDA Pad Deglitcher enable.\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum I2c0dgen0 {
8 #[doc = "0: Deglitcher disabled."]
9 Dis = 0,
10 #[doc = "1: Deglitcher enabled."]
11 En = 1,
12}
13impl From<I2c0dgen0> for bool {
14 #[inline(always)]
15 fn from(variant: I2c0dgen0) -> Self {
16 variant as u8 != 0
17 }
18}
19#[doc = "Field `I2C0DGEN0` reader - I2C0 SDA Pad Deglitcher enable."]
20pub type I2c0dgen0R = crate::BitReader<I2c0dgen0>;
21impl I2c0dgen0R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> I2c0dgen0 {
25 match self.bits {
26 false => I2c0dgen0::Dis,
27 true => I2c0dgen0::En,
28 }
29 }
30 #[doc = "Deglitcher disabled."]
31 #[inline(always)]
32 pub fn is_dis(&self) -> bool {
33 *self == I2c0dgen0::Dis
34 }
35 #[doc = "Deglitcher enabled."]
36 #[inline(always)]
37 pub fn is_en(&self) -> bool {
38 *self == I2c0dgen0::En
39 }
40}
41#[doc = "Field `I2C0DGEN0` writer - I2C0 SDA Pad Deglitcher enable."]
42pub type I2c0dgen0W<'a, REG> = crate::BitWriter<'a, REG, I2c0dgen0>;
43impl<'a, REG> I2c0dgen0W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "Deglitcher disabled."]
48 #[inline(always)]
49 pub fn dis(self) -> &'a mut crate::W<REG> {
50 self.variant(I2c0dgen0::Dis)
51 }
52 #[doc = "Deglitcher enabled."]
53 #[inline(always)]
54 pub fn en(self) -> &'a mut crate::W<REG> {
55 self.variant(I2c0dgen0::En)
56 }
57}
58#[doc = "I2C0 SCL Pad Deglitcher enable.\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum I2c0dgen1 {
61 #[doc = "0: Deglitcher disabled."]
62 Dis = 0,
63 #[doc = "1: Deglitcher enabled."]
64 En = 1,
65}
66impl From<I2c0dgen1> for bool {
67 #[inline(always)]
68 fn from(variant: I2c0dgen1) -> Self {
69 variant as u8 != 0
70 }
71}
72#[doc = "Field `I2C0DGEN1` reader - I2C0 SCL Pad Deglitcher enable."]
73pub type I2c0dgen1R = crate::BitReader<I2c0dgen1>;
74impl I2c0dgen1R {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub const fn variant(&self) -> I2c0dgen1 {
78 match self.bits {
79 false => I2c0dgen1::Dis,
80 true => I2c0dgen1::En,
81 }
82 }
83 #[doc = "Deglitcher disabled."]
84 #[inline(always)]
85 pub fn is_dis(&self) -> bool {
86 *self == I2c0dgen1::Dis
87 }
88 #[doc = "Deglitcher enabled."]
89 #[inline(always)]
90 pub fn is_en(&self) -> bool {
91 *self == I2c0dgen1::En
92 }
93}
94#[doc = "Field `I2C0DGEN1` writer - I2C0 SCL Pad Deglitcher enable."]
95pub type I2c0dgen1W<'a, REG> = crate::BitWriter<'a, REG, I2c0dgen1>;
96impl<'a, REG> I2c0dgen1W<'a, REG>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "Deglitcher disabled."]
101 #[inline(always)]
102 pub fn dis(self) -> &'a mut crate::W<REG> {
103 self.variant(I2c0dgen1::Dis)
104 }
105 #[doc = "Deglitcher enabled."]
106 #[inline(always)]
107 pub fn en(self) -> &'a mut crate::W<REG> {
108 self.variant(I2c0dgen1::En)
109 }
110}
111#[doc = "I2C1 SDA Pad Deglitcher enable.\n\nValue on reset: 0"]
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113pub enum I2c1dgen0 {
114 #[doc = "0: Deglitcher disabled."]
115 Dis = 0,
116 #[doc = "1: Deglitcher enabled."]
117 En = 1,
118}
119impl From<I2c1dgen0> for bool {
120 #[inline(always)]
121 fn from(variant: I2c1dgen0) -> Self {
122 variant as u8 != 0
123 }
124}
125#[doc = "Field `I2C1DGEN0` reader - I2C1 SDA Pad Deglitcher enable."]
126pub type I2c1dgen0R = crate::BitReader<I2c1dgen0>;
127impl I2c1dgen0R {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub const fn variant(&self) -> I2c1dgen0 {
131 match self.bits {
132 false => I2c1dgen0::Dis,
133 true => I2c1dgen0::En,
134 }
135 }
136 #[doc = "Deglitcher disabled."]
137 #[inline(always)]
138 pub fn is_dis(&self) -> bool {
139 *self == I2c1dgen0::Dis
140 }
141 #[doc = "Deglitcher enabled."]
142 #[inline(always)]
143 pub fn is_en(&self) -> bool {
144 *self == I2c1dgen0::En
145 }
146}
147#[doc = "Field `I2C1DGEN0` writer - I2C1 SDA Pad Deglitcher enable."]
148pub type I2c1dgen0W<'a, REG> = crate::BitWriter<'a, REG, I2c1dgen0>;
149impl<'a, REG> I2c1dgen0W<'a, REG>
150where
151 REG: crate::Writable + crate::RegisterSpec,
152{
153 #[doc = "Deglitcher disabled."]
154 #[inline(always)]
155 pub fn dis(self) -> &'a mut crate::W<REG> {
156 self.variant(I2c1dgen0::Dis)
157 }
158 #[doc = "Deglitcher enabled."]
159 #[inline(always)]
160 pub fn en(self) -> &'a mut crate::W<REG> {
161 self.variant(I2c1dgen0::En)
162 }
163}
164#[doc = "I2C1 SCL Pad Deglitcher enable.\n\nValue on reset: 0"]
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166pub enum I2c1dgen1 {
167 #[doc = "0: Deglitcher disabled."]
168 Dis = 0,
169 #[doc = "1: Deglitcher enabled."]
170 En = 1,
171}
172impl From<I2c1dgen1> for bool {
173 #[inline(always)]
174 fn from(variant: I2c1dgen1) -> Self {
175 variant as u8 != 0
176 }
177}
178#[doc = "Field `I2C1DGEN1` reader - I2C1 SCL Pad Deglitcher enable."]
179pub type I2c1dgen1R = crate::BitReader<I2c1dgen1>;
180impl I2c1dgen1R {
181 #[doc = "Get enumerated values variant"]
182 #[inline(always)]
183 pub const fn variant(&self) -> I2c1dgen1 {
184 match self.bits {
185 false => I2c1dgen1::Dis,
186 true => I2c1dgen1::En,
187 }
188 }
189 #[doc = "Deglitcher disabled."]
190 #[inline(always)]
191 pub fn is_dis(&self) -> bool {
192 *self == I2c1dgen1::Dis
193 }
194 #[doc = "Deglitcher enabled."]
195 #[inline(always)]
196 pub fn is_en(&self) -> bool {
197 *self == I2c1dgen1::En
198 }
199}
200#[doc = "Field `I2C1DGEN1` writer - I2C1 SCL Pad Deglitcher enable."]
201pub type I2c1dgen1W<'a, REG> = crate::BitWriter<'a, REG, I2c1dgen1>;
202impl<'a, REG> I2c1dgen1W<'a, REG>
203where
204 REG: crate::Writable + crate::RegisterSpec,
205{
206 #[doc = "Deglitcher disabled."]
207 #[inline(always)]
208 pub fn dis(self) -> &'a mut crate::W<REG> {
209 self.variant(I2c1dgen1::Dis)
210 }
211 #[doc = "Deglitcher enabled."]
212 #[inline(always)]
213 pub fn en(self) -> &'a mut crate::W<REG> {
214 self.variant(I2c1dgen1::En)
215 }
216}
217#[doc = "I2C2 SDA Pad Deglitcher enable.\n\nValue on reset: 0"]
218#[derive(Clone, Copy, Debug, PartialEq, Eq)]
219pub enum I2c2dgen0 {
220 #[doc = "0: Deglitcher disabled."]
221 Dis = 0,
222 #[doc = "1: Deglitcher enabled."]
223 En = 1,
224}
225impl From<I2c2dgen0> for bool {
226 #[inline(always)]
227 fn from(variant: I2c2dgen0) -> Self {
228 variant as u8 != 0
229 }
230}
231#[doc = "Field `I2C2DGEN0` reader - I2C2 SDA Pad Deglitcher enable."]
232pub type I2c2dgen0R = crate::BitReader<I2c2dgen0>;
233impl I2c2dgen0R {
234 #[doc = "Get enumerated values variant"]
235 #[inline(always)]
236 pub const fn variant(&self) -> I2c2dgen0 {
237 match self.bits {
238 false => I2c2dgen0::Dis,
239 true => I2c2dgen0::En,
240 }
241 }
242 #[doc = "Deglitcher disabled."]
243 #[inline(always)]
244 pub fn is_dis(&self) -> bool {
245 *self == I2c2dgen0::Dis
246 }
247 #[doc = "Deglitcher enabled."]
248 #[inline(always)]
249 pub fn is_en(&self) -> bool {
250 *self == I2c2dgen0::En
251 }
252}
253#[doc = "Field `I2C2DGEN0` writer - I2C2 SDA Pad Deglitcher enable."]
254pub type I2c2dgen0W<'a, REG> = crate::BitWriter<'a, REG, I2c2dgen0>;
255impl<'a, REG> I2c2dgen0W<'a, REG>
256where
257 REG: crate::Writable + crate::RegisterSpec,
258{
259 #[doc = "Deglitcher disabled."]
260 #[inline(always)]
261 pub fn dis(self) -> &'a mut crate::W<REG> {
262 self.variant(I2c2dgen0::Dis)
263 }
264 #[doc = "Deglitcher enabled."]
265 #[inline(always)]
266 pub fn en(self) -> &'a mut crate::W<REG> {
267 self.variant(I2c2dgen0::En)
268 }
269}
270#[doc = "I2C2 SCL Pad Deglitcher enable.\n\nValue on reset: 0"]
271#[derive(Clone, Copy, Debug, PartialEq, Eq)]
272pub enum I2c2dgen1 {
273 #[doc = "0: Deglitcher disabled."]
274 Dis = 0,
275 #[doc = "1: Deglitcher enabled."]
276 En = 1,
277}
278impl From<I2c2dgen1> for bool {
279 #[inline(always)]
280 fn from(variant: I2c2dgen1) -> Self {
281 variant as u8 != 0
282 }
283}
284#[doc = "Field `I2C2DGEN1` reader - I2C2 SCL Pad Deglitcher enable."]
285pub type I2c2dgen1R = crate::BitReader<I2c2dgen1>;
286impl I2c2dgen1R {
287 #[doc = "Get enumerated values variant"]
288 #[inline(always)]
289 pub const fn variant(&self) -> I2c2dgen1 {
290 match self.bits {
291 false => I2c2dgen1::Dis,
292 true => I2c2dgen1::En,
293 }
294 }
295 #[doc = "Deglitcher disabled."]
296 #[inline(always)]
297 pub fn is_dis(&self) -> bool {
298 *self == I2c2dgen1::Dis
299 }
300 #[doc = "Deglitcher enabled."]
301 #[inline(always)]
302 pub fn is_en(&self) -> bool {
303 *self == I2c2dgen1::En
304 }
305}
306#[doc = "Field `I2C2DGEN1` writer - I2C2 SCL Pad Deglitcher enable."]
307pub type I2c2dgen1W<'a, REG> = crate::BitWriter<'a, REG, I2c2dgen1>;
308impl<'a, REG> I2c2dgen1W<'a, REG>
309where
310 REG: crate::Writable + crate::RegisterSpec,
311{
312 #[doc = "Deglitcher disabled."]
313 #[inline(always)]
314 pub fn dis(self) -> &'a mut crate::W<REG> {
315 self.variant(I2c2dgen1::Dis)
316 }
317 #[doc = "Deglitcher enabled."]
318 #[inline(always)]
319 pub fn en(self) -> &'a mut crate::W<REG> {
320 self.variant(I2c2dgen1::En)
321 }
322}
323impl R {
324 #[doc = "Bit 20 - I2C0 SDA Pad Deglitcher enable."]
325 #[inline(always)]
326 pub fn i2c0dgen0(&self) -> I2c0dgen0R {
327 I2c0dgen0R::new(((self.bits >> 20) & 1) != 0)
328 }
329 #[doc = "Bit 21 - I2C0 SCL Pad Deglitcher enable."]
330 #[inline(always)]
331 pub fn i2c0dgen1(&self) -> I2c0dgen1R {
332 I2c0dgen1R::new(((self.bits >> 21) & 1) != 0)
333 }
334 #[doc = "Bit 22 - I2C1 SDA Pad Deglitcher enable."]
335 #[inline(always)]
336 pub fn i2c1dgen0(&self) -> I2c1dgen0R {
337 I2c1dgen0R::new(((self.bits >> 22) & 1) != 0)
338 }
339 #[doc = "Bit 23 - I2C1 SCL Pad Deglitcher enable."]
340 #[inline(always)]
341 pub fn i2c1dgen1(&self) -> I2c1dgen1R {
342 I2c1dgen1R::new(((self.bits >> 23) & 1) != 0)
343 }
344 #[doc = "Bit 24 - I2C2 SDA Pad Deglitcher enable."]
345 #[inline(always)]
346 pub fn i2c2dgen0(&self) -> I2c2dgen0R {
347 I2c2dgen0R::new(((self.bits >> 24) & 1) != 0)
348 }
349 #[doc = "Bit 25 - I2C2 SCL Pad Deglitcher enable."]
350 #[inline(always)]
351 pub fn i2c2dgen1(&self) -> I2c2dgen1R {
352 I2c2dgen1R::new(((self.bits >> 25) & 1) != 0)
353 }
354}
355impl W {
356 #[doc = "Bit 20 - I2C0 SDA Pad Deglitcher enable."]
357 #[inline(always)]
358 pub fn i2c0dgen0(&mut self) -> I2c0dgen0W<Fctrl0Spec> {
359 I2c0dgen0W::new(self, 20)
360 }
361 #[doc = "Bit 21 - I2C0 SCL Pad Deglitcher enable."]
362 #[inline(always)]
363 pub fn i2c0dgen1(&mut self) -> I2c0dgen1W<Fctrl0Spec> {
364 I2c0dgen1W::new(self, 21)
365 }
366 #[doc = "Bit 22 - I2C1 SDA Pad Deglitcher enable."]
367 #[inline(always)]
368 pub fn i2c1dgen0(&mut self) -> I2c1dgen0W<Fctrl0Spec> {
369 I2c1dgen0W::new(self, 22)
370 }
371 #[doc = "Bit 23 - I2C1 SCL Pad Deglitcher enable."]
372 #[inline(always)]
373 pub fn i2c1dgen1(&mut self) -> I2c1dgen1W<Fctrl0Spec> {
374 I2c1dgen1W::new(self, 23)
375 }
376 #[doc = "Bit 24 - I2C2 SDA Pad Deglitcher enable."]
377 #[inline(always)]
378 pub fn i2c2dgen0(&mut self) -> I2c2dgen0W<Fctrl0Spec> {
379 I2c2dgen0W::new(self, 24)
380 }
381 #[doc = "Bit 25 - I2C2 SCL Pad Deglitcher enable."]
382 #[inline(always)]
383 pub fn i2c2dgen1(&mut self) -> I2c2dgen1W<Fctrl0Spec> {
384 I2c2dgen1W::new(self, 25)
385 }
386}
387#[doc = "Function Control 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`fctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
388pub struct Fctrl0Spec;
389impl crate::RegisterSpec for Fctrl0Spec {
390 type Ux = u32;
391}
392#[doc = "`read()` method returns [`fctrl0::R`](R) reader structure"]
393impl crate::Readable for Fctrl0Spec {}
394#[doc = "`write(|w| ..)` method takes [`fctrl0::W`](W) writer structure"]
395impl crate::Writable for Fctrl0Spec {
396 type Safety = crate::Unsafe;
397 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
398 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
399}
400#[doc = "`reset()` method sets FCTRL0 to value 0"]
401impl crate::Resettable for Fctrl0Spec {
402 const RESET_VALUE: u32 = 0;
403}