1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CtrlSpec>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CtrlSpec>;
5#[doc = "Field `EN` reader - CRC Enable"]
6pub type EnR = crate::BitReader;
7#[doc = "Field `EN` writer - CRC Enable"]
8pub type EnW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DMA_EN` reader - DMA Request Enable"]
10pub type DmaEnR = crate::BitReader;
11#[doc = "Field `DMA_EN` writer - DMA Request Enable"]
12pub type DmaEnW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `MSB` reader - MSB Select"]
14pub type MsbR = crate::BitReader;
15#[doc = "Field `MSB` writer - MSB Select"]
16pub type MsbW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `BYTE_SWAP_IN` reader - Byte Swap CRC Data Input"]
18pub type ByteSwapInR = crate::BitReader;
19#[doc = "Field `BYTE_SWAP_IN` writer - Byte Swap CRC Data Input"]
20pub type ByteSwapInW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BYTE_SWAP_OUT` reader - Byte Swap CRC Value Output"]
22pub type ByteSwapOutR = crate::BitReader;
23#[doc = "Field `BYTE_SWAP_OUT` writer - Byte Swap CRC Value Output"]
24pub type ByteSwapOutW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `BUSY` reader - CRC Busy"]
26pub type BusyR = crate::BitReader;
27#[doc = "Field `BUSY` writer - CRC Busy"]
28pub type BusyW<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30 #[doc = "Bit 0 - CRC Enable"]
31 #[inline(always)]
32 pub fn en(&self) -> EnR {
33 EnR::new((self.bits & 1) != 0)
34 }
35 #[doc = "Bit 1 - DMA Request Enable"]
36 #[inline(always)]
37 pub fn dma_en(&self) -> DmaEnR {
38 DmaEnR::new(((self.bits >> 1) & 1) != 0)
39 }
40 #[doc = "Bit 2 - MSB Select"]
41 #[inline(always)]
42 pub fn msb(&self) -> MsbR {
43 MsbR::new(((self.bits >> 2) & 1) != 0)
44 }
45 #[doc = "Bit 3 - Byte Swap CRC Data Input"]
46 #[inline(always)]
47 pub fn byte_swap_in(&self) -> ByteSwapInR {
48 ByteSwapInR::new(((self.bits >> 3) & 1) != 0)
49 }
50 #[doc = "Bit 4 - Byte Swap CRC Value Output"]
51 #[inline(always)]
52 pub fn byte_swap_out(&self) -> ByteSwapOutR {
53 ByteSwapOutR::new(((self.bits >> 4) & 1) != 0)
54 }
55 #[doc = "Bit 16 - CRC Busy"]
56 #[inline(always)]
57 pub fn busy(&self) -> BusyR {
58 BusyR::new(((self.bits >> 16) & 1) != 0)
59 }
60}
61impl W {
62 #[doc = "Bit 0 - CRC Enable"]
63 #[inline(always)]
64 pub fn en(&mut self) -> EnW<CtrlSpec> {
65 EnW::new(self, 0)
66 }
67 #[doc = "Bit 1 - DMA Request Enable"]
68 #[inline(always)]
69 pub fn dma_en(&mut self) -> DmaEnW<CtrlSpec> {
70 DmaEnW::new(self, 1)
71 }
72 #[doc = "Bit 2 - MSB Select"]
73 #[inline(always)]
74 pub fn msb(&mut self) -> MsbW<CtrlSpec> {
75 MsbW::new(self, 2)
76 }
77 #[doc = "Bit 3 - Byte Swap CRC Data Input"]
78 #[inline(always)]
79 pub fn byte_swap_in(&mut self) -> ByteSwapInW<CtrlSpec> {
80 ByteSwapInW::new(self, 3)
81 }
82 #[doc = "Bit 4 - Byte Swap CRC Value Output"]
83 #[inline(always)]
84 pub fn byte_swap_out(&mut self) -> ByteSwapOutW<CtrlSpec> {
85 ByteSwapOutW::new(self, 4)
86 }
87 #[doc = "Bit 16 - CRC Busy"]
88 #[inline(always)]
89 pub fn busy(&mut self) -> BusyW<CtrlSpec> {
90 BusyW::new(self, 16)
91 }
92}
93#[doc = "CRC Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
94pub struct CtrlSpec;
95impl crate::RegisterSpec for CtrlSpec {
96 type Ux = u32;
97}
98#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
99impl crate::Readable for CtrlSpec {}
100#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
101impl crate::Writable for CtrlSpec {
102 type Safety = crate::Unsafe;
103 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
104 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
105}
106#[doc = "`reset()` method sets CTRL to value 0"]
107impl crate::Resettable for CtrlSpec {
108 const RESET_VALUE: u32 = 0;
109}