max32660_pac/gpio0/
out_en_set.rs1#[doc = "Register `OUT_EN_SET` reader"]
2pub struct R(crate::R<OUT_EN_SET_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<OUT_EN_SET_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<OUT_EN_SET_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<OUT_EN_SET_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `OUT_EN_SET` writer"]
17pub struct W(crate::W<OUT_EN_SET_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<OUT_EN_SET_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<OUT_EN_SET_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<OUT_EN_SET_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `ALL` reader - Mask of all of the pins on the port."]
38pub struct ALL_R(crate::FieldReader<u32, u32>);
39impl ALL_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: u32) -> Self {
42 ALL_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for ALL_R {
46 type Target = crate::FieldReader<u32, u32>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `ALL` writer - Mask of all of the pins on the port."]
53pub struct ALL_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> ALL_W<'a> {
57 #[doc = r"Writes raw bits to the field"]
58 #[inline(always)]
59 pub unsafe fn bits(self, value: u32) -> &'a mut W {
60 self.w.bits = value;
61 self.w
62 }
63}
64impl R {
65 #[doc = "Bits 0:31 - Mask of all of the pins on the port."]
66 #[inline(always)]
67 pub fn all(&self) -> ALL_R {
68 ALL_R::new(self.bits)
69 }
70}
71impl W {
72 #[doc = "Bits 0:31 - Mask of all of the pins on the port."]
73 #[inline(always)]
74 pub fn all(&mut self) -> ALL_W {
75 ALL_W { w: self }
76 }
77 #[doc = "Writes raw bits to the register."]
78 #[inline(always)]
79 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
80 self.0.bits(bits);
81 self
82 }
83}
84#[doc = "GPIO Output Enable Set Function Enable Register. Writing a 1 to one or more bits in this register sets the bits in the same positions in GPIO_OUT_EN to 1, without affecting other bits in that register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [out_en_set](index.html) module"]
85pub struct OUT_EN_SET_SPEC;
86impl crate::RegisterSpec for OUT_EN_SET_SPEC {
87 type Ux = u32;
88}
89#[doc = "`read()` method returns [out_en_set::R](R) reader structure"]
90impl crate::Readable for OUT_EN_SET_SPEC {
91 type Reader = R;
92}
93#[doc = "`write(|w| ..)` method takes [out_en_set::W](W) writer structure"]
94impl crate::Writable for OUT_EN_SET_SPEC {
95 type Writer = W;
96}
97#[doc = "`reset()` method sets OUT_EN_SET to value 0"]
98impl crate::Resettable for OUT_EN_SET_SPEC {
99 #[inline(always)]
100 fn reset_value() -> Self::Ux {
101 0
102 }
103}