max3263x/ioman/
uart0_req.rs1#[doc = "Register `UART0_REQ` reader"]
2pub struct R(crate::R<UART0_REQ_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<UART0_REQ_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<UART0_REQ_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<UART0_REQ_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `UART0_REQ` writer"]
17pub struct W(crate::W<UART0_REQ_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<UART0_REQ_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<UART0_REQ_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<UART0_REQ_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `io_map` reader - UART0 TX/RX I/O Mapping Select"]
38pub type IO_MAP_R = crate::BitReader<bool>;
39#[doc = "Field `io_map` writer - UART0 TX/RX I/O Mapping Select"]
40pub type IO_MAP_W<'a> = crate::BitWriter<'a, u32, UART0_REQ_SPEC, bool, 0>;
41#[doc = "Field `cts_map` reader - UART0 CTS I/O Mapping Select"]
42pub type CTS_MAP_R = crate::BitReader<bool>;
43#[doc = "Field `cts_map` writer - UART0 CTS I/O Mapping Select"]
44pub type CTS_MAP_W<'a> = crate::BitWriter<'a, u32, UART0_REQ_SPEC, bool, 1>;
45#[doc = "Field `rts_map` reader - UART0 RTS I/O Mapping Select"]
46pub type RTS_MAP_R = crate::BitReader<bool>;
47#[doc = "Field `rts_map` writer - UART0 RTS I/O Mapping Select"]
48pub type RTS_MAP_W<'a> = crate::BitWriter<'a, u32, UART0_REQ_SPEC, bool, 2>;
49#[doc = "Field `io_req` reader - UART0 TX/RX I/O Request"]
50pub type IO_REQ_R = crate::BitReader<bool>;
51#[doc = "Field `io_req` writer - UART0 TX/RX I/O Request"]
52pub type IO_REQ_W<'a> = crate::BitWriter<'a, u32, UART0_REQ_SPEC, bool, 4>;
53#[doc = "Field `cts_io_req` reader - UART0 CTS I/O Request"]
54pub type CTS_IO_REQ_R = crate::BitReader<bool>;
55#[doc = "Field `cts_io_req` writer - UART0 CTS I/O Request"]
56pub type CTS_IO_REQ_W<'a> = crate::BitWriter<'a, u32, UART0_REQ_SPEC, bool, 5>;
57#[doc = "Field `rts_io_req` reader - UART0 RTS I/O Request"]
58pub type RTS_IO_REQ_R = crate::BitReader<bool>;
59#[doc = "Field `rts_io_req` writer - UART0 RTS I/O Request"]
60pub type RTS_IO_REQ_W<'a> = crate::BitWriter<'a, u32, UART0_REQ_SPEC, bool, 6>;
61impl R {
62 #[doc = "Bit 0 - UART0 TX/RX I/O Mapping Select"]
63 #[inline(always)]
64 pub fn io_map(&self) -> IO_MAP_R {
65 IO_MAP_R::new((self.bits & 1) != 0)
66 }
67 #[doc = "Bit 1 - UART0 CTS I/O Mapping Select"]
68 #[inline(always)]
69 pub fn cts_map(&self) -> CTS_MAP_R {
70 CTS_MAP_R::new(((self.bits >> 1) & 1) != 0)
71 }
72 #[doc = "Bit 2 - UART0 RTS I/O Mapping Select"]
73 #[inline(always)]
74 pub fn rts_map(&self) -> RTS_MAP_R {
75 RTS_MAP_R::new(((self.bits >> 2) & 1) != 0)
76 }
77 #[doc = "Bit 4 - UART0 TX/RX I/O Request"]
78 #[inline(always)]
79 pub fn io_req(&self) -> IO_REQ_R {
80 IO_REQ_R::new(((self.bits >> 4) & 1) != 0)
81 }
82 #[doc = "Bit 5 - UART0 CTS I/O Request"]
83 #[inline(always)]
84 pub fn cts_io_req(&self) -> CTS_IO_REQ_R {
85 CTS_IO_REQ_R::new(((self.bits >> 5) & 1) != 0)
86 }
87 #[doc = "Bit 6 - UART0 RTS I/O Request"]
88 #[inline(always)]
89 pub fn rts_io_req(&self) -> RTS_IO_REQ_R {
90 RTS_IO_REQ_R::new(((self.bits >> 6) & 1) != 0)
91 }
92}
93impl W {
94 #[doc = "Bit 0 - UART0 TX/RX I/O Mapping Select"]
95 #[inline(always)]
96 pub fn io_map(&mut self) -> IO_MAP_W {
97 IO_MAP_W::new(self)
98 }
99 #[doc = "Bit 1 - UART0 CTS I/O Mapping Select"]
100 #[inline(always)]
101 pub fn cts_map(&mut self) -> CTS_MAP_W {
102 CTS_MAP_W::new(self)
103 }
104 #[doc = "Bit 2 - UART0 RTS I/O Mapping Select"]
105 #[inline(always)]
106 pub fn rts_map(&mut self) -> RTS_MAP_W {
107 RTS_MAP_W::new(self)
108 }
109 #[doc = "Bit 4 - UART0 TX/RX I/O Request"]
110 #[inline(always)]
111 pub fn io_req(&mut self) -> IO_REQ_W {
112 IO_REQ_W::new(self)
113 }
114 #[doc = "Bit 5 - UART0 CTS I/O Request"]
115 #[inline(always)]
116 pub fn cts_io_req(&mut self) -> CTS_IO_REQ_W {
117 CTS_IO_REQ_W::new(self)
118 }
119 #[doc = "Bit 6 - UART0 RTS I/O Request"]
120 #[inline(always)]
121 pub fn rts_io_req(&mut self) -> RTS_IO_REQ_W {
122 RTS_IO_REQ_W::new(self)
123 }
124 #[doc = "Writes raw bits to the register."]
125 #[inline(always)]
126 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
127 self.0.bits(bits);
128 self
129 }
130}
131#[doc = "UART0 I/O Mode Request\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart0_req](index.html) module"]
132pub struct UART0_REQ_SPEC;
133impl crate::RegisterSpec for UART0_REQ_SPEC {
134 type Ux = u32;
135}
136#[doc = "`read()` method returns [uart0_req::R](R) reader structure"]
137impl crate::Readable for UART0_REQ_SPEC {
138 type Reader = R;
139}
140#[doc = "`write(|w| ..)` method takes [uart0_req::W](W) writer structure"]
141impl crate::Writable for UART0_REQ_SPEC {
142 type Writer = W;
143}
144#[doc = "`reset()` method sets UART0_REQ to value 0"]
145impl crate::Resettable for UART0_REQ_SPEC {
146 #[inline(always)]
147 fn reset_value() -> Self::Ux {
148 0
149 }
150}