max3263x/flc/
fckdiv.rs

1#[doc = "Register `FCKDIV` reader"]
2pub struct R(crate::R<FCKDIV_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FCKDIV_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FCKDIV_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FCKDIV_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FCKDIV` writer"]
17pub struct W(crate::W<FCKDIV_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FCKDIV_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FCKDIV_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FCKDIV_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `fckdiv` reader - Flash Clock Pulse Divisor"]
38pub type FCKDIV_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `fckdiv` writer - Flash Clock Pulse Divisor"]
40pub type FCKDIV_W<'a> = crate::FieldWriter<'a, u32, FCKDIV_SPEC, u8, u8, 7, 0>;
41#[doc = "Field `auto_fckdiv_result` reader - Auto FCKDIV Calculation Result"]
42pub type AUTO_FCKDIV_RESULT_R = crate::FieldReader<u16, u16>;
43impl R {
44    #[doc = "Bits 0:6 - Flash Clock Pulse Divisor"]
45    #[inline(always)]
46    pub fn fckdiv(&self) -> FCKDIV_R {
47        FCKDIV_R::new((self.bits & 0x7f) as u8)
48    }
49    #[doc = "Bits 16:31 - Auto FCKDIV Calculation Result"]
50    #[inline(always)]
51    pub fn auto_fckdiv_result(&self) -> AUTO_FCKDIV_RESULT_R {
52        AUTO_FCKDIV_RESULT_R::new(((self.bits >> 16) & 0xffff) as u16)
53    }
54}
55impl W {
56    #[doc = "Bits 0:6 - Flash Clock Pulse Divisor"]
57    #[inline(always)]
58    pub fn fckdiv(&mut self) -> FCKDIV_W {
59        FCKDIV_W::new(self)
60    }
61    #[doc = "Writes raw bits to the register."]
62    #[inline(always)]
63    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
64        self.0.bits(bits);
65        self
66    }
67}
68#[doc = "Flash Clock Pulse Divisor\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fckdiv](index.html) module"]
69pub struct FCKDIV_SPEC;
70impl crate::RegisterSpec for FCKDIV_SPEC {
71    type Ux = u32;
72}
73#[doc = "`read()` method returns [fckdiv::R](R) reader structure"]
74impl crate::Readable for FCKDIV_SPEC {
75    type Reader = R;
76}
77#[doc = "`write(|w| ..)` method takes [fckdiv::W](W) writer structure"]
78impl crate::Writable for FCKDIV_SPEC {
79    type Writer = W;
80}
81#[doc = "`reset()` method sets FCKDIV to value 0"]
82impl crate::Resettable for FCKDIV_SPEC {
83    #[inline(always)]
84    fn reset_value() -> Self::Ux {
85        0
86    }
87}
max3263x/flc/fckdiv.rs

max3263x/flc/
fckdiv.rs
