Struct max32630_svd::spim0::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub mstr_cfg: MSTR_CFG,
    pub ss_sr_polarity: SS_SR_POLARITY,
    pub gen_ctrl: GEN_CTRL,
    pub fifo_ctrl: FIFO_CTRL,
    pub spcl_ctrl: SPCL_CTRL,
    pub intfl: INTFL,
    pub inten: INTEN,
}

Register block

Fields

mstr_cfg: MSTR_CFG

0x00 - SPI Master Configuration Register

ss_sr_polarity: SS_SR_POLARITY

0x04 - Polarity Control for SS and SR Signals

gen_ctrl: GEN_CTRL

0x08 - SPI Master General Control Register

fifo_ctrl: FIFO_CTRL

0x0c - SPI Master FIFO Control Register

spcl_ctrl: SPCL_CTRL

0x10 - SPI Master Special Mode Controls

intfl: INTFL

0x14 - SPI Master Interrupt Flags

inten: INTEN

0x18 - SPI Master Interrupt Enable/Disable Settings