Struct max32630_svd::flc::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub faddr: FADDR,
    pub fckdiv: FCKDIV,
    pub ctrl: CTRL,
    pub intr: INTR,
    pub fdata: FDATA,
    pub perform: PERFORM,
    pub tacc: TACC,
    pub tprog: TPROG,
    pub status: STATUS,
    pub security: SECURITY,
    pub bypass: BYPASS,
    pub user_option: USER_OPTION,
    pub ctrl2: CTRL2,
    pub intfl1: INTFL1,
    pub inten1: INTEN1,
    pub bl_ctrl: BL_CTRL,
    pub twk_cycl_cnt: TWK_CYCL_CNT,
    pub pdm33: PDM33,
    pub slm: SLM,
    pub disable_xr0: DISABLE_XR0,
    pub disable_xr1: DISABLE_XR1,
    pub disable_xr2: DISABLE_XR2,
    pub disable_xr3: DISABLE_XR3,
    pub disable_xr4: DISABLE_XR4,
    pub disable_xr5: DISABLE_XR5,
    pub disable_xr6: DISABLE_XR6,
    pub disable_xr7: DISABLE_XR7,
    pub disable_we0: DISABLE_WE0,
    pub disable_we1: DISABLE_WE1,
    pub disable_we2: DISABLE_WE2,
    pub disable_we3: DISABLE_WE3,
    pub disable_we4: DISABLE_WE4,
    pub disable_we5: DISABLE_WE5,
    pub disable_we6: DISABLE_WE6,
    pub disable_we7: DISABLE_WE7,
    // some fields omitted
}

Register block

Fields

faddr: FADDR

0x00 - Flash Operation Address

fckdiv: FCKDIV

0x04 - Flash Clock Pulse Divisor

ctrl: CTRL

0x08 - Flash Control Register

intr: INTR

0x24 - Flash Controller Interrupt Flags and Enable/Disable 0

fdata: FDATA

0x30 - Flash Operation Data Register

perform: PERFORM

0x50 - Flash Performance Settings

tacc: TACC

0x54 - Flash Read Cycle Config

tprog: TPROG

0x58 - Flash Write Cycle Config

status: STATUS

0x80 - Security Status Flags

security: SECURITY

0x88 - Flash Controller Security Settings

bypass: BYPASS

0x9c - Status Flags for DSB Operations

user_option: USER_OPTION

0x100 - Used to set DSB Access code and Auto-Lock in info block

ctrl2: CTRL2

0x140 - Flash Control Register 2

intfl1: INTFL1

0x144 - Interrupt Flags Register 1

inten1: INTEN1

0x148 - Interrupt Enable/Disable Register 1

bl_ctrl: BL_CTRL

0x170 - Bootloader Control Register

twk_cycl_cnt: TWK_CYCL_CNT

0x174 - Cycle Count Tweak Register

pdm33: PDM33

0x178 - PDM33 Register

slm: SLM

0x17c - Sleep Mode Register

disable_xr0: DISABLE_XR0

0x200 - Disable Flash Page Exec/Read Register 0

disable_xr1: DISABLE_XR1

0x204 - Disable Flash Page Exec/Read Register 1

disable_xr2: DISABLE_XR2

0x208 - Disable Flash Page Exec/Read Register 2

disable_xr3: DISABLE_XR3

0x20c - Disable Flash Page Exec/Read Register 3

disable_xr4: DISABLE_XR4

0x210 - Disable Flash Page Exec/Read Register 4

disable_xr5: DISABLE_XR5

0x214 - Disable Flash Page Exec/Read Register 5

disable_xr6: DISABLE_XR6

0x218 - Disable Flash Page Exec/Read Register 6

disable_xr7: DISABLE_XR7

0x21c - Disable Flash Page Exec/Read Register 7

disable_we0: DISABLE_WE0

0x300 - Disable Flash Page Write/Erase Register 0

disable_we1: DISABLE_WE1

0x304 - Disable Flash Page Write/Erase Register 1

disable_we2: DISABLE_WE2

0x308 - Disable Flash Page Write/Erase Register 2

disable_we3: DISABLE_WE3

0x30c - Disable Flash Page Write/Erase Register 3

disable_we4: DISABLE_WE4

0x310 - Disable Flash Page Write/Erase Register 4

disable_we5: DISABLE_WE5

0x314 - Disable Flash Page Write/Erase Register 5

disable_we6: DISABLE_WE6

0x318 - Disable Flash Page Write/Erase Register 6

disable_we7: DISABLE_WE7

0x31c - Disable Flash Page Write/Erase Register 7