maikor_platform/
ops.rs

1pub const NOP: u8 = 0x00;
2pub const HALT: u8 = 0x01;
3pub const CALL_ADDR: u8 = 0x02;
4pub const CALL_REG: u8 = 0x03;
5pub const RET: u8 = 0x04;
6pub const RETI: u8 = 0x05;
7pub const SWAP_REG_REG_BYTE: u8 = 0x06;
8pub const SWAP_REG_REG_WORD: u8 = 0x07;
9pub const MEM_CPY_ADDR_ADDR_BYTE: u8 = 0x08;
10pub const MEM_CPY_ADDR_REG_BYTE: u8 = 0x09;
11pub const MEM_CPY_REG_ADDR_BYTE: u8 = 0x0A;
12pub const MEM_CPY_REG_REG_BYTE: u8 = 0x0B;
13pub const MEM_CPY_ADDR_ADDR_REG: u8 = 0x0C;
14pub const MEM_CPY_ADDR_REG_REG: u8 = 0x0D;
15pub const MEM_CPY_REG_ADDR_REG: u8 = 0x0E;
16pub const MEM_CPY_REG_REG_REG: u8 = 0x0F;
17
18pub const CPY_REG_REG_BYTE: u8 = 0x10;
19pub const CPY_REG_REG_WORD: u8 = 0x11;
20pub const CPY_ADDR_REG_BYTE: u8 = 0x12;
21pub const CPY_ADDR_REG_WORD: u8 = 0x13;
22pub const CPY_REG_ADDR_BYTE: u8 = 0x14;
23pub const CPY_REG_ADDR_WORD: u8 = 0x15;
24pub const CPY_ADDR_ADDR_BYTE: u8 = 0x16;
25pub const CPY_ADDR_ADDR_WORD: u8 = 0x17;
26pub const CPY_REG_NUM_BYTE: u8 = 0x18;
27pub const CPY_REG_NUM_WORD: u8 = 0x19;
28pub const CPY_ADDR_NUM_BYTE: u8 = 0x1A;
29pub const CPY_ADDR_NUM_WORD: u8 = 0x1B;
30pub const CMP_REG_ADDR_BYTE: u8 = 0x1C;
31pub const CMP_REG_ADDR_WORD: u8 = 0x1D;
32pub const CMPS_REG_ADDR_BYTE: u8 = 0x1E;
33pub const CMPS_REG_ADDR_WORD: u8 = 0x1F;
34
35pub const ADD_REG_REG_BYTE: u8 = 0x20;
36pub const ADD_REG_REG_WORD: u8 = 0x21;
37pub const ADD_REG_NUM_BYTE: u8 = 0x22;
38pub const ADD_REG_NUM_WORD: u8 = 0x23;
39pub const ADD_REG_ADDR_BYTE: u8 = 0x24;
40pub const ADD_REG_ADDR_WORD: u8 = 0x25;
41pub const ADD_ADDR_REG_BYTE: u8 = 0x26;
42pub const ADD_ADDR_REG_WORD: u8 = 0x27;
43pub const ADD_ADDR_NUM_BYTE: u8 = 0x28;
44pub const ADD_ADDR_NUM_WORD: u8 = 0x29;
45pub const ADD_ADDR_ADDR_BYTE: u8 = 0x2A;
46pub const ADD_ADDR_ADDR_WORD: u8 = 0x2B;
47pub const INC_REG_BYTE: u8 = 0x2C;
48pub const INC_REG_WORD: u8 = 0x2D;
49pub const INC_ADDR_BYTE: u8 = 0x2E;
50pub const INC_ADDR_WORD: u8 = 0x2F;
51
52pub const SUB_REG_REG_BYTE: u8 = 0x30;
53pub const SUB_REG_REG_WORD: u8 = 0x31;
54pub const SUB_REG_NUM_BYTE: u8 = 0x32;
55pub const SUB_REG_NUM_WORD: u8 = 0x33;
56pub const SUB_REG_ADDR_BYTE: u8 = 0x34;
57pub const SUB_REG_ADDR_WORD: u8 = 0x35;
58pub const SUB_ADDR_REG_BYTE: u8 = 0x36;
59pub const SUB_ADDR_REG_WORD: u8 = 0x37;
60pub const SUB_ADDR_NUM_BYTE: u8 = 0x38;
61pub const SUB_ADDR_NUM_WORD: u8 = 0x39;
62pub const SUB_ADDR_ADDR_BYTE: u8 = 0x3A;
63pub const SUB_ADDR_ADDR_WORD: u8 = 0x3B;
64pub const DEC_REG_BYTE: u8 = 0x3C;
65pub const DEC_REG_WORD: u8 = 0x3D;
66pub const DEC_ADDR_BYTE: u8 = 0x3E;
67pub const DEC_ADDR_WORD: u8 = 0x3F;
68
69pub const NOT_REG_BYTE: u8 = 0x40;
70pub const NOT_REG_WORD: u8 = 0x41;
71pub const OR_REG_REG_BYTE: u8 = 0x42;
72pub const OR_REG_REG_WORD: u8 = 0x43;
73pub const OR_REG_NUM_BYTE: u8 = 0x44;
74pub const OR_REG_NUM_WORD: u8 = 0x45;
75pub const XOR_REG_REG_BYTE: u8 = 0x46;
76pub const XOR_REG_REG_WORD: u8 = 0x47;
77pub const XOR_REG_NUM_BYTE: u8 = 0x48;
78pub const XOR_REG_NUM_WORD: u8 = 0x49;
79pub const AND_REG_REG_BYTE: u8 = 0x4A;
80pub const AND_REG_REG_WORD: u8 = 0x4B;
81pub const AND_REG_NUM_BYTE: u8 = 0x4C;
82pub const AND_REG_NUM_WORD: u8 = 0x4D;
83pub const JRF_BYTE: u8 = 0x4E;
84pub const JRB_BYTE: u8 = 0x4F;
85
86pub const ASL_REG_NUM_BYTE: u8 = 0x50;
87pub const ASL_REG_NUM_WORD: u8 = 0x51;
88pub const ASL_REG_REG_BYTE: u8 = 0x52;
89pub const ASL_REG_REG_WORD: u8 = 0x53;
90pub const ASL_ADDR_BYTE: u8 = 0x54;
91pub const ASL_ADDR_WORD: u8 = 0x55;
92pub const ASR_REG_NUM_BYTE: u8 = 0x56;
93pub const ASR_REG_NUM_WORD: u8 = 0x57;
94pub const ASR_REG_REG_BYTE: u8 = 0x58;
95pub const ASR_REG_REG_WORD: u8 = 0x59;
96pub const ASR_ADDR_BYTE: u8 = 0x5A;
97pub const ASR_ADDR_WORD: u8 = 0x5B;
98pub const LSR_REG_NUM_BYTE: u8 = 0x5C;
99pub const LSR_REG_NUM_WORD: u8 = 0x5D;
100pub const LSR_REG_REG_BYTE: u8 = 0x5E;
101pub const LSR_REG_REG_WORD: u8 = 0x5F;
102pub const LSR_ADDR_BYTE: u8 = 0x60;
103pub const LSR_ADDR_WORD: u8 = 0x61;
104pub const ROL_REG_NUM_BYTE: u8 = 0x62;
105pub const ROL_REG_NUM_WORD: u8 = 0x63;
106pub const ROL_REG_REG_BYTE: u8 = 0x64;
107pub const ROL_REG_REG_WORD: u8 = 0x65;
108pub const ROL_ADDR_BYTE: u8 = 0x66;
109pub const ROL_ADDR_WORD: u8 = 0x67;
110pub const ROR_REG_NUM_BYTE: u8 = 0x68;
111pub const ROR_REG_NUM_WORD: u8 = 0x69;
112pub const ROR_REG_REG_BYTE: u8 = 0x6A;
113pub const ROR_REG_REG_WORD: u8 = 0x6B;
114pub const ROR_ADDR_BYTE: u8 = 0x6C;
115pub const ROR_ADDR_WORD: u8 = 0x6D;
116//unused 2 0x6E - 0x6F
117
118pub const PUSH_REG_BYTE: u8 = 0x70;
119pub const PUSH_REG_WORD: u8 = 0x72;
120pub const PUSH_NUM_BYTE: u8 = 0x71;
121pub const PUSH_NUM_WORD: u8 = 0x73;
122pub const POP_REG_BYTE: u8 = 0x74;
123pub const POP_REG_WORD: u8 = 0x75;
124pub const MSWP_REG_REG_REG: u8 = 0x76;
125pub const MSWP_REG_REG_BYTE: u8 = 0x77;
126pub const MSWP_REG_ADDR_REG: u8 = 0x78;
127pub const MSWP_REG_ADDR_BYTE: u8 = 0x79;
128pub const MSWP_ADDR_REG_REG: u8 = 0x7A;
129pub const MSWP_ADDR_REG_BYTE: u8 = 0x7B;
130pub const MSWP_ADDR_ADDR_BYTE: u8 = 0x7C;
131pub const MSWP_ADDR_ADDR_REG: u8 = 0x7D;
132//unused 2 0x7E - 0x7F
133
134pub const MUL_REG_REG_BYTE: u8 = 0x80;
135pub const MUL_REG_REG_WORD: u8 = 0x81;
136pub const MUL_REG_NUM_BYTE: u8 = 0x82;
137pub const MUL_REG_NUM_WORD: u8 = 0x83;
138pub const MUL_REG_ADDR_BYTE: u8 = 0x84;
139pub const MUL_REG_ADDR_WORD: u8 = 0x85;
140pub const MUL_ADDR_REG_BYTE: u8 = 0x86;
141pub const MUL_ADDR_REG_WORD: u8 = 0x87;
142pub const MUL_ADDR_NUM_BYTE: u8 = 0x88;
143pub const MUL_ADDR_NUM_WORD: u8 = 0x89;
144pub const MUL_ADDR_ADDR_BYTE: u8 = 0x8A;
145pub const MUL_ADDR_ADDR_WORD: u8 = 0x8B;
146pub const MULS_REG_REG_BYTE: u8 = 0x8C;
147pub const MULS_REG_REG_WORD: u8 = 0x8D;
148pub const MULS_REG_NUM_BYTE: u8 = 0x8E;
149pub const MULS_REG_NUM_WORD: u8 = 0x8F;
150pub const MULS_REG_ADDR_BYTE: u8 = 0x90;
151pub const MULS_REG_ADDR_WORD: u8 = 0x91;
152pub const MULS_ADDR_REG_BYTE: u8 = 0x92;
153pub const MULS_ADDR_REG_WORD: u8 = 0x93;
154pub const MULS_ADDR_NUM_BYTE: u8 = 0x94;
155pub const MULS_ADDR_NUM_WORD: u8 = 0x95;
156pub const MULS_ADDR_ADDR_BYTE: u8 = 0x96;
157pub const MULS_ADDR_ADDR_WORD: u8 = 0x97;
158pub const DIV_REG_REG_BYTE: u8 = 0x98;
159pub const DIV_REG_REG_WORD: u8 = 0x99;
160pub const DIV_REG_NUM_BYTE: u8 = 0x9A;
161pub const DIV_REG_NUM_WORD: u8 = 0x9B;
162pub const DIV_REG_ADDR_BYTE: u8 = 0x9C;
163pub const DIV_REG_ADDR_WORD: u8 = 0x9D;
164pub const DIV_ADDR_REG_BYTE: u8 = 0x9E;
165pub const DIV_ADDR_REG_WORD: u8 = 0x9F;
166pub const DIV_ADDR_NUM_BYTE: u8 = 0xA0;
167pub const DIV_ADDR_NUM_WORD: u8 = 0xA1;
168pub const DIV_ADDR_ADDR_BYTE: u8 = 0xA2;
169pub const DIV_ADDR_ADDR_WORD: u8 = 0xA3;
170pub const DIVS_REG_REG_BYTE: u8 = 0xA4;
171pub const DIVS_REG_REG_WORD: u8 = 0xA5;
172pub const DIVS_REG_NUM_BYTE: u8 = 0xA6;
173pub const DIVS_REG_NUM_WORD: u8 = 0xA7;
174pub const DIVS_REG_ADDR_BYTE: u8 = 0xA8;
175pub const DIVS_REG_ADDR_WORD: u8 = 0xA9;
176pub const DIVS_ADDR_REG_BYTE: u8 = 0xAA;
177pub const DIVS_ADDR_REG_WORD: u8 = 0xAB;
178pub const DIVS_ADDR_NUM_BYTE: u8 = 0xAC;
179pub const DIVS_ADDR_NUM_WORD: u8 = 0xAD;
180pub const DIVS_ADDR_ADDR_BYTE: u8 = 0xAE;
181pub const DIVS_ADDR_ADDR_WORD: u8 = 0xAF;
182
183pub const JMP_ADDR: u8 = 0xB0;
184pub const JMP_REG: u8 = 0xB1;
185pub const JE_ADDR: u8 = 0xB2;
186pub const JE_REG: u8 = 0xB3;
187pub const JNE_ADDR: u8 = 0xB4;
188pub const JNE_REG: u8 = 0xB5;
189pub const JL_ADDR: u8 = 0xB6;
190pub const JL_REG: u8 = 0xB7;
191pub const JG_ADDR: u8 = 0xB8;
192pub const JG_REG: u8 = 0xB9;
193pub const JLE_ADDR: u8 = 0xBA;
194pub const JLE_REG: u8 = 0xBB;
195pub const JGE_ADDR: u8 = 0xBC;
196pub const JGE_REG: u8 = 0xBD;
197//unused 2 0xBE - 0xBF
198
199pub const CMP_REG_NUM_BYTE: u8 = 0xC0;
200pub const CMP_REG_NUM_WORD: u8 = 0xC1;
201pub const CMP_REG_REG_BYTE: u8 = 0xC2;
202pub const CMP_REG_REG_WORD: u8 = 0xC3;
203pub const CMPS_REG_NUM_BYTE: u8 = 0xC4;
204pub const CMPS_REG_NUM_WORD: u8 = 0xC5;
205pub const CMPS_REG_REG_BYTE: u8 = 0xC6;
206pub const CMPS_REG_REG_WORD: u8 = 0xC7;
207pub const JBC_REG_REG: u8 = 0xC8;
208pub const JBS_REG_REG: u8 = 0xC9;
209pub const JBC_ADDR_REG: u8 = 0xCA;
210pub const JBS_ADDR_REG: u8 = 0xCB;
211pub const JBC_REG_NUM: u8 = 0xCC;
212pub const JBS_REG_NUM: u8 = 0xCD;
213pub const JBC_ADDR_NUM: u8 = 0xCE;
214pub const JBS_ADDR_NUM: u8 = 0xCF;
215
216pub const RCL_REG_NUM_BYTE: u8 = 0xD0;
217pub const RCL_REG_NUM_WORD: u8 = 0xD1;
218pub const RCL_REG_REG_BYTE: u8 = 0xD2;
219pub const RCL_REG_REG_WORD: u8 = 0xD3;
220pub const RCL_ADDR_BYTE: u8 = 0xD4;
221pub const RCL_ADDR_WORD: u8 = 0xD5;
222pub const RCR_REG_NUM_BYTE: u8 = 0xD6;
223pub const RCR_REG_NUM_WORD: u8 = 0xD7;
224pub const RCR_REG_REG_BYTE: u8 = 0xD8;
225pub const RCR_REG_REG_WORD: u8 = 0xD9;
226pub const RCR_ADDR_BYTE: u8 = 0xDA;
227pub const RCR_ADDR_WORD: u8 = 0xDB;
228//unused 4 0xDC - 0xDF
229
230pub const ADDC_REG_REG_BYTE: u8 = 0xE0;
231pub const ADDC_REG_REG_WORD: u8 = 0xE1;
232pub const ADDC_REG_NUM_BYTE: u8 = 0xE2;
233pub const ADDC_REG_NUM_WORD: u8 = 0xE3;
234pub const ADDC_REG_ADDR_BYTE: u8 = 0xE4;
235pub const ADDC_REG_ADDR_WORD: u8 = 0xE5;
236pub const ADDC_ADDR_REG_BYTE: u8 = 0xE6;
237pub const ADDC_ADDR_REG_WORD: u8 = 0xE7;
238pub const ADDC_ADDR_NUM_BYTE: u8 = 0xE8;
239pub const ADDC_ADDR_NUM_WORD: u8 = 0xE9;
240pub const ADDC_ADDR_ADDR_BYTE: u8 = 0xEA;
241pub const ADDC_ADDR_ADDR_WORD: u8 = 0xEB;
242pub const SUBC_REG_REG_BYTE: u8 = 0xEC;
243pub const SUBC_REG_REG_WORD: u8 = 0xED;
244pub const SUBC_REG_NUM_BYTE: u8 = 0xEE;
245pub const SUBC_REG_NUM_WORD: u8 = 0xEF;
246pub const SUBC_REG_ADDR_BYTE: u8 = 0xF0;
247pub const SUBC_REG_ADDR_WORD: u8 = 0xF1;
248pub const SUBC_ADDR_REG_BYTE: u8 = 0xF2;
249pub const SUBC_ADDR_REG_WORD: u8 = 0xF3;
250pub const SUBC_ADDR_NUM_BYTE: u8 = 0xF4;
251pub const SUBC_ADDR_NUM_WORD: u8 = 0xF5;
252pub const SUBC_ADDR_ADDR_BYTE: u8 = 0xF6;
253pub const SUBC_ADDR_ADDR_WORD: u8 = 0xF7;
254pub const BMUL_ADDR_ADDR: u8 = 0xF8;
255pub const BMUL_ADDR_NUM: u8 = 0xF9;
256pub const BMUL_ADDR_REG: u8 = 0xFA;
257pub const BMUL_REG_ADDR: u8 = 0xFB;
258pub const BMUL_REG_NUM: u8 = 0xFC;
259pub const BMUL_REG_REG: u8 = 0xFD;
260
261pub const EHALT: u8 = 0xFE;
262pub const SLEEP: u8 = 0xFF;
263
264///List of ops that MUST affect PC
265/// This means that they unconditionally set PC
266/// however they might set to it's current value
267/// (e.g. if the whole program was 'JMP $0')
268pub const MUST_JMP_OPS: [u8; 8] = [
269    JMP_REG, JMP_ADDR, CALL_ADDR, CALL_REG, RET, RETI, JRF_BYTE, JRB_BYTE,
270];
271
272///List of ops that MAY affect PC
273pub const MAY_JMP_OPS: [u8; 20] = [
274    JL_REG,
275    JL_ADDR,
276    JLE_REG,
277    JLE_ADDR,
278    JG_REG,
279    JG_ADDR,
280    JGE_REG,
281    JGE_ADDR,
282    JE_REG,
283    JE_ADDR,
284    JNE_REG,
285    JNE_ADDR,
286    JBS_REG_REG,
287    JBS_REG_NUM,
288    JBS_ADDR_REG,
289    JBS_ADDR_NUM,
290    JBC_REG_REG,
291    JBC_REG_NUM,
292    JBC_ADDR_REG,
293    JBC_ADDR_NUM,
294];
295
296#[rustfmt::skip]
297pub const ALL: [u8; 246] = [
298    NOP, HALT,
299    CALL_ADDR, CALL_REG, RET, RETI,
300    CPY_REG_REG_BYTE, CPY_REG_REG_WORD, CPY_ADDR_REG_BYTE, CPY_ADDR_REG_WORD,
301    CPY_REG_ADDR_BYTE, CPY_REG_ADDR_WORD, CPY_ADDR_ADDR_BYTE, CPY_ADDR_ADDR_WORD,
302    CPY_REG_NUM_BYTE, CPY_REG_NUM_WORD, CPY_ADDR_NUM_BYTE, CPY_ADDR_NUM_WORD,
303    ADD_REG_REG_BYTE, ADD_REG_REG_WORD, ADD_REG_NUM_BYTE, ADD_REG_NUM_WORD,
304    ADD_REG_ADDR_BYTE, ADD_REG_ADDR_WORD, ADD_ADDR_REG_BYTE, ADD_ADDR_REG_WORD,
305    ADD_ADDR_NUM_BYTE, ADD_ADDR_NUM_WORD, ADD_ADDR_ADDR_BYTE, ADD_ADDR_ADDR_WORD,
306    INC_REG_BYTE, INC_REG_WORD, INC_ADDR_BYTE, INC_ADDR_WORD,
307    SUB_REG_REG_BYTE, SUB_REG_REG_WORD, SUB_REG_NUM_BYTE, SUB_REG_NUM_WORD,
308    SUB_REG_ADDR_BYTE, SUB_REG_ADDR_WORD, SUB_ADDR_REG_BYTE, SUB_ADDR_REG_WORD,
309    SUB_ADDR_NUM_BYTE, SUB_ADDR_NUM_WORD, SUB_ADDR_ADDR_BYTE, SUB_ADDR_ADDR_WORD,
310    DEC_REG_BYTE, DEC_REG_WORD, DEC_ADDR_BYTE, DEC_ADDR_WORD,
311    SWAP_REG_REG_BYTE, SWAP_REG_REG_WORD,
312    MEM_CPY_ADDR_ADDR_BYTE, MEM_CPY_ADDR_REG_BYTE, MEM_CPY_REG_ADDR_BYTE, MEM_CPY_REG_REG_BYTE,
313    MEM_CPY_ADDR_ADDR_REG, MEM_CPY_ADDR_REG_REG, MEM_CPY_REG_ADDR_REG, MEM_CPY_REG_REG_REG,
314    NOT_REG_BYTE, NOT_REG_WORD,
315    OR_REG_REG_BYTE, OR_REG_REG_WORD, OR_REG_NUM_BYTE, OR_REG_NUM_WORD,
316    XOR_REG_REG_BYTE, XOR_REG_REG_WORD, XOR_REG_NUM_BYTE, XOR_REG_NUM_WORD,
317    AND_REG_REG_BYTE, AND_REG_REG_WORD, AND_REG_NUM_BYTE, AND_REG_NUM_WORD,
318    ASL_REG_NUM_BYTE, ASL_REG_REG_BYTE, ASL_REG_NUM_WORD,
319    ASL_REG_REG_WORD, ASL_ADDR_BYTE, ASL_ADDR_WORD,
320    ASR_REG_NUM_BYTE, ASR_REG_REG_BYTE, ASR_REG_NUM_WORD,
321    ASR_REG_REG_WORD, ASR_ADDR_BYTE, ASR_ADDR_WORD,
322    LSR_REG_NUM_BYTE, LSR_REG_REG_BYTE, LSR_REG_NUM_WORD,
323    LSR_REG_REG_WORD, LSR_ADDR_BYTE, LSR_ADDR_WORD,
324    ROL_REG_NUM_BYTE, ROL_REG_REG_BYTE, ROL_REG_NUM_WORD,
325    ROL_REG_REG_WORD, ROL_ADDR_BYTE, ROL_ADDR_WORD,
326    ROR_REG_NUM_BYTE, ROR_REG_REG_BYTE, ROR_REG_NUM_WORD,
327    ROR_REG_REG_WORD, ROR_ADDR_BYTE, ROR_ADDR_WORD,
328    RCL_REG_NUM_BYTE, RCL_REG_REG_BYTE, RCL_REG_NUM_WORD,
329    RCL_REG_REG_WORD, RCL_ADDR_BYTE, RCL_ADDR_WORD,
330    RCR_REG_NUM_BYTE, RCR_REG_REG_BYTE, RCR_REG_NUM_WORD,
331    RCR_REG_REG_WORD, RCR_ADDR_BYTE, RCR_ADDR_WORD,
332    MUL_REG_REG_BYTE, MUL_REG_REG_WORD, MUL_REG_NUM_BYTE, MUL_REG_NUM_WORD,
333    MUL_REG_ADDR_BYTE, MUL_REG_ADDR_WORD, MUL_ADDR_REG_BYTE, MUL_ADDR_REG_WORD,
334    MUL_ADDR_NUM_BYTE, MUL_ADDR_NUM_WORD, MUL_ADDR_ADDR_BYTE, MUL_ADDR_ADDR_WORD,
335    MULS_REG_REG_BYTE, MULS_REG_REG_WORD, MULS_REG_NUM_BYTE, MULS_REG_NUM_WORD,
336    MULS_REG_ADDR_BYTE, MULS_REG_ADDR_WORD, MULS_ADDR_REG_BYTE, MULS_ADDR_REG_WORD,
337    MULS_ADDR_NUM_BYTE, MULS_ADDR_NUM_WORD, MULS_ADDR_ADDR_BYTE, MULS_ADDR_ADDR_WORD,
338    DIV_REG_REG_BYTE, DIV_REG_REG_WORD, DIV_REG_NUM_BYTE, DIV_REG_NUM_WORD,
339    DIV_REG_ADDR_BYTE, DIV_REG_ADDR_WORD, DIV_ADDR_REG_BYTE, DIV_ADDR_REG_WORD,
340    DIV_ADDR_NUM_BYTE, DIV_ADDR_NUM_WORD, DIV_ADDR_ADDR_BYTE, DIV_ADDR_ADDR_WORD,
341    DIVS_REG_REG_BYTE, DIVS_REG_NUM_BYTE, DIVS_REG_ADDR_BYTE, DIVS_ADDR_REG_BYTE,
342    DIVS_REG_REG_WORD, DIVS_REG_NUM_WORD, DIVS_REG_ADDR_WORD, DIVS_ADDR_REG_WORD,
343    DIVS_ADDR_NUM_BYTE, DIVS_ADDR_NUM_WORD, DIVS_ADDR_ADDR_BYTE, DIVS_ADDR_ADDR_WORD,
344    PUSH_REG_BYTE, PUSH_REG_WORD, PUSH_NUM_BYTE, PUSH_NUM_WORD,
345    POP_REG_BYTE, POP_REG_WORD,
346    JMP_REG, JMP_ADDR,
347    JL_REG, JL_ADDR, JLE_REG, JLE_ADDR,
348    JG_REG, JG_ADDR, JGE_REG, JGE_ADDR,
349    JE_REG, JE_ADDR, JNE_REG, JNE_ADDR,
350    CMP_REG_NUM_BYTE, CMP_REG_NUM_WORD, CMP_REG_REG_BYTE, CMP_REG_REG_WORD,
351    CMPS_REG_NUM_BYTE, CMPS_REG_NUM_WORD, CMPS_REG_REG_BYTE, CMPS_REG_REG_WORD,
352    CMP_REG_ADDR_BYTE, CMP_REG_ADDR_WORD, CMPS_REG_ADDR_BYTE, CMPS_REG_ADDR_WORD,
353    JBS_REG_REG, JBS_REG_NUM, JBS_ADDR_REG, JBS_ADDR_NUM,
354    JBC_REG_REG, JBC_REG_NUM, JBC_ADDR_REG, JBC_ADDR_NUM,
355    JRF_BYTE, JRB_BYTE,
356    ADDC_REG_REG_BYTE, ADDC_REG_REG_WORD, ADDC_REG_NUM_BYTE, ADDC_REG_NUM_WORD,
357    ADDC_REG_ADDR_BYTE, ADDC_REG_ADDR_WORD, ADDC_ADDR_REG_BYTE, ADDC_ADDR_REG_WORD,
358    ADDC_ADDR_NUM_BYTE, ADDC_ADDR_NUM_WORD, ADDC_ADDR_ADDR_BYTE, ADDC_ADDR_ADDR_WORD,
359    SUBC_REG_REG_BYTE, SUBC_REG_REG_WORD, SUBC_REG_NUM_BYTE, SUBC_REG_NUM_WORD,
360    SUBC_REG_ADDR_BYTE, SUBC_REG_ADDR_WORD, SUBC_ADDR_REG_BYTE, SUBC_ADDR_REG_WORD,
361    SUBC_ADDR_NUM_BYTE, SUBC_ADDR_NUM_WORD, SUBC_ADDR_ADDR_BYTE, SUBC_ADDR_ADDR_WORD,
362    MSWP_REG_REG_REG, MSWP_REG_REG_BYTE, MSWP_REG_ADDR_REG, MSWP_REG_ADDR_BYTE,
363    MSWP_ADDR_REG_REG, MSWP_ADDR_REG_BYTE, MSWP_ADDR_ADDR_REG, MSWP_ADDR_ADDR_BYTE,
364    BMUL_ADDR_ADDR, BMUL_ADDR_NUM,BMUL_ADDR_REG,BMUL_REG_ADDR,BMUL_REG_NUM,BMUL_REG_REG,
365    EHALT,
366    SLEEP,
367];
368
369#[cfg(test)]
370mod test {
371    use super::*;
372
373    #[test]
374    fn check_all_unique() {
375        let mut encountered = vec![];
376        for op in ALL {
377            if encountered.contains(&op) {
378                panic!("Found {:02X} twice", op);
379            }
380            encountered.push(op);
381        }
382    }
383}
maikor_platform/ops.rs

maikor_platform/
ops.rs
