m1_ctrl/cg_controller/
mod.rs1use simulink_binder::import;
2
3import! {M1OFL_Control,
4r##"
5/*
6 * File: M1OFL_Control.h
7 *
8 * Code generated for Simulink model 'M1OFL_Control'.
9 *
10 * Model version : 1.758
11 * Simulink Coder version : 9.0 (R2018b) 24-May-2018
12 * C/C++ source code generated on : Tue Mar 2 10:27:22 2021
13 *
14 * Target selection: ert.tlc
15 * Embedded hardware selection: Intel->x86-64 (Linux 64)
16 * Code generation objectives: Unspecified
17 * Validation result: Not run
18 */
19
20#ifndef RTW_HEADER_M1OFL_Control_h_
21#define RTW_HEADER_M1OFL_Control_h_
22#include <string.h>
23#include <stddef.h>
24#ifndef M1OFL_Control_COMMON_INCLUDES_
25# define M1OFL_Control_COMMON_INCLUDES_
26#include "rtwtypes.h"
27#endif /* M1OFL_Control_COMMON_INCLUDES_ */
28
29#include "M1OFL_Control_types.h"
30
31/* Macros for accessing real-time model data structure */
32#ifndef rtmGetErrorStatus
33# define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
34#endif
35
36#ifndef rtmSetErrorStatus
37# define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
38#endif
39
40/* Block states (default storage) for system '<Root>' */
41typedef struct {
42 real_T Fxcontroller_DSTATE[3]; /* '<S2>/Fx controller' */
43 real_T Fycontroller_DSTATE[3]; /* '<S2>/Fy controller' */
44 real_T Fzcontroller_DSTATE[3]; /* '<S2>/Fz controller' */
45 real_T Mxcontroller_DSTATE[5]; /* '<S2>/Mx controller' */
46 real_T Mycontroller_DSTATE[5]; /* '<S2>/My controller' */
47 real_T Mzcontroller_DSTATE[3]; /* '<S2>/Mz controller' */
48 real_T SADynamicsS1_states[12]; /* '<S1>/SA Dynamics - S1' */
49 real_T Fxcontroller_DSTATE_h[3]; /* '<S3>/Fx controller' */
50 real_T Fycontroller_DSTATE_a[3]; /* '<S3>/Fy controller' */
51 real_T Fzcontroller_DSTATE_l[3]; /* '<S3>/Fz controller' */
52 real_T Mxcontroller_DSTATE_o[5]; /* '<S3>/Mx controller' */
53 real_T Mycontroller_DSTATE_p[5]; /* '<S3>/My controller' */
54 real_T Mzcontroller_DSTATE_k[3]; /* '<S3>/Mz controller' */
55 real_T SADynamicsS2_states[12]; /* '<S1>/SA Dynamics - S2' */
56 real_T Fxcontroller_DSTATE_o[3]; /* '<S4>/Fx controller' */
57 real_T Fycontroller_DSTATE_h[3]; /* '<S4>/Fy controller' */
58 real_T Fzcontroller_DSTATE_n[3]; /* '<S4>/Fz controller' */
59 real_T Mxcontroller_DSTATE_l[5]; /* '<S4>/Mx controller' */
60 real_T Mycontroller_DSTATE_d[5]; /* '<S4>/My controller' */
61 real_T Mzcontroller_DSTATE_a[3]; /* '<S4>/Mz controller' */
62 real_T SADynamicsS3_states[12]; /* '<S1>/SA Dynamics - S3' */
63 real_T Fxcontroller_DSTATE_i[3]; /* '<S5>/Fx controller' */
64 real_T Fycontroller_DSTATE_n[3]; /* '<S5>/Fy controller' */
65 real_T Fzcontroller_DSTATE_f[3]; /* '<S5>/Fz controller' */
66 real_T Mxcontroller_DSTATE_k[5]; /* '<S5>/Mx controller' */
67 real_T Mycontroller_DSTATE_pv[5]; /* '<S5>/My controller' */
68 real_T Mzcontroller_DSTATE_ka[3]; /* '<S5>/Mz controller' */
69 real_T SADynamicsS4_states[12]; /* '<S1>/SA Dynamics - S4' */
70 real_T Fxcontroller_DSTATE_j[3]; /* '<S6>/Fx controller' */
71 real_T Fycontroller_DSTATE_k[3]; /* '<S6>/Fy controller' */
72 real_T Fzcontroller_DSTATE_f2[3]; /* '<S6>/Fz controller' */
73 real_T Mxcontroller_DSTATE_d[5]; /* '<S6>/Mx controller' */
74 real_T Mycontroller_DSTATE_f[5]; /* '<S6>/My controller' */
75 real_T Mzcontroller_DSTATE_f[3]; /* '<S6>/Mz controller' */
76 real_T SADynamicsS5_states[12]; /* '<S1>/SA Dynamics - S5' */
77 real_T Fxcontroller_DSTATE_d[3]; /* '<S7>/Fx controller' */
78 real_T Fycontroller_DSTATE_i[3]; /* '<S7>/Fy controller' */
79 real_T Fzcontroller_DSTATE_b[3]; /* '<S7>/Fz controller' */
80 real_T Mxcontroller_DSTATE_m[5]; /* '<S7>/Mx controller' */
81 real_T Mycontroller_DSTATE_b[5]; /* '<S7>/My controller' */
82 real_T Mzcontroller_DSTATE_kn[3]; /* '<S7>/Mz controller' */
83 real_T SADynamicsS6_states[12]; /* '<S1>/SA Dynamics - S6' */
84 real_T Fxcontroller_DSTATE_b[3]; /* '<S8>/Fx controller' */
85 real_T Fycontroller_DSTATE_nj[3]; /* '<S8>/Fy controller' */
86 real_T Fzcontroller_DSTATE_c[3]; /* '<S8>/Fz controller' */
87 real_T Mxcontroller_DSTATE_i[5]; /* '<S8>/Mx controller' */
88 real_T Mycontroller_DSTATE_o[5]; /* '<S8>/My controller' */
89 real_T Mzcontroller_DSTATE_i[3]; /* '<S8>/Mz controller' */
90 real_T SADynamicsS7_states[12]; /* '<S1>/SA Dynamics - S7' */
91} DW_M1OFL_Control_T;
92
93/* Constant parameters (default storage) */
94typedef struct {
95 /* Expression: m1sys{1}.LC2CG
96 * Referenced by: '<S1>/LC2CG1'
97 */
98 real_T LC2CG1_Gain[36];
99
100 /* Expression: m1sys{2}.LC2CG
101 * Referenced by: '<S1>/LC2CG2'
102 */
103 real_T LC2CG2_Gain[36];
104
105 /* Expression: m1sys{3}.LC2CG
106 * Referenced by: '<S1>/LC2CG3'
107 */
108 real_T LC2CG3_Gain[36];
109
110 /* Expression: m1sys{4}.LC2CG
111 * Referenced by: '<S1>/LC2CG4'
112 */
113 real_T LC2CG4_Gain[36];
114
115 /* Expression: m1sys{5}.LC2CG
116 * Referenced by: '<S1>/LC2CG5'
117 */
118 real_T LC2CG5_Gain[36];
119
120 /* Expression: m1sys{6}.LC2CG
121 * Referenced by: '<S1>/LC2CG6'
122 */
123 real_T LC2CG6_Gain[36];
124
125 /* Expression: m1sys{7}.LC2CG
126 * Referenced by: '<S1>/LC2CG7'
127 */
128 real_T LC2CG7_Gain[36];
129
130 /* Pooled Parameter (Expression: )
131 * Referenced by:
132 * '<S2>/Mx controller'
133 * '<S2>/My controller'
134 * '<S3>/Mx controller'
135 * '<S3>/My controller'
136 * '<S4>/Mx controller'
137 * '<S4>/My controller'
138 * '<S5>/Mx controller'
139 * '<S5>/My controller'
140 * '<S6>/Mx controller'
141 * '<S6>/My controller'
142 * '<S7>/Mx controller'
143 * '<S7>/My controller'
144 * '<S8>/Mx controller'
145 * '<S8>/My controller'
146 */
147 real_T pooled10[21];
148
149 /* Pooled Parameter (Expression: )
150 * Referenced by:
151 * '<S2>/Mx controller'
152 * '<S2>/My controller'
153 * '<S3>/Mx controller'
154 * '<S3>/My controller'
155 * '<S4>/Mx controller'
156 * '<S4>/My controller'
157 * '<S5>/Mx controller'
158 * '<S5>/My controller'
159 * '<S6>/Mx controller'
160 * '<S6>/My controller'
161 * '<S7>/Mx controller'
162 * '<S7>/My controller'
163 * '<S8>/Mx controller'
164 * '<S8>/My controller'
165 */
166 real_T pooled12[5];
167} ConstP_M1OFL_Control_T;
168
169/* External inputs (root inport signals with default storage) */
170typedef struct {
171 real_T HP_LC[42]; /* '<Root>/HP_LC' */
172} ExtU_M1OFL_Control_T;
173
174/* External outputs (root outports fed by signals with default storage) */
175typedef struct {
176 real_T M1_Rel_F[42]; /* '<Root>/M1_Rel_F' */
177} ExtY_M1OFL_Control_T;
178
179/* Real-time Model Data Structure */
180struct tag_RTM_M1OFL_Control_T {
181 const char_T * volatile errorStatus;
182};
183
184/* Block states (default storage) */
185extern DW_M1OFL_Control_T M1OFL_Control_DW;
186
187/* External inputs (root inport signals with default storage) */
188extern ExtU_M1OFL_Control_T M1OFL_Control_U;
189
190/* External outputs (root outports fed by signals with default storage) */
191extern ExtY_M1OFL_Control_T M1OFL_Control_Y;
192
193/* Constant parameters (default storage) */
194extern const ConstP_M1OFL_Control_T M1OFL_Control_ConstP;
195
196/* Model entry point functions */
197extern void M1OFL_Control_initialize(void);
198extern void M1OFL_Control_step(void);
199extern void M1OFL_Control_terminate(void);
200
201/* Real-time Model object */
202extern RT_MODEL_M1OFL_Control_T *const M1OFL_Control_M;
203
204/*-
205 * The generated code includes comments that allow you to trace directly
206 * back to the appropriate location in the model. The basic format
207 * is <system>/block_name, where system is the system number (uniquely
208 * assigned by Simulink) and block_name is the name of the block.
209 *
210 * Note that this particular code originates from a subsystem build,
211 * and has its own system numbers different from the parent model.
212 * Refer to the system hierarchy for this subsystem below, and use the
213 * MATLAB hilite_system command to trace the generated code back
214 * to the parent model. For example,
215 *
216 * hilite_system('M1DCS/M1OFL_Control') - opens subsystem M1DCS/M1OFL_Control
217 * hilite_system('M1DCS/M1OFL_Control/Kp') - opens and selects block Kp
218 *
219 * Here is the system hierarchy for this model
220 *
221 * '<Root>' : 'M1DCS'
222 * '<S1>' : 'M1DCS/M1OFL_Control'
223 * '<S2>' : 'M1DCS/M1OFL_Control/M1S1 OFL DT_SS_C'
224 * '<S3>' : 'M1DCS/M1OFL_Control/M1S2 OFL DT_SS_C1'
225 * '<S4>' : 'M1DCS/M1OFL_Control/M1S3 OFL DT_SS_C'
226 * '<S5>' : 'M1DCS/M1OFL_Control/M1S4 OFL DT_SS_C'
227 * '<S6>' : 'M1DCS/M1OFL_Control/M1S5 OFL DT_SS_C'
228 * '<S7>' : 'M1DCS/M1OFL_Control/M1S6 OFL DT_SS_C'
229 * '<S8>' : 'M1DCS/M1OFL_Control/M1S7 OFL DT_SS_C'
230 */
231#endif /* RTW_HEADER_M1OFL_Control_h_ */
232
233/*
234 * File trailer for generated code.
235 *
236 * [EOF]
237 */
238"##}