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luaur_code_gen/methods/
assembly_builder_x_64_vcvtsi_2_sd.rs

1use crate::enums::category_x_64::CategoryX64;
2use crate::enums::size_x_64::SizeX64;
3use crate::records::assembly_builder_x_64::AssemblyBuilderX64;
4use crate::records::operand_x_64::OperandX64;
5
6impl AssemblyBuilderX64 {
7    pub fn vcvtsi2sd(&mut self, dst: OperandX64, src1: OperandX64, src2: OperandX64) {
8        // C++: setW = (src2.cat == reg ? src2.base.size : src2.memSize) == qword.
9        // A register operand carries its size in `base.size()`, NOT `memSize`
10        // (which is `none` for registers), so a qword GP source needs the cat check.
11        let set_w = (if src2.cat == CategoryX64::reg {
12            src2.base.size()
13        } else {
14            src2.memSize
15        }) == SizeX64::qword;
16        self.place_avx_c_char_operand_x_64_operand_x_64_operand_x_64_u8_bool_u8_u8(
17            c"vcvtsi2sd".as_ptr(),
18            dst,
19            src1,
20            src2,
21            0x2a,
22            set_w,
23            0x0f,
24            0xf2,
25        );
26    }
27}