luaur_code_gen/functions/
call_length_helper.rs1use crate::enums::size_x_64::SizeX64;
2use crate::functions::emit_update_base_emit_common_x_64::emit_update_base;
3use crate::functions::luau_reg_address::luau_reg_address;
4use crate::records::assembly_builder_x_64::AssemblyBuilderX64;
5use crate::records::ir_call_wrapper_x_64::IrCallWrapperX64;
6use crate::records::ir_data::k_invalid_inst_idx;
7use crate::records::ir_op::IrOp;
8use crate::records::ir_reg_alloc_x_64::IrRegAllocX64;
9use crate::records::native_context::NativeContext;
10use crate::records::operand_x_64::OperandX64;
11use crate::records::register_x_64::RegisterX64;
12
13const fn r_state() -> RegisterX64 {
14 RegisterX64 {
15 bits: (15u8 << RegisterX64::INDEX_SHIFT) | SizeX64::qword as u8,
16 }
17}
18
19const fn r_native_context() -> RegisterX64 {
20 RegisterX64 {
21 bits: (13u8 << RegisterX64::INDEX_SHIFT) | SizeX64::qword as u8,
22 }
23}
24
25pub fn call_length_helper(
26 regs: &mut IrRegAllocX64,
27 build: &mut AssemblyBuilderX64,
28 ra: i32,
29 rb: i32,
30) {
31 let mut call_wrap = IrCallWrapperX64::ir_call_wrapper_x_64_ir_call_wrapper_x_64(
32 regs,
33 build,
34 k_invalid_inst_idx,
35 );
36
37 call_wrap.add_argument_size_x_64_operand_x_64_ir_op(
38 SizeX64::qword,
39 OperandX64::reg(r_state()),
40 IrOp::ir_op(),
41 );
42 call_wrap.add_argument_size_x_64_operand_x_64_ir_op(
43 SizeX64::qword,
44 luau_reg_address(ra),
45 IrOp::ir_op(),
46 );
47 call_wrap.add_argument_size_x_64_operand_x_64_ir_op(
48 SizeX64::qword,
49 luau_reg_address(rb),
50 IrOp::ir_op(),
51 );
52
53 call_wrap.call(&OperandX64::mem(
54 SizeX64::qword,
55 RegisterX64::noreg,
56 1,
57 r_native_context(),
58 core::mem::offset_of!(NativeContext, luaV_dolen) as i32,
59 ));
60
61 emit_update_base(build);
62}