Modulesยง
- avx_3_1
- avx_3_2
- avx_3_3
- avx_b
- avx_r
- avx_w
- avx_x
- call_
fallback_ yield - codegen_
assert - Node:
cxx:Macro:Luau.CodeGen:CodeGen/include/Luau/CodeGenCommon.h:CODEGEN_ASSERT(hand-fixed: the original translation passed&strwhere the handler takes*const c_charand could never have expanded; mirrors LUAU_ASSERT!) - codegen_
target_ a_ 64 - codegen_
target_ x_ 64 - dw_
cf_ a_ advance_ loc - dw_
cf_ a_ advance_ loc_ 1 - dw_
cf_ a_ advance_ loc_ 2 - dw_
cf_ a_ advance_ loc_ 4 - dw_
cf_ a_ def_ cfa - dw_
cf_ a_ def_ cfa_ expression - dw_
cf_ a_ def_ cfa_ offset - dw_
cf_ a_ def_ cfa_ register - dw_
cf_ a_ hi_ user - dw_
cf_ a_ lo_ user - dw_
cf_ a_ nop - dw_
cf_ a_ offset - dw_
cf_ a_ offset_ extended - dw_
cf_ a_ register - dw_
cf_ a_ remember_ state - dw_
cf_ a_ restore - dw_
cf_ a_ restore_ extended - dw_
cf_ a_ restore_ state - dw_
cf_ a_ same_ value - dw_
cf_ a_ set_ loc - dw_
cf_ a_ undefined - dw_
reg_ a_ 64_ fp - dw_
reg_ a_ 64_ lr - dw_
reg_ a_ 64_ sp - dw_
reg_ x_ 64_ ra - dw_
reg_ x_ 64_ rax - dw_
reg_ x_ 64_ rbp - dw_
reg_ x_ 64_ rbx - dw_
reg_ x_ 64_ rcx - dw_
reg_ x_ 64_ rdi - dw_
reg_ x_ 64_ rdx - dw_
reg_ x_ 64_ rsi - dw_
reg_ x_ 64_ rsp - has_
op_ a - Source:
CodeGen/include/Luau/IrData.h:1217(hand-ported) - has_
op_ b - Source:
CodeGen/include/Luau/IrData.h:1218(hand-ported) - has_
op_ c - Source:
CodeGen/include/Luau/IrData.h:1219(hand-ported) - has_
op_ d - Source:
CodeGen/include/Luau/IrData.h:1220(hand-ported) - has_
op_ e - Source:
CodeGen/include/Luau/IrData.h:1221(hand-ported) - has_
op_ f - Source:
CodeGen/include/Luau/IrData.h:1222(hand-ported) - has_
op_ g - Source:
CodeGen/include/Luau/IrData.h:1223(hand-ported) - luacodegen_
api - mod_rm
- nominmax_
code_ allocator - Generated skeleton item. @skeleton-stub
Node:
cxx:Macro:Luau.CodeGen:CodeGen/src/CodeAllocator.cpp:17:nominmaxSource:CodeGen/src/CodeAllocator.cppGraph edges: - nominmax_
code_ block_ unwind - Generated skeleton item. @skeleton-stub
Node:
cxx:Macro:Luau.CodeGen:CodeGen/src/CodeBlockUnwind.cpp:17:nominmaxSource:CodeGen/src/CodeBlockUnwind.cppGraph edges: - op_a
- op_b
- op_c
- op_d
- op_e
- op_f
- op_g
- op_
plus_ cc - op_
plus_ reg - opt_
op_ a - opt_
op_ b - opt_
op_ c - opt_
op_ d - opt_
op_ e - opt_
op_ f - opt_
op_ g - register_
frame_ weak - rex_b
- rex_
force - rex_r
- rex_w
- Source:
CodeGen/src/AssemblyBuilderX64.cpp:40(hand-ported) - rex_
w_ bit - Source:
CodeGen/src/AssemblyBuilderX64.cpp:39(hand-ported) - rex_x
- sib
- uwop_
alloc_ large - uwop_
alloc_ small - uwop_
push_ machframe - uwop_
push_ nonvol - uwop_
save_ nonvol - uwop_
save_ nonvol_ far - uwop_
save_ xmm_ 128 - uwop_
save_ xmm_ 128_ far - uwop_
set_ fpreg - vm_
interrupt - vm_kv
- vm_
patch_ c - vm_
patch_ e - vm_
protect - vm_
protect_ pc - vm_reg
- vm_uv
- win_
32_ lean_ and_ mean_ code_ allocator - Generated skeleton item. @skeleton-stub
Node:
cxx:Macro:Luau.CodeGen:CodeGen/src/CodeAllocator.cpp:14:win_32_lean_and_meanSource:CodeGen/src/CodeAllocator.cppGraph edges: - win_
32_ lean_ and_ mean_ code_ block_ unwind - Generated skeleton item. @skeleton-stub
Node:
cxx:Macro:Luau.CodeGen:CodeGen/src/CodeBlockUnwind.cpp:14:win_32_lean_and_meanSource:CodeGen/src/CodeBlockUnwind.cppGraph edges: