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luaur_code_gen/methods/
assembly_builder_x_64_vblendvpd.rs

1use crate::records::assembly_builder_x_64::AssemblyBuilderX64;
2use crate::records::operand_x_64::OperandX64;
3use crate::records::register_x_64::RegisterX64;
4
5impl AssemblyBuilderX64 {
6    pub fn vblendvpd(
7        &mut self,
8        dst: RegisterX64,
9        src1: RegisterX64,
10        src2: OperandX64,
11        mask: RegisterX64,
12    ) {
13        // bits [7:4] of imm8 are used to select register for operand 4
14        // C++: placeAvx("vblendvpd", dst, src1, src2, mask.index << 4, 0x4b,
15        //               false, AVX_0F3A, AVX_66);
16        // This needs the imm8-carrying overload: imm8 = mask.index << 4,
17        // code(opcode) = 0x4b, mode = AVX_0F3A (0x3A -> 0b00011).
18        self.place_avx_c_char_operand_x_64_operand_x_64_operand_x_64_u8_u8_bool_u8_u8(
19            b"vblendvpd\0".as_ptr() as *const core::ffi::c_char,
20            OperandX64::reg(dst),
21            OperandX64::reg(src1),
22            src2,
23            mask.index() << 4,
24            0x4b,
25            false,
26            0x3A, // AVX_0F3A
27            0x66, // AVX_66
28        );
29    }
30}