luaur_code_gen/methods/
assembly_builder_x_64_setcc.rs

1use crate::enums::category_x_64::CategoryX64;
2use crate::enums::condition_x_64::ConditionX64;
3use crate::enums::size_x_64::SizeX64;
4use crate::macros::codegen_assert::CODEGEN_ASSERT;
5use crate::records::assembly_builder_x_64::AssemblyBuilderX64;
6use crate::records::operand_x_64::OperandX64;
7
8impl AssemblyBuilderX64 {
9    pub fn setcc(&mut self, cond: ConditionX64, op: OperandX64) {
10        let size = if op.cat == CategoryX64::reg {
11            op.base.size()
12        } else {
13            op.memSize
14        };
15
16        if !(size == SizeX64::byte) {
17            luaur_common::LUAU_DEBUGBREAK!();
18        }
19
20        if self.log_text {
21            static SETCC_TEXT: [&[u8]; 26] = [
22                b"seto\0",
23                b"setno\0",
24                b"setc\0",
25                b"setnc\0",
26                b"setb\0",
27                b"setbe\0",
28                b"seta\0",
29                b"setae\0",
30                b"sete\0",
31                b"setl\0",
32                b"setle\0",
33                b"setg\0",
34                b"setge\0",
35                b"setnb\0",
36                b"setnbe\0",
37                b"setna\0",
38                b"setnae\0",
39                b"setne\0",
40                b"setnl\0",
41                b"setnle\0",
42                b"setng\0",
43                b"setnge\0",
44                b"setz\0",
45                b"setnz\0",
46                b"setp\0",
47                b"setnp\0",
48            ];
49
50            let cond_idx = cond as usize;
51            self.log_c_char_operand_x_64(
52                SETCC_TEXT[cond_idx].as_ptr() as *const core::ffi::c_char,
53                op,
54            );
55        }
56
57        self.place_rex_operand_x_64(op);
58        self.place(0x0f);
59
60        static CODE_FOR_CONDITION: [u8; 26] = [
61            0x00, 0x01, 0x02, 0x03, 0x02, 0x06, 0x07, 0x03, 0x04, 0x0c, 0x0e, 0x0f, 0x0d, 0x03,
62            0x07, 0x06, 0x02, 0x05, 0x0d, 0x0f, 0x0e, 0x0c, 0x04, 0x05, 0x0a, 0x0b,
63        ];
64
65        self.place(0x90 | CODE_FOR_CONDITION[cond as usize]);
66        self.place_mod_reg_mem(op, 0, 0);
67        self.commit();
68    }
69}
luaur_code_gen/methods/assembly_builder_x_64_setcc.rs

luaur_code_gen/methods/
assembly_builder_x_64_setcc.rs
