luaur_code_gen/methods/assembly_builder_x_64_and.rs
1use crate::records::assembly_builder_x_64::AssemblyBuilderX64;
2use crate::records::operand_x_64::OperandX64;
3
4impl AssemblyBuilderX64 {
5 pub fn and_(&mut self, lhs: OperandX64, rhs: OperandX64) {
6 // C++ `placeBinary("and", lhs, rhs, 0x80, 0x81, 0x83, 0x20, 0x21, 0x22, 0x23, 4)`.
7 // The original port used the imm-only `place_binary_reg_mem_and_imm` (which
8 // can't encode reg/reg or reg/mem forms) AND passed `0x20` where the ModRM
9 // opcode-extension digit must be 4 (AND) — yielding the ADD (/0) encoding.
10 self.place_binary(
11 c"and".as_ptr(),
12 lhs,
13 rhs,
14 0x80,
15 0x81,
16 0x83,
17 0x20,
18 0x21,
19 0x22,
20 0x23,
21 4,
22 );
23 }
24}