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luaur_code_gen/functions/
require_variadic_sequence.rs

1use crate::records::register_set::RegisterSet;
2
3pub fn require_variadic_sequence(
4    source_rs: &mut RegisterSet,
5    def_rs: &RegisterSet,
6    mut vararg_start: u8,
7) {
8    if !def_rs.vararg_seq {
9        // Peel away registers from variadic sequence that we define
10        while def_rs.regs[vararg_start as usize / 64] & (1u64 << (vararg_start as usize % 64)) != 0
11        {
12            vararg_start = vararg_start.wrapping_add(1);
13        }
14
15        // sourceRs.varargSeq might already be true if the use was required earlier.
16        // Assert the start is consistent.
17        if source_rs.vararg_seq {
18            assert!(source_rs.vararg_start == vararg_start);
19        }
20
21        source_rs.vararg_seq = true;
22        source_rs.vararg_start = vararg_start;
23    } else {
24        // Variadic use sequence might include registers before def sequence
25        for i in vararg_start..def_rs.vararg_start {
26            let word_idx = (i as usize) / 64;
27            let bit_idx = (i as usize) % 64;
28
29            if def_rs.regs[word_idx] & (1u64 << bit_idx) == 0 {
30                source_rs.regs[word_idx] |= 1u64 << bit_idx;
31            }
32        }
33    }
34}