Module lpc845_pac::sct0::input [−][src]
Expand description
SCT input register
Structs
Field AIN0
reader - Input 0 state. Input 0 state on the last SCT clock edge.
Field AIN1
reader - Input 1 state. Input 1 state on the last SCT clock edge.
Field AIN2
reader - Input 2 state. Input 2 state on the last SCT clock edge.
Field AIN3
reader - Input 3 state. Input 3 state on the last SCT clock edge.
Field AIN4
reader - Input 4 state. Input 4 state on the last SCT clock edge.
SCT input register
Register INPUT
reader
Field SIN0
reader - Input 0 state. Input 0 state following the synchronization specified by INSYNC.
Field SIN1
reader - Input 1 state. Input 1 state following the synchronization specified by INSYNC.
Field SIN2
reader - Input 2 state. Input 2 state following the synchronization specified by INSYNC.
Field SIN3
reader - Input 3 state. Input 3 state following the synchronization specified by INSYNC.
Field SIN4
reader - Input 4 state. Input 4 state following the synchronization specified by INSYNC.
Register INPUT
writer