lpc845_pac/syscon/
sysahbclkctrl1.rs

1#[doc = "Register `SYSAHBCLKCTRL1` reader"]
2pub struct R(crate::R<SYSAHBCLKCTRL1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SYSAHBCLKCTRL1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SYSAHBCLKCTRL1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SYSAHBCLKCTRL1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SYSAHBCLKCTRL1` writer"]
17pub struct W(crate::W<SYSAHBCLKCTRL1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SYSAHBCLKCTRL1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SYSAHBCLKCTRL1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SYSAHBCLKCTRL1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Enables clock for CAPT.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum CAPT_A {
40    #[doc = "0: disable"]
41    DISABLE = 0,
42    #[doc = "1: enable"]
43    ENABLE = 1,
44}
45impl From<CAPT_A> for bool {
46    #[inline(always)]
47    fn from(variant: CAPT_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `CAPT` reader - Enables clock for CAPT."]
52pub struct CAPT_R(crate::FieldReader<bool, CAPT_A>);
53impl CAPT_R {
54    pub(crate) fn new(bits: bool) -> Self {
55        CAPT_R(crate::FieldReader::new(bits))
56    }
57    #[doc = r"Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> CAPT_A {
60        match self.bits {
61            false => CAPT_A::DISABLE,
62            true => CAPT_A::ENABLE,
63        }
64    }
65    #[doc = "Checks if the value of the field is `DISABLE`"]
66    #[inline(always)]
67    pub fn is_disable(&self) -> bool {
68        **self == CAPT_A::DISABLE
69    }
70    #[doc = "Checks if the value of the field is `ENABLE`"]
71    #[inline(always)]
72    pub fn is_enable(&self) -> bool {
73        **self == CAPT_A::ENABLE
74    }
75}
76impl core::ops::Deref for CAPT_R {
77    type Target = crate::FieldReader<bool, CAPT_A>;
78    #[inline(always)]
79    fn deref(&self) -> &Self::Target {
80        &self.0
81    }
82}
83#[doc = "Field `CAPT` writer - Enables clock for CAPT."]
84pub struct CAPT_W<'a> {
85    w: &'a mut W,
86}
87impl<'a> CAPT_W<'a> {
88    #[doc = r"Writes `variant` to the field"]
89    #[inline(always)]
90    pub fn variant(self, variant: CAPT_A) -> &'a mut W {
91        self.bit(variant.into())
92    }
93    #[doc = "disable"]
94    #[inline(always)]
95    pub fn disable(self) -> &'a mut W {
96        self.variant(CAPT_A::DISABLE)
97    }
98    #[doc = "enable"]
99    #[inline(always)]
100    pub fn enable(self) -> &'a mut W {
101        self.variant(CAPT_A::ENABLE)
102    }
103    #[doc = r"Sets the field bit"]
104    #[inline(always)]
105    pub fn set_bit(self) -> &'a mut W {
106        self.bit(true)
107    }
108    #[doc = r"Clears the field bit"]
109    #[inline(always)]
110    pub fn clear_bit(self) -> &'a mut W {
111        self.bit(false)
112    }
113    #[doc = r"Writes raw bits to the field"]
114    #[inline(always)]
115    pub fn bit(self, value: bool) -> &'a mut W {
116        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
117        self.w
118    }
119}
120#[doc = "Enables clock for DAC1.\n\nValue on reset: 0"]
121#[derive(Clone, Copy, Debug, PartialEq)]
122pub enum DAC1_A {
123    #[doc = "0: disable"]
124    DISABLE = 0,
125    #[doc = "1: enable"]
126    ENABLE = 1,
127}
128impl From<DAC1_A> for bool {
129    #[inline(always)]
130    fn from(variant: DAC1_A) -> Self {
131        variant as u8 != 0
132    }
133}
134#[doc = "Field `DAC1` reader - Enables clock for DAC1."]
135pub struct DAC1_R(crate::FieldReader<bool, DAC1_A>);
136impl DAC1_R {
137    pub(crate) fn new(bits: bool) -> Self {
138        DAC1_R(crate::FieldReader::new(bits))
139    }
140    #[doc = r"Get enumerated values variant"]
141    #[inline(always)]
142    pub fn variant(&self) -> DAC1_A {
143        match self.bits {
144            false => DAC1_A::DISABLE,
145            true => DAC1_A::ENABLE,
146        }
147    }
148    #[doc = "Checks if the value of the field is `DISABLE`"]
149    #[inline(always)]
150    pub fn is_disable(&self) -> bool {
151        **self == DAC1_A::DISABLE
152    }
153    #[doc = "Checks if the value of the field is `ENABLE`"]
154    #[inline(always)]
155    pub fn is_enable(&self) -> bool {
156        **self == DAC1_A::ENABLE
157    }
158}
159impl core::ops::Deref for DAC1_R {
160    type Target = crate::FieldReader<bool, DAC1_A>;
161    #[inline(always)]
162    fn deref(&self) -> &Self::Target {
163        &self.0
164    }
165}
166#[doc = "Field `DAC1` writer - Enables clock for DAC1."]
167pub struct DAC1_W<'a> {
168    w: &'a mut W,
169}
170impl<'a> DAC1_W<'a> {
171    #[doc = r"Writes `variant` to the field"]
172    #[inline(always)]
173    pub fn variant(self, variant: DAC1_A) -> &'a mut W {
174        self.bit(variant.into())
175    }
176    #[doc = "disable"]
177    #[inline(always)]
178    pub fn disable(self) -> &'a mut W {
179        self.variant(DAC1_A::DISABLE)
180    }
181    #[doc = "enable"]
182    #[inline(always)]
183    pub fn enable(self) -> &'a mut W {
184        self.variant(DAC1_A::ENABLE)
185    }
186    #[doc = r"Sets the field bit"]
187    #[inline(always)]
188    pub fn set_bit(self) -> &'a mut W {
189        self.bit(true)
190    }
191    #[doc = r"Clears the field bit"]
192    #[inline(always)]
193    pub fn clear_bit(self) -> &'a mut W {
194        self.bit(false)
195    }
196    #[doc = r"Writes raw bits to the field"]
197    #[inline(always)]
198    pub fn bit(self, value: bool) -> &'a mut W {
199        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
200        self.w
201    }
202}
203impl R {
204    #[doc = "Bit 0 - Enables clock for CAPT."]
205    #[inline(always)]
206    pub fn capt(&self) -> CAPT_R {
207        CAPT_R::new((self.bits & 0x01) != 0)
208    }
209    #[doc = "Bit 1 - Enables clock for DAC1."]
210    #[inline(always)]
211    pub fn dac1(&self) -> DAC1_R {
212        DAC1_R::new(((self.bits >> 1) & 0x01) != 0)
213    }
214}
215impl W {
216    #[doc = "Bit 0 - Enables clock for CAPT."]
217    #[inline(always)]
218    pub fn capt(&mut self) -> CAPT_W {
219        CAPT_W { w: self }
220    }
221    #[doc = "Bit 1 - Enables clock for DAC1."]
222    #[inline(always)]
223    pub fn dac1(&mut self) -> DAC1_W {
224        DAC1_W { w: self }
225    }
226    #[doc = "Writes raw bits to the register."]
227    #[inline(always)]
228    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
229        self.0.bits(bits);
230        self
231    }
232}
233#[doc = "System clock group 1 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysahbclkctrl1](index.html) module"]
234pub struct SYSAHBCLKCTRL1_SPEC;
235impl crate::RegisterSpec for SYSAHBCLKCTRL1_SPEC {
236    type Ux = u32;
237}
238#[doc = "`read()` method returns [sysahbclkctrl1::R](R) reader structure"]
239impl crate::Readable for SYSAHBCLKCTRL1_SPEC {
240    type Reader = R;
241}
242#[doc = "`write(|w| ..)` method takes [sysahbclkctrl1::W](W) writer structure"]
243impl crate::Writable for SYSAHBCLKCTRL1_SPEC {
244    type Writer = W;
245}
246#[doc = "`reset()` method sets SYSAHBCLKCTRL1 to value 0"]
247impl crate::Resettable for SYSAHBCLKCTRL1_SPEC {
248    #[inline(always)]
249    fn reset_value() -> Self::Ux {
250        0
251    }
252}
lpc845_pac/syscon/sysahbclkctrl1.rs

lpc845_pac/syscon/
sysahbclkctrl1.rs
