lpc845_pac/syscon/
captclksel.rs

1#[doc = "Register `CAPTCLKSEL` reader"]
2pub struct R(crate::R<CAPTCLKSEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CAPTCLKSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CAPTCLKSEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CAPTCLKSEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CAPTCLKSEL` writer"]
17pub struct W(crate::W<CAPTCLKSEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CAPTCLKSEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CAPTCLKSEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CAPTCLKSEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Clock source for CAPT clock\n\nValue on reset: 7"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum SEL_A {
41    #[doc = "0: FRO"]
42    FRO = 0,
43    #[doc = "1: main clock"]
44    MAIN_CLK = 1,
45    #[doc = "2: sys pll"]
46    SYS_PLL = 2,
47    #[doc = "3: FRO_DIV"]
48    FRO_DIV = 3,
49    #[doc = "4: Watchdog oscillator"]
50    WDTOSC = 4,
51    #[doc = "5: None"]
52    NONE = 5,
53    #[doc = "6: None"]
54    NONE1 = 6,
55    #[doc = "7: None"]
56    NONE2 = 7,
57}
58impl From<SEL_A> for u8 {
59    #[inline(always)]
60    fn from(variant: SEL_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `SEL` reader - Clock source for CAPT clock"]
65pub struct SEL_R(crate::FieldReader<u8, SEL_A>);
66impl SEL_R {
67    pub(crate) fn new(bits: u8) -> Self {
68        SEL_R(crate::FieldReader::new(bits))
69    }
70    #[doc = r"Get enumerated values variant"]
71    #[inline(always)]
72    pub fn variant(&self) -> SEL_A {
73        match self.bits {
74            0 => SEL_A::FRO,
75            1 => SEL_A::MAIN_CLK,
76            2 => SEL_A::SYS_PLL,
77            3 => SEL_A::FRO_DIV,
78            4 => SEL_A::WDTOSC,
79            5 => SEL_A::NONE,
80            6 => SEL_A::NONE1,
81            7 => SEL_A::NONE2,
82            _ => unreachable!(),
83        }
84    }
85    #[doc = "Checks if the value of the field is `FRO`"]
86    #[inline(always)]
87    pub fn is_fro(&self) -> bool {
88        **self == SEL_A::FRO
89    }
90    #[doc = "Checks if the value of the field is `MAIN_CLK`"]
91    #[inline(always)]
92    pub fn is_main_clk(&self) -> bool {
93        **self == SEL_A::MAIN_CLK
94    }
95    #[doc = "Checks if the value of the field is `SYS_PLL`"]
96    #[inline(always)]
97    pub fn is_sys_pll(&self) -> bool {
98        **self == SEL_A::SYS_PLL
99    }
100    #[doc = "Checks if the value of the field is `FRO_DIV`"]
101    #[inline(always)]
102    pub fn is_fro_div(&self) -> bool {
103        **self == SEL_A::FRO_DIV
104    }
105    #[doc = "Checks if the value of the field is `WDTOSC`"]
106    #[inline(always)]
107    pub fn is_wdtosc(&self) -> bool {
108        **self == SEL_A::WDTOSC
109    }
110    #[doc = "Checks if the value of the field is `NONE`"]
111    #[inline(always)]
112    pub fn is_none(&self) -> bool {
113        **self == SEL_A::NONE
114    }
115    #[doc = "Checks if the value of the field is `NONE1`"]
116    #[inline(always)]
117    pub fn is_none1(&self) -> bool {
118        **self == SEL_A::NONE1
119    }
120    #[doc = "Checks if the value of the field is `NONE2`"]
121    #[inline(always)]
122    pub fn is_none2(&self) -> bool {
123        **self == SEL_A::NONE2
124    }
125}
126impl core::ops::Deref for SEL_R {
127    type Target = crate::FieldReader<u8, SEL_A>;
128    #[inline(always)]
129    fn deref(&self) -> &Self::Target {
130        &self.0
131    }
132}
133#[doc = "Field `SEL` writer - Clock source for CAPT clock"]
134pub struct SEL_W<'a> {
135    w: &'a mut W,
136}
137impl<'a> SEL_W<'a> {
138    #[doc = r"Writes `variant` to the field"]
139    #[inline(always)]
140    pub fn variant(self, variant: SEL_A) -> &'a mut W {
141        self.bits(variant.into())
142    }
143    #[doc = "FRO"]
144    #[inline(always)]
145    pub fn fro(self) -> &'a mut W {
146        self.variant(SEL_A::FRO)
147    }
148    #[doc = "main clock"]
149    #[inline(always)]
150    pub fn main_clk(self) -> &'a mut W {
151        self.variant(SEL_A::MAIN_CLK)
152    }
153    #[doc = "sys pll"]
154    #[inline(always)]
155    pub fn sys_pll(self) -> &'a mut W {
156        self.variant(SEL_A::SYS_PLL)
157    }
158    #[doc = "FRO_DIV"]
159    #[inline(always)]
160    pub fn fro_div(self) -> &'a mut W {
161        self.variant(SEL_A::FRO_DIV)
162    }
163    #[doc = "Watchdog oscillator"]
164    #[inline(always)]
165    pub fn wdtosc(self) -> &'a mut W {
166        self.variant(SEL_A::WDTOSC)
167    }
168    #[doc = "None"]
169    #[inline(always)]
170    pub fn none(self) -> &'a mut W {
171        self.variant(SEL_A::NONE)
172    }
173    #[doc = "None"]
174    #[inline(always)]
175    pub fn none1(self) -> &'a mut W {
176        self.variant(SEL_A::NONE1)
177    }
178    #[doc = "None"]
179    #[inline(always)]
180    pub fn none2(self) -> &'a mut W {
181        self.variant(SEL_A::NONE2)
182    }
183    #[doc = r"Writes raw bits to the field"]
184    #[inline(always)]
185    pub fn bits(self, value: u8) -> &'a mut W {
186        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
187        self.w
188    }
189}
190impl R {
191    #[doc = "Bits 0:2 - Clock source for CAPT clock"]
192    #[inline(always)]
193    pub fn sel(&self) -> SEL_R {
194        SEL_R::new((self.bits & 0x07) as u8)
195    }
196}
197impl W {
198    #[doc = "Bits 0:2 - Clock source for CAPT clock"]
199    #[inline(always)]
200    pub fn sel(&mut self) -> SEL_W {
201        SEL_W { w: self }
202    }
203    #[doc = "Writes raw bits to the register."]
204    #[inline(always)]
205    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
206        self.0.bits(bits);
207        self
208    }
209}
210#[doc = "CAPT clock source select register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [captclksel](index.html) module"]
211pub struct CAPTCLKSEL_SPEC;
212impl crate::RegisterSpec for CAPTCLKSEL_SPEC {
213    type Ux = u32;
214}
215#[doc = "`read()` method returns [captclksel::R](R) reader structure"]
216impl crate::Readable for CAPTCLKSEL_SPEC {
217    type Reader = R;
218}
219#[doc = "`write(|w| ..)` method takes [captclksel::W](W) writer structure"]
220impl crate::Writable for CAPTCLKSEL_SPEC {
221    type Writer = W;
222}
223#[doc = "`reset()` method sets CAPTCLKSEL to value 0x07"]
224impl crate::Resettable for CAPTCLKSEL_SPEC {
225    #[inline(always)]
226    fn reset_value() -> Self::Ux {
227        0x07
228    }
229}
lpc845_pac/syscon/captclksel.rs

lpc845_pac/syscon/
captclksel.rs
