1#[doc = "Register `TRM` reader"]
2pub struct R(crate::R<TRM_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TRM_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TRM_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TRM_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TRM` writer"]
17pub struct W(crate::W<TRM_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TRM_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TRM_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TRM_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `VRANGE` reader - 1.8V to 3.6V Vdd range: This bit MUST be set to '1' if operation below 2.7V is to be used. Failure to set this bit will result in invalid ADC results. Note: This bit will not be spec'd on parts that do not support operation below 2.7V"]
38pub struct VRANGE_R(crate::FieldReader<bool, bool>);
39impl VRANGE_R {
40 pub(crate) fn new(bits: bool) -> Self {
41 VRANGE_R(crate::FieldReader::new(bits))
42 }
43}
44impl core::ops::Deref for VRANGE_R {
45 type Target = crate::FieldReader<bool, bool>;
46 #[inline(always)]
47 fn deref(&self) -> &Self::Target {
48 &self.0
49 }
50}
51#[doc = "Field `VRANGE` writer - 1.8V to 3.6V Vdd range: This bit MUST be set to '1' if operation below 2.7V is to be used. Failure to set this bit will result in invalid ADC results. Note: This bit will not be spec'd on parts that do not support operation below 2.7V"]
52pub struct VRANGE_W<'a> {
53 w: &'a mut W,
54}
55impl<'a> VRANGE_W<'a> {
56 #[doc = r"Sets the field bit"]
57 #[inline(always)]
58 pub fn set_bit(self) -> &'a mut W {
59 self.bit(true)
60 }
61 #[doc = r"Clears the field bit"]
62 #[inline(always)]
63 pub fn clear_bit(self) -> &'a mut W {
64 self.bit(false)
65 }
66 #[doc = r"Writes raw bits to the field"]
67 #[inline(always)]
68 pub fn bit(self, value: bool) -> &'a mut W {
69 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
70 self.w
71 }
72}
73impl R {
74 #[doc = "Bit 5 - 1.8V to 3.6V Vdd range: This bit MUST be set to '1' if operation below 2.7V is to be used. Failure to set this bit will result in invalid ADC results. Note: This bit will not be spec'd on parts that do not support operation below 2.7V"]
75 #[inline(always)]
76 pub fn vrange(&self) -> VRANGE_R {
77 VRANGE_R::new(((self.bits >> 5) & 0x01) != 0)
78 }
79}
80impl W {
81 #[doc = "Bit 5 - 1.8V to 3.6V Vdd range: This bit MUST be set to '1' if operation below 2.7V is to be used. Failure to set this bit will result in invalid ADC results. Note: This bit will not be spec'd on parts that do not support operation below 2.7V"]
82 #[inline(always)]
83 pub fn vrange(&mut self) -> VRANGE_W {
84 VRANGE_W { w: self }
85 }
86 #[doc = "Writes raw bits to the register."]
87 #[inline(always)]
88 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
89 self.0.bits(bits);
90 self
91 }
92}
93#[doc = "ADC Startup register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trm](index.html) module"]
94pub struct TRM_SPEC;
95impl crate::RegisterSpec for TRM_SPEC {
96 type Ux = u32;
97}
98#[doc = "`read()` method returns [trm::R](R) reader structure"]
99impl crate::Readable for TRM_SPEC {
100 type Reader = R;
101}
102#[doc = "`write(|w| ..)` method takes [trm::W](W) writer structure"]
103impl crate::Writable for TRM_SPEC {
104 type Writer = W;
105}
106#[doc = "`reset()` method sets TRM to value 0"]
107impl crate::Resettable for TRM_SPEC {
108 #[inline(always)]
109 fn reset_value() -> Self::Ux {
110 0
111 }
112}