lpc845_pac/ctimer0/
ir.rs

1#[doc = "Register `IR` reader"]
2pub struct R(crate::R<IR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IR` writer"]
17pub struct W(crate::W<IR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `MR0INT` reader - Interrupt flag for match channel 0."]
38pub struct MR0INT_R(crate::FieldReader<bool, bool>);
39impl MR0INT_R {
40    pub(crate) fn new(bits: bool) -> Self {
41        MR0INT_R(crate::FieldReader::new(bits))
42    }
43}
44impl core::ops::Deref for MR0INT_R {
45    type Target = crate::FieldReader<bool, bool>;
46    #[inline(always)]
47    fn deref(&self) -> &Self::Target {
48        &self.0
49    }
50}
51#[doc = "Field `MR0INT` writer - Interrupt flag for match channel 0."]
52pub struct MR0INT_W<'a> {
53    w: &'a mut W,
54}
55impl<'a> MR0INT_W<'a> {
56    #[doc = r"Sets the field bit"]
57    #[inline(always)]
58    pub fn set_bit(self) -> &'a mut W {
59        self.bit(true)
60    }
61    #[doc = r"Clears the field bit"]
62    #[inline(always)]
63    pub fn clear_bit(self) -> &'a mut W {
64        self.bit(false)
65    }
66    #[doc = r"Writes raw bits to the field"]
67    #[inline(always)]
68    pub fn bit(self, value: bool) -> &'a mut W {
69        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
70        self.w
71    }
72}
73#[doc = "Field `MR1INT` reader - Interrupt flag for match channel 1."]
74pub struct MR1INT_R(crate::FieldReader<bool, bool>);
75impl MR1INT_R {
76    pub(crate) fn new(bits: bool) -> Self {
77        MR1INT_R(crate::FieldReader::new(bits))
78    }
79}
80impl core::ops::Deref for MR1INT_R {
81    type Target = crate::FieldReader<bool, bool>;
82    #[inline(always)]
83    fn deref(&self) -> &Self::Target {
84        &self.0
85    }
86}
87#[doc = "Field `MR1INT` writer - Interrupt flag for match channel 1."]
88pub struct MR1INT_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> MR1INT_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
106        self.w
107    }
108}
109#[doc = "Field `MR2INT` reader - Interrupt flag for match channel 2."]
110pub struct MR2INT_R(crate::FieldReader<bool, bool>);
111impl MR2INT_R {
112    pub(crate) fn new(bits: bool) -> Self {
113        MR2INT_R(crate::FieldReader::new(bits))
114    }
115}
116impl core::ops::Deref for MR2INT_R {
117    type Target = crate::FieldReader<bool, bool>;
118    #[inline(always)]
119    fn deref(&self) -> &Self::Target {
120        &self.0
121    }
122}
123#[doc = "Field `MR2INT` writer - Interrupt flag for match channel 2."]
124pub struct MR2INT_W<'a> {
125    w: &'a mut W,
126}
127impl<'a> MR2INT_W<'a> {
128    #[doc = r"Sets the field bit"]
129    #[inline(always)]
130    pub fn set_bit(self) -> &'a mut W {
131        self.bit(true)
132    }
133    #[doc = r"Clears the field bit"]
134    #[inline(always)]
135    pub fn clear_bit(self) -> &'a mut W {
136        self.bit(false)
137    }
138    #[doc = r"Writes raw bits to the field"]
139    #[inline(always)]
140    pub fn bit(self, value: bool) -> &'a mut W {
141        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
142        self.w
143    }
144}
145#[doc = "Field `MR3INT` reader - Interrupt flag for match channel 3."]
146pub struct MR3INT_R(crate::FieldReader<bool, bool>);
147impl MR3INT_R {
148    pub(crate) fn new(bits: bool) -> Self {
149        MR3INT_R(crate::FieldReader::new(bits))
150    }
151}
152impl core::ops::Deref for MR3INT_R {
153    type Target = crate::FieldReader<bool, bool>;
154    #[inline(always)]
155    fn deref(&self) -> &Self::Target {
156        &self.0
157    }
158}
159#[doc = "Field `MR3INT` writer - Interrupt flag for match channel 3."]
160pub struct MR3INT_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> MR3INT_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
178        self.w
179    }
180}
181#[doc = "Field `CR0INT` reader - Interrupt flag for capture channel 0 event."]
182pub struct CR0INT_R(crate::FieldReader<bool, bool>);
183impl CR0INT_R {
184    pub(crate) fn new(bits: bool) -> Self {
185        CR0INT_R(crate::FieldReader::new(bits))
186    }
187}
188impl core::ops::Deref for CR0INT_R {
189    type Target = crate::FieldReader<bool, bool>;
190    #[inline(always)]
191    fn deref(&self) -> &Self::Target {
192        &self.0
193    }
194}
195#[doc = "Field `CR0INT` writer - Interrupt flag for capture channel 0 event."]
196pub struct CR0INT_W<'a> {
197    w: &'a mut W,
198}
199impl<'a> CR0INT_W<'a> {
200    #[doc = r"Sets the field bit"]
201    #[inline(always)]
202    pub fn set_bit(self) -> &'a mut W {
203        self.bit(true)
204    }
205    #[doc = r"Clears the field bit"]
206    #[inline(always)]
207    pub fn clear_bit(self) -> &'a mut W {
208        self.bit(false)
209    }
210    #[doc = r"Writes raw bits to the field"]
211    #[inline(always)]
212    pub fn bit(self, value: bool) -> &'a mut W {
213        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
214        self.w
215    }
216}
217#[doc = "Field `CR1INT` reader - Interrupt flag for capture channel 1 event."]
218pub struct CR1INT_R(crate::FieldReader<bool, bool>);
219impl CR1INT_R {
220    pub(crate) fn new(bits: bool) -> Self {
221        CR1INT_R(crate::FieldReader::new(bits))
222    }
223}
224impl core::ops::Deref for CR1INT_R {
225    type Target = crate::FieldReader<bool, bool>;
226    #[inline(always)]
227    fn deref(&self) -> &Self::Target {
228        &self.0
229    }
230}
231#[doc = "Field `CR1INT` writer - Interrupt flag for capture channel 1 event."]
232pub struct CR1INT_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> CR1INT_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
250        self.w
251    }
252}
253#[doc = "Field `CR2INT` reader - Interrupt flag for capture channel 2 event."]
254pub struct CR2INT_R(crate::FieldReader<bool, bool>);
255impl CR2INT_R {
256    pub(crate) fn new(bits: bool) -> Self {
257        CR2INT_R(crate::FieldReader::new(bits))
258    }
259}
260impl core::ops::Deref for CR2INT_R {
261    type Target = crate::FieldReader<bool, bool>;
262    #[inline(always)]
263    fn deref(&self) -> &Self::Target {
264        &self.0
265    }
266}
267#[doc = "Field `CR2INT` writer - Interrupt flag for capture channel 2 event."]
268pub struct CR2INT_W<'a> {
269    w: &'a mut W,
270}
271impl<'a> CR2INT_W<'a> {
272    #[doc = r"Sets the field bit"]
273    #[inline(always)]
274    pub fn set_bit(self) -> &'a mut W {
275        self.bit(true)
276    }
277    #[doc = r"Clears the field bit"]
278    #[inline(always)]
279    pub fn clear_bit(self) -> &'a mut W {
280        self.bit(false)
281    }
282    #[doc = r"Writes raw bits to the field"]
283    #[inline(always)]
284    pub fn bit(self, value: bool) -> &'a mut W {
285        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
286        self.w
287    }
288}
289#[doc = "Field `CR3INT` reader - Interrupt flag for capture channel 3 event."]
290pub struct CR3INT_R(crate::FieldReader<bool, bool>);
291impl CR3INT_R {
292    pub(crate) fn new(bits: bool) -> Self {
293        CR3INT_R(crate::FieldReader::new(bits))
294    }
295}
296impl core::ops::Deref for CR3INT_R {
297    type Target = crate::FieldReader<bool, bool>;
298    #[inline(always)]
299    fn deref(&self) -> &Self::Target {
300        &self.0
301    }
302}
303#[doc = "Field `CR3INT` writer - Interrupt flag for capture channel 3 event."]
304pub struct CR3INT_W<'a> {
305    w: &'a mut W,
306}
307impl<'a> CR3INT_W<'a> {
308    #[doc = r"Sets the field bit"]
309    #[inline(always)]
310    pub fn set_bit(self) -> &'a mut W {
311        self.bit(true)
312    }
313    #[doc = r"Clears the field bit"]
314    #[inline(always)]
315    pub fn clear_bit(self) -> &'a mut W {
316        self.bit(false)
317    }
318    #[doc = r"Writes raw bits to the field"]
319    #[inline(always)]
320    pub fn bit(self, value: bool) -> &'a mut W {
321        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
322        self.w
323    }
324}
325impl R {
326    #[doc = "Bit 0 - Interrupt flag for match channel 0."]
327    #[inline(always)]
328    pub fn mr0int(&self) -> MR0INT_R {
329        MR0INT_R::new((self.bits & 0x01) != 0)
330    }
331    #[doc = "Bit 1 - Interrupt flag for match channel 1."]
332    #[inline(always)]
333    pub fn mr1int(&self) -> MR1INT_R {
334        MR1INT_R::new(((self.bits >> 1) & 0x01) != 0)
335    }
336    #[doc = "Bit 2 - Interrupt flag for match channel 2."]
337    #[inline(always)]
338    pub fn mr2int(&self) -> MR2INT_R {
339        MR2INT_R::new(((self.bits >> 2) & 0x01) != 0)
340    }
341    #[doc = "Bit 3 - Interrupt flag for match channel 3."]
342    #[inline(always)]
343    pub fn mr3int(&self) -> MR3INT_R {
344        MR3INT_R::new(((self.bits >> 3) & 0x01) != 0)
345    }
346    #[doc = "Bit 4 - Interrupt flag for capture channel 0 event."]
347    #[inline(always)]
348    pub fn cr0int(&self) -> CR0INT_R {
349        CR0INT_R::new(((self.bits >> 4) & 0x01) != 0)
350    }
351    #[doc = "Bit 5 - Interrupt flag for capture channel 1 event."]
352    #[inline(always)]
353    pub fn cr1int(&self) -> CR1INT_R {
354        CR1INT_R::new(((self.bits >> 5) & 0x01) != 0)
355    }
356    #[doc = "Bit 6 - Interrupt flag for capture channel 2 event."]
357    #[inline(always)]
358    pub fn cr2int(&self) -> CR2INT_R {
359        CR2INT_R::new(((self.bits >> 6) & 0x01) != 0)
360    }
361    #[doc = "Bit 7 - Interrupt flag for capture channel 3 event."]
362    #[inline(always)]
363    pub fn cr3int(&self) -> CR3INT_R {
364        CR3INT_R::new(((self.bits >> 7) & 0x01) != 0)
365    }
366}
367impl W {
368    #[doc = "Bit 0 - Interrupt flag for match channel 0."]
369    #[inline(always)]
370    pub fn mr0int(&mut self) -> MR0INT_W {
371        MR0INT_W { w: self }
372    }
373    #[doc = "Bit 1 - Interrupt flag for match channel 1."]
374    #[inline(always)]
375    pub fn mr1int(&mut self) -> MR1INT_W {
376        MR1INT_W { w: self }
377    }
378    #[doc = "Bit 2 - Interrupt flag for match channel 2."]
379    #[inline(always)]
380    pub fn mr2int(&mut self) -> MR2INT_W {
381        MR2INT_W { w: self }
382    }
383    #[doc = "Bit 3 - Interrupt flag for match channel 3."]
384    #[inline(always)]
385    pub fn mr3int(&mut self) -> MR3INT_W {
386        MR3INT_W { w: self }
387    }
388    #[doc = "Bit 4 - Interrupt flag for capture channel 0 event."]
389    #[inline(always)]
390    pub fn cr0int(&mut self) -> CR0INT_W {
391        CR0INT_W { w: self }
392    }
393    #[doc = "Bit 5 - Interrupt flag for capture channel 1 event."]
394    #[inline(always)]
395    pub fn cr1int(&mut self) -> CR1INT_W {
396        CR1INT_W { w: self }
397    }
398    #[doc = "Bit 6 - Interrupt flag for capture channel 2 event."]
399    #[inline(always)]
400    pub fn cr2int(&mut self) -> CR2INT_W {
401        CR2INT_W { w: self }
402    }
403    #[doc = "Bit 7 - Interrupt flag for capture channel 3 event."]
404    #[inline(always)]
405    pub fn cr3int(&mut self) -> CR3INT_W {
406        CR3INT_W { w: self }
407    }
408    #[doc = "Writes raw bits to the register."]
409    #[inline(always)]
410    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
411        self.0.bits(bits);
412        self
413    }
414}
415#[doc = "Interrupt Register. The IR can be written to clear interrupts. The IR can be read to identify which of eight possible interrupt sources are pending.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ir](index.html) module"]
416pub struct IR_SPEC;
417impl crate::RegisterSpec for IR_SPEC {
418    type Ux = u32;
419}
420#[doc = "`read()` method returns [ir::R](R) reader structure"]
421impl crate::Readable for IR_SPEC {
422    type Reader = R;
423}
424#[doc = "`write(|w| ..)` method takes [ir::W](W) writer structure"]
425impl crate::Writable for IR_SPEC {
426    type Writer = W;
427}
428#[doc = "`reset()` method sets IR to value 0"]
429impl crate::Resettable for IR_SPEC {
430    #[inline(always)]
431    fn reset_value() -> Self::Ux {
432        0
433    }
434}
lpc845_pac/ctimer0/ir.rs

lpc845_pac/ctimer0/
ir.rs
