lpc845_pac/gpio/
dirclr.rs

1#[doc = "Register `DIRCLR[%s]` writer"]
2pub struct W(crate::W<DIRCLR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<DIRCLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<DIRCLR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<DIRCLR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `DIRCLRP` writer - Clear direction bits (bit 0 = PIOn_0, bit 1 = PIOn_1, etc.). Supported pins depends on the specific device and package. 0 = No operation. 1 = Clear direction bit."]
23pub struct DIRCLRP_W<'a> {
24    w: &'a mut W,
25}
26impl<'a> DIRCLRP_W<'a> {
27    #[doc = r"Writes raw bits to the field"]
28    #[inline(always)]
29    pub unsafe fn bits(self, value: u32) -> &'a mut W {
30        self.w.bits = (self.w.bits & !0x1fff_ffff) | (value as u32 & 0x1fff_ffff);
31        self.w
32    }
33}
34impl W {
35    #[doc = "Bits 0:28 - Clear direction bits (bit 0 = PIOn_0, bit 1 = PIOn_1, etc.). Supported pins depends on the specific device and package. 0 = No operation. 1 = Clear direction bit."]
36    #[inline(always)]
37    pub fn dirclrp(&mut self) -> DIRCLRP_W {
38        DIRCLRP_W { w: self }
39    }
40    #[doc = "Writes raw bits to the register."]
41    #[inline(always)]
42    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
43        self.0.bits(bits);
44        self
45    }
46}
47#[doc = "Clear pin direction bits for port\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dirclr](index.html) module"]
48pub struct DIRCLR_SPEC;
49impl crate::RegisterSpec for DIRCLR_SPEC {
50    type Ux = u32;
51}
52#[doc = "`write(|w| ..)` method takes [dirclr::W](W) writer structure"]
53impl crate::Writable for DIRCLR_SPEC {
54    type Writer = W;
55}
56#[doc = "`reset()` method sets DIRCLR[%s]
57to value 0"]
58impl crate::Resettable for DIRCLR_SPEC {
59    #[inline(always)]
60    fn reset_value() -> Self::Ux {
61        0
62    }
63}
lpc845_pac/gpio/dirclr.rs

lpc845_pac/gpio/
dirclr.rs
