lpc82x_pac/adc0/
flags.rs

1#[doc = "Register `FLAGS` reader"]
2pub struct R(crate::R<FLAGS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FLAGS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FLAGS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FLAGS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FLAGS` writer"]
17pub struct W(crate::W<FLAGS_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FLAGS_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FLAGS_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FLAGS_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `THCMP0` reader - Threshold comparison event on Channel 0. Set to 1 upon either an out-of-range result or a threshold-crossing result if enabled to do so in the INTEN register. This bit is cleared by writing a 1."]
38pub struct THCMP0_R(crate::FieldReader<bool, bool>);
39impl THCMP0_R {
40    pub(crate) fn new(bits: bool) -> Self {
41        THCMP0_R(crate::FieldReader::new(bits))
42    }
43}
44impl core::ops::Deref for THCMP0_R {
45    type Target = crate::FieldReader<bool, bool>;
46    #[inline(always)]
47    fn deref(&self) -> &Self::Target {
48        &self.0
49    }
50}
51#[doc = "Field `THCMP0` writer - Threshold comparison event on Channel 0. Set to 1 upon either an out-of-range result or a threshold-crossing result if enabled to do so in the INTEN register. This bit is cleared by writing a 1."]
52pub struct THCMP0_W<'a> {
53    w: &'a mut W,
54}
55impl<'a> THCMP0_W<'a> {
56    #[doc = r"Sets the field bit"]
57    #[inline(always)]
58    pub fn set_bit(self) -> &'a mut W {
59        self.bit(true)
60    }
61    #[doc = r"Clears the field bit"]
62    #[inline(always)]
63    pub fn clear_bit(self) -> &'a mut W {
64        self.bit(false)
65    }
66    #[doc = r"Writes raw bits to the field"]
67    #[inline(always)]
68    pub fn bit(self, value: bool) -> &'a mut W {
69        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
70        self.w
71    }
72}
73#[doc = "Field `THCMP1` reader - Threshold comparison event on Channel 1. See description for channel 0."]
74pub struct THCMP1_R(crate::FieldReader<bool, bool>);
75impl THCMP1_R {
76    pub(crate) fn new(bits: bool) -> Self {
77        THCMP1_R(crate::FieldReader::new(bits))
78    }
79}
80impl core::ops::Deref for THCMP1_R {
81    type Target = crate::FieldReader<bool, bool>;
82    #[inline(always)]
83    fn deref(&self) -> &Self::Target {
84        &self.0
85    }
86}
87#[doc = "Field `THCMP1` writer - Threshold comparison event on Channel 1. See description for channel 0."]
88pub struct THCMP1_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> THCMP1_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
106        self.w
107    }
108}
109#[doc = "Field `THCMP2` reader - Threshold comparison event on Channel 2. See description for channel 0."]
110pub struct THCMP2_R(crate::FieldReader<bool, bool>);
111impl THCMP2_R {
112    pub(crate) fn new(bits: bool) -> Self {
113        THCMP2_R(crate::FieldReader::new(bits))
114    }
115}
116impl core::ops::Deref for THCMP2_R {
117    type Target = crate::FieldReader<bool, bool>;
118    #[inline(always)]
119    fn deref(&self) -> &Self::Target {
120        &self.0
121    }
122}
123#[doc = "Field `THCMP2` writer - Threshold comparison event on Channel 2. See description for channel 0."]
124pub struct THCMP2_W<'a> {
125    w: &'a mut W,
126}
127impl<'a> THCMP2_W<'a> {
128    #[doc = r"Sets the field bit"]
129    #[inline(always)]
130    pub fn set_bit(self) -> &'a mut W {
131        self.bit(true)
132    }
133    #[doc = r"Clears the field bit"]
134    #[inline(always)]
135    pub fn clear_bit(self) -> &'a mut W {
136        self.bit(false)
137    }
138    #[doc = r"Writes raw bits to the field"]
139    #[inline(always)]
140    pub fn bit(self, value: bool) -> &'a mut W {
141        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
142        self.w
143    }
144}
145#[doc = "Field `THCMP3` reader - Threshold comparison event on Channel 3. See description for channel 0."]
146pub struct THCMP3_R(crate::FieldReader<bool, bool>);
147impl THCMP3_R {
148    pub(crate) fn new(bits: bool) -> Self {
149        THCMP3_R(crate::FieldReader::new(bits))
150    }
151}
152impl core::ops::Deref for THCMP3_R {
153    type Target = crate::FieldReader<bool, bool>;
154    #[inline(always)]
155    fn deref(&self) -> &Self::Target {
156        &self.0
157    }
158}
159#[doc = "Field `THCMP3` writer - Threshold comparison event on Channel 3. See description for channel 0."]
160pub struct THCMP3_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> THCMP3_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
178        self.w
179    }
180}
181#[doc = "Field `THCMP4` reader - Threshold comparison event on Channel 4. See description for channel 0."]
182pub struct THCMP4_R(crate::FieldReader<bool, bool>);
183impl THCMP4_R {
184    pub(crate) fn new(bits: bool) -> Self {
185        THCMP4_R(crate::FieldReader::new(bits))
186    }
187}
188impl core::ops::Deref for THCMP4_R {
189    type Target = crate::FieldReader<bool, bool>;
190    #[inline(always)]
191    fn deref(&self) -> &Self::Target {
192        &self.0
193    }
194}
195#[doc = "Field `THCMP4` writer - Threshold comparison event on Channel 4. See description for channel 0."]
196pub struct THCMP4_W<'a> {
197    w: &'a mut W,
198}
199impl<'a> THCMP4_W<'a> {
200    #[doc = r"Sets the field bit"]
201    #[inline(always)]
202    pub fn set_bit(self) -> &'a mut W {
203        self.bit(true)
204    }
205    #[doc = r"Clears the field bit"]
206    #[inline(always)]
207    pub fn clear_bit(self) -> &'a mut W {
208        self.bit(false)
209    }
210    #[doc = r"Writes raw bits to the field"]
211    #[inline(always)]
212    pub fn bit(self, value: bool) -> &'a mut W {
213        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
214        self.w
215    }
216}
217#[doc = "Field `THCMP5` reader - Threshold comparison event on Channel 5. See description for channel 0."]
218pub struct THCMP5_R(crate::FieldReader<bool, bool>);
219impl THCMP5_R {
220    pub(crate) fn new(bits: bool) -> Self {
221        THCMP5_R(crate::FieldReader::new(bits))
222    }
223}
224impl core::ops::Deref for THCMP5_R {
225    type Target = crate::FieldReader<bool, bool>;
226    #[inline(always)]
227    fn deref(&self) -> &Self::Target {
228        &self.0
229    }
230}
231#[doc = "Field `THCMP5` writer - Threshold comparison event on Channel 5. See description for channel 0."]
232pub struct THCMP5_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> THCMP5_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
250        self.w
251    }
252}
253#[doc = "Field `THCMP6` reader - Threshold comparison event on Channel 6. See description for channel 0."]
254pub struct THCMP6_R(crate::FieldReader<bool, bool>);
255impl THCMP6_R {
256    pub(crate) fn new(bits: bool) -> Self {
257        THCMP6_R(crate::FieldReader::new(bits))
258    }
259}
260impl core::ops::Deref for THCMP6_R {
261    type Target = crate::FieldReader<bool, bool>;
262    #[inline(always)]
263    fn deref(&self) -> &Self::Target {
264        &self.0
265    }
266}
267#[doc = "Field `THCMP6` writer - Threshold comparison event on Channel 6. See description for channel 0."]
268pub struct THCMP6_W<'a> {
269    w: &'a mut W,
270}
271impl<'a> THCMP6_W<'a> {
272    #[doc = r"Sets the field bit"]
273    #[inline(always)]
274    pub fn set_bit(self) -> &'a mut W {
275        self.bit(true)
276    }
277    #[doc = r"Clears the field bit"]
278    #[inline(always)]
279    pub fn clear_bit(self) -> &'a mut W {
280        self.bit(false)
281    }
282    #[doc = r"Writes raw bits to the field"]
283    #[inline(always)]
284    pub fn bit(self, value: bool) -> &'a mut W {
285        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
286        self.w
287    }
288}
289#[doc = "Field `THCMP7` reader - Threshold comparison event on Channel 7. See description for channel 0."]
290pub struct THCMP7_R(crate::FieldReader<bool, bool>);
291impl THCMP7_R {
292    pub(crate) fn new(bits: bool) -> Self {
293        THCMP7_R(crate::FieldReader::new(bits))
294    }
295}
296impl core::ops::Deref for THCMP7_R {
297    type Target = crate::FieldReader<bool, bool>;
298    #[inline(always)]
299    fn deref(&self) -> &Self::Target {
300        &self.0
301    }
302}
303#[doc = "Field `THCMP7` writer - Threshold comparison event on Channel 7. See description for channel 0."]
304pub struct THCMP7_W<'a> {
305    w: &'a mut W,
306}
307impl<'a> THCMP7_W<'a> {
308    #[doc = r"Sets the field bit"]
309    #[inline(always)]
310    pub fn set_bit(self) -> &'a mut W {
311        self.bit(true)
312    }
313    #[doc = r"Clears the field bit"]
314    #[inline(always)]
315    pub fn clear_bit(self) -> &'a mut W {
316        self.bit(false)
317    }
318    #[doc = r"Writes raw bits to the field"]
319    #[inline(always)]
320    pub fn bit(self, value: bool) -> &'a mut W {
321        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
322        self.w
323    }
324}
325#[doc = "Field `THCMP8` reader - Threshold comparison event on Channel 8. See description for channel 0."]
326pub struct THCMP8_R(crate::FieldReader<bool, bool>);
327impl THCMP8_R {
328    pub(crate) fn new(bits: bool) -> Self {
329        THCMP8_R(crate::FieldReader::new(bits))
330    }
331}
332impl core::ops::Deref for THCMP8_R {
333    type Target = crate::FieldReader<bool, bool>;
334    #[inline(always)]
335    fn deref(&self) -> &Self::Target {
336        &self.0
337    }
338}
339#[doc = "Field `THCMP8` writer - Threshold comparison event on Channel 8. See description for channel 0."]
340pub struct THCMP8_W<'a> {
341    w: &'a mut W,
342}
343impl<'a> THCMP8_W<'a> {
344    #[doc = r"Sets the field bit"]
345    #[inline(always)]
346    pub fn set_bit(self) -> &'a mut W {
347        self.bit(true)
348    }
349    #[doc = r"Clears the field bit"]
350    #[inline(always)]
351    pub fn clear_bit(self) -> &'a mut W {
352        self.bit(false)
353    }
354    #[doc = r"Writes raw bits to the field"]
355    #[inline(always)]
356    pub fn bit(self, value: bool) -> &'a mut W {
357        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
358        self.w
359    }
360}
361#[doc = "Field `THCMP9` reader - Threshold comparison event on Channel 9. See description for channel 0."]
362pub struct THCMP9_R(crate::FieldReader<bool, bool>);
363impl THCMP9_R {
364    pub(crate) fn new(bits: bool) -> Self {
365        THCMP9_R(crate::FieldReader::new(bits))
366    }
367}
368impl core::ops::Deref for THCMP9_R {
369    type Target = crate::FieldReader<bool, bool>;
370    #[inline(always)]
371    fn deref(&self) -> &Self::Target {
372        &self.0
373    }
374}
375#[doc = "Field `THCMP9` writer - Threshold comparison event on Channel 9. See description for channel 0."]
376pub struct THCMP9_W<'a> {
377    w: &'a mut W,
378}
379impl<'a> THCMP9_W<'a> {
380    #[doc = r"Sets the field bit"]
381    #[inline(always)]
382    pub fn set_bit(self) -> &'a mut W {
383        self.bit(true)
384    }
385    #[doc = r"Clears the field bit"]
386    #[inline(always)]
387    pub fn clear_bit(self) -> &'a mut W {
388        self.bit(false)
389    }
390    #[doc = r"Writes raw bits to the field"]
391    #[inline(always)]
392    pub fn bit(self, value: bool) -> &'a mut W {
393        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
394        self.w
395    }
396}
397#[doc = "Field `THCMP10` reader - Threshold comparison event on Channel 10. See description for channel 0."]
398pub struct THCMP10_R(crate::FieldReader<bool, bool>);
399impl THCMP10_R {
400    pub(crate) fn new(bits: bool) -> Self {
401        THCMP10_R(crate::FieldReader::new(bits))
402    }
403}
404impl core::ops::Deref for THCMP10_R {
405    type Target = crate::FieldReader<bool, bool>;
406    #[inline(always)]
407    fn deref(&self) -> &Self::Target {
408        &self.0
409    }
410}
411#[doc = "Field `THCMP10` writer - Threshold comparison event on Channel 10. See description for channel 0."]
412pub struct THCMP10_W<'a> {
413    w: &'a mut W,
414}
415impl<'a> THCMP10_W<'a> {
416    #[doc = r"Sets the field bit"]
417    #[inline(always)]
418    pub fn set_bit(self) -> &'a mut W {
419        self.bit(true)
420    }
421    #[doc = r"Clears the field bit"]
422    #[inline(always)]
423    pub fn clear_bit(self) -> &'a mut W {
424        self.bit(false)
425    }
426    #[doc = r"Writes raw bits to the field"]
427    #[inline(always)]
428    pub fn bit(self, value: bool) -> &'a mut W {
429        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
430        self.w
431    }
432}
433#[doc = "Field `THCMP11` reader - Threshold comparison event on Channel 11. See description for channel 0."]
434pub struct THCMP11_R(crate::FieldReader<bool, bool>);
435impl THCMP11_R {
436    pub(crate) fn new(bits: bool) -> Self {
437        THCMP11_R(crate::FieldReader::new(bits))
438    }
439}
440impl core::ops::Deref for THCMP11_R {
441    type Target = crate::FieldReader<bool, bool>;
442    #[inline(always)]
443    fn deref(&self) -> &Self::Target {
444        &self.0
445    }
446}
447#[doc = "Field `THCMP11` writer - Threshold comparison event on Channel 11. See description for channel 0."]
448pub struct THCMP11_W<'a> {
449    w: &'a mut W,
450}
451impl<'a> THCMP11_W<'a> {
452    #[doc = r"Sets the field bit"]
453    #[inline(always)]
454    pub fn set_bit(self) -> &'a mut W {
455        self.bit(true)
456    }
457    #[doc = r"Clears the field bit"]
458    #[inline(always)]
459    pub fn clear_bit(self) -> &'a mut W {
460        self.bit(false)
461    }
462    #[doc = r"Writes raw bits to the field"]
463    #[inline(always)]
464    pub fn bit(self, value: bool) -> &'a mut W {
465        self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
466        self.w
467    }
468}
469#[doc = "Field `OVERRUN0` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 0"]
470pub struct OVERRUN0_R(crate::FieldReader<bool, bool>);
471impl OVERRUN0_R {
472    pub(crate) fn new(bits: bool) -> Self {
473        OVERRUN0_R(crate::FieldReader::new(bits))
474    }
475}
476impl core::ops::Deref for OVERRUN0_R {
477    type Target = crate::FieldReader<bool, bool>;
478    #[inline(always)]
479    fn deref(&self) -> &Self::Target {
480        &self.0
481    }
482}
483#[doc = "Field `OVERRUN1` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 1"]
484pub struct OVERRUN1_R(crate::FieldReader<bool, bool>);
485impl OVERRUN1_R {
486    pub(crate) fn new(bits: bool) -> Self {
487        OVERRUN1_R(crate::FieldReader::new(bits))
488    }
489}
490impl core::ops::Deref for OVERRUN1_R {
491    type Target = crate::FieldReader<bool, bool>;
492    #[inline(always)]
493    fn deref(&self) -> &Self::Target {
494        &self.0
495    }
496}
497#[doc = "Field `OVERRUN2` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 2"]
498pub struct OVERRUN2_R(crate::FieldReader<bool, bool>);
499impl OVERRUN2_R {
500    pub(crate) fn new(bits: bool) -> Self {
501        OVERRUN2_R(crate::FieldReader::new(bits))
502    }
503}
504impl core::ops::Deref for OVERRUN2_R {
505    type Target = crate::FieldReader<bool, bool>;
506    #[inline(always)]
507    fn deref(&self) -> &Self::Target {
508        &self.0
509    }
510}
511#[doc = "Field `OVERRUN3` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 3"]
512pub struct OVERRUN3_R(crate::FieldReader<bool, bool>);
513impl OVERRUN3_R {
514    pub(crate) fn new(bits: bool) -> Self {
515        OVERRUN3_R(crate::FieldReader::new(bits))
516    }
517}
518impl core::ops::Deref for OVERRUN3_R {
519    type Target = crate::FieldReader<bool, bool>;
520    #[inline(always)]
521    fn deref(&self) -> &Self::Target {
522        &self.0
523    }
524}
525#[doc = "Field `OVERRUN4` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 4"]
526pub struct OVERRUN4_R(crate::FieldReader<bool, bool>);
527impl OVERRUN4_R {
528    pub(crate) fn new(bits: bool) -> Self {
529        OVERRUN4_R(crate::FieldReader::new(bits))
530    }
531}
532impl core::ops::Deref for OVERRUN4_R {
533    type Target = crate::FieldReader<bool, bool>;
534    #[inline(always)]
535    fn deref(&self) -> &Self::Target {
536        &self.0
537    }
538}
539#[doc = "Field `OVERRUN5` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 5"]
540pub struct OVERRUN5_R(crate::FieldReader<bool, bool>);
541impl OVERRUN5_R {
542    pub(crate) fn new(bits: bool) -> Self {
543        OVERRUN5_R(crate::FieldReader::new(bits))
544    }
545}
546impl core::ops::Deref for OVERRUN5_R {
547    type Target = crate::FieldReader<bool, bool>;
548    #[inline(always)]
549    fn deref(&self) -> &Self::Target {
550        &self.0
551    }
552}
553#[doc = "Field `OVERRUN6` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 6"]
554pub struct OVERRUN6_R(crate::FieldReader<bool, bool>);
555impl OVERRUN6_R {
556    pub(crate) fn new(bits: bool) -> Self {
557        OVERRUN6_R(crate::FieldReader::new(bits))
558    }
559}
560impl core::ops::Deref for OVERRUN6_R {
561    type Target = crate::FieldReader<bool, bool>;
562    #[inline(always)]
563    fn deref(&self) -> &Self::Target {
564        &self.0
565    }
566}
567#[doc = "Field `OVERRUN7` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 7"]
568pub struct OVERRUN7_R(crate::FieldReader<bool, bool>);
569impl OVERRUN7_R {
570    pub(crate) fn new(bits: bool) -> Self {
571        OVERRUN7_R(crate::FieldReader::new(bits))
572    }
573}
574impl core::ops::Deref for OVERRUN7_R {
575    type Target = crate::FieldReader<bool, bool>;
576    #[inline(always)]
577    fn deref(&self) -> &Self::Target {
578        &self.0
579    }
580}
581#[doc = "Field `OVERRUN8` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 8"]
582pub struct OVERRUN8_R(crate::FieldReader<bool, bool>);
583impl OVERRUN8_R {
584    pub(crate) fn new(bits: bool) -> Self {
585        OVERRUN8_R(crate::FieldReader::new(bits))
586    }
587}
588impl core::ops::Deref for OVERRUN8_R {
589    type Target = crate::FieldReader<bool, bool>;
590    #[inline(always)]
591    fn deref(&self) -> &Self::Target {
592        &self.0
593    }
594}
595#[doc = "Field `OVERRUN9` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 9"]
596pub struct OVERRUN9_R(crate::FieldReader<bool, bool>);
597impl OVERRUN9_R {
598    pub(crate) fn new(bits: bool) -> Self {
599        OVERRUN9_R(crate::FieldReader::new(bits))
600    }
601}
602impl core::ops::Deref for OVERRUN9_R {
603    type Target = crate::FieldReader<bool, bool>;
604    #[inline(always)]
605    fn deref(&self) -> &Self::Target {
606        &self.0
607    }
608}
609#[doc = "Field `OVERRUN10` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 10"]
610pub struct OVERRUN10_R(crate::FieldReader<bool, bool>);
611impl OVERRUN10_R {
612    pub(crate) fn new(bits: bool) -> Self {
613        OVERRUN10_R(crate::FieldReader::new(bits))
614    }
615}
616impl core::ops::Deref for OVERRUN10_R {
617    type Target = crate::FieldReader<bool, bool>;
618    #[inline(always)]
619    fn deref(&self) -> &Self::Target {
620        &self.0
621    }
622}
623#[doc = "Field `OVERRUN11` reader - Mirrors the OVERRRUN status flag from the result register for ADC channel 11"]
624pub struct OVERRUN11_R(crate::FieldReader<bool, bool>);
625impl OVERRUN11_R {
626    pub(crate) fn new(bits: bool) -> Self {
627        OVERRUN11_R(crate::FieldReader::new(bits))
628    }
629}
630impl core::ops::Deref for OVERRUN11_R {
631    type Target = crate::FieldReader<bool, bool>;
632    #[inline(always)]
633    fn deref(&self) -> &Self::Target {
634        &self.0
635    }
636}
637#[doc = "Field `SEQA_OVR` reader - Mirrors the global OVERRUN status flag in the SEQA_GDAT register"]
638pub struct SEQA_OVR_R(crate::FieldReader<bool, bool>);
639impl SEQA_OVR_R {
640    pub(crate) fn new(bits: bool) -> Self {
641        SEQA_OVR_R(crate::FieldReader::new(bits))
642    }
643}
644impl core::ops::Deref for SEQA_OVR_R {
645    type Target = crate::FieldReader<bool, bool>;
646    #[inline(always)]
647    fn deref(&self) -> &Self::Target {
648        &self.0
649    }
650}
651#[doc = "Field `SEQB_OVR` reader - Mirrors the global OVERRUN status flag in the SEQB_GDAT register"]
652pub struct SEQB_OVR_R(crate::FieldReader<bool, bool>);
653impl SEQB_OVR_R {
654    pub(crate) fn new(bits: bool) -> Self {
655        SEQB_OVR_R(crate::FieldReader::new(bits))
656    }
657}
658impl core::ops::Deref for SEQB_OVR_R {
659    type Target = crate::FieldReader<bool, bool>;
660    #[inline(always)]
661    fn deref(&self) -> &Self::Target {
662        &self.0
663    }
664}
665#[doc = "Field `SEQA_INT` reader - Sequence A interrupt/DMA trigger. If the MODE bit in the SEQA_CTRL register is 0, this flag will mirror the DATAVALID bit in the sequence A global data register (SEQA_GDAT), which is set at the end of every ADC conversion performed as part of sequence A. It will be cleared automatically when the SEQA_GDAT register is read. If the MODE bit in the SEQA_CTRL register is 1, this flag will be set upon completion of an entire A sequence. In this case it must be cleared by writing a 1 to this SEQA_INT bit. This interrupt must be enabled in the INTEN register."]
666pub struct SEQA_INT_R(crate::FieldReader<bool, bool>);
667impl SEQA_INT_R {
668    pub(crate) fn new(bits: bool) -> Self {
669        SEQA_INT_R(crate::FieldReader::new(bits))
670    }
671}
672impl core::ops::Deref for SEQA_INT_R {
673    type Target = crate::FieldReader<bool, bool>;
674    #[inline(always)]
675    fn deref(&self) -> &Self::Target {
676        &self.0
677    }
678}
679#[doc = "Field `SEQB_INT` reader - Sequence A interrupt/DMA trigger. If the MODE bit in the SEQB_CTRL register is 0, this flag will mirror the DATAVALID bit in the sequence A global data register (SEQB_GDAT), which is set at the end of every ADC conversion performed as part of sequence B. It will be cleared automatically when the SEQB_GDAT register is read. If the MODE bit in the SEQB_CTRL register is 1, this flag will be set upon completion of an entire B sequence. In this case it must be cleared by writing a 1 to this SEQB_INT bit. This interrupt must be enabled in the INTEN register."]
680pub struct SEQB_INT_R(crate::FieldReader<bool, bool>);
681impl SEQB_INT_R {
682    pub(crate) fn new(bits: bool) -> Self {
683        SEQB_INT_R(crate::FieldReader::new(bits))
684    }
685}
686impl core::ops::Deref for SEQB_INT_R {
687    type Target = crate::FieldReader<bool, bool>;
688    #[inline(always)]
689    fn deref(&self) -> &Self::Target {
690        &self.0
691    }
692}
693#[doc = "Field `THCMP_INT` reader - Threshold Comparison Interrupt. This bit will be set if any of the THCMP flags in the lower bits of this register are set to 1 (due to an enabled out-of-range or threshold-crossing event on any channel). Each type of threshold comparison interrupt on each channel must be individually enabled in the INTEN register to cause this interrupt. This bit will be cleared when all of the individual threshold flags are cleared via writing 1s to those bits."]
694pub struct THCMP_INT_R(crate::FieldReader<bool, bool>);
695impl THCMP_INT_R {
696    pub(crate) fn new(bits: bool) -> Self {
697        THCMP_INT_R(crate::FieldReader::new(bits))
698    }
699}
700impl core::ops::Deref for THCMP_INT_R {
701    type Target = crate::FieldReader<bool, bool>;
702    #[inline(always)]
703    fn deref(&self) -> &Self::Target {
704        &self.0
705    }
706}
707#[doc = "Field `OVR_INT` reader - Overrun Interrupt flag. Any overrun bit in any of the individual channel data registers will cause this interrupt. In addition, if the MODE bit in either of the SEQn_CTRL registers is 0 then the OVERRUN bit in the corresponding SEQn_GDAT register will also cause this interrupt. This interrupt must be enabled in the INTEN register. This bit will be cleared when all of the individual overrun bits have been cleared via reading the corresponding data registers."]
708pub struct OVR_INT_R(crate::FieldReader<bool, bool>);
709impl OVR_INT_R {
710    pub(crate) fn new(bits: bool) -> Self {
711        OVR_INT_R(crate::FieldReader::new(bits))
712    }
713}
714impl core::ops::Deref for OVR_INT_R {
715    type Target = crate::FieldReader<bool, bool>;
716    #[inline(always)]
717    fn deref(&self) -> &Self::Target {
718        &self.0
719    }
720}
721impl R {
722    #[doc = "Bit 0 - Threshold comparison event on Channel 0. Set to 1 upon either an out-of-range result or a threshold-crossing result if enabled to do so in the INTEN register. This bit is cleared by writing a 1."]
723    #[inline(always)]
724    pub fn thcmp0(&self) -> THCMP0_R {
725        THCMP0_R::new((self.bits & 0x01) != 0)
726    }
727    #[doc = "Bit 1 - Threshold comparison event on Channel 1. See description for channel 0."]
728    #[inline(always)]
729    pub fn thcmp1(&self) -> THCMP1_R {
730        THCMP1_R::new(((self.bits >> 1) & 0x01) != 0)
731    }
732    #[doc = "Bit 2 - Threshold comparison event on Channel 2. See description for channel 0."]
733    #[inline(always)]
734    pub fn thcmp2(&self) -> THCMP2_R {
735        THCMP2_R::new(((self.bits >> 2) & 0x01) != 0)
736    }
737    #[doc = "Bit 3 - Threshold comparison event on Channel 3. See description for channel 0."]
738    #[inline(always)]
739    pub fn thcmp3(&self) -> THCMP3_R {
740        THCMP3_R::new(((self.bits >> 3) & 0x01) != 0)
741    }
742    #[doc = "Bit 4 - Threshold comparison event on Channel 4. See description for channel 0."]
743    #[inline(always)]
744    pub fn thcmp4(&self) -> THCMP4_R {
745        THCMP4_R::new(((self.bits >> 4) & 0x01) != 0)
746    }
747    #[doc = "Bit 5 - Threshold comparison event on Channel 5. See description for channel 0."]
748    #[inline(always)]
749    pub fn thcmp5(&self) -> THCMP5_R {
750        THCMP5_R::new(((self.bits >> 5) & 0x01) != 0)
751    }
752    #[doc = "Bit 6 - Threshold comparison event on Channel 6. See description for channel 0."]
753    #[inline(always)]
754    pub fn thcmp6(&self) -> THCMP6_R {
755        THCMP6_R::new(((self.bits >> 6) & 0x01) != 0)
756    }
757    #[doc = "Bit 7 - Threshold comparison event on Channel 7. See description for channel 0."]
758    #[inline(always)]
759    pub fn thcmp7(&self) -> THCMP7_R {
760        THCMP7_R::new(((self.bits >> 7) & 0x01) != 0)
761    }
762    #[doc = "Bit 8 - Threshold comparison event on Channel 8. See description for channel 0."]
763    #[inline(always)]
764    pub fn thcmp8(&self) -> THCMP8_R {
765        THCMP8_R::new(((self.bits >> 8) & 0x01) != 0)
766    }
767    #[doc = "Bit 9 - Threshold comparison event on Channel 9. See description for channel 0."]
768    #[inline(always)]
769    pub fn thcmp9(&self) -> THCMP9_R {
770        THCMP9_R::new(((self.bits >> 9) & 0x01) != 0)
771    }
772    #[doc = "Bit 10 - Threshold comparison event on Channel 10. See description for channel 0."]
773    #[inline(always)]
774    pub fn thcmp10(&self) -> THCMP10_R {
775        THCMP10_R::new(((self.bits >> 10) & 0x01) != 0)
776    }
777    #[doc = "Bit 11 - Threshold comparison event on Channel 11. See description for channel 0."]
778    #[inline(always)]
779    pub fn thcmp11(&self) -> THCMP11_R {
780        THCMP11_R::new(((self.bits >> 11) & 0x01) != 0)
781    }
782    #[doc = "Bit 12 - Mirrors the OVERRRUN status flag from the result register for ADC channel 0"]
783    #[inline(always)]
784    pub fn overrun0(&self) -> OVERRUN0_R {
785        OVERRUN0_R::new(((self.bits >> 12) & 0x01) != 0)
786    }
787    #[doc = "Bit 13 - Mirrors the OVERRRUN status flag from the result register for ADC channel 1"]
788    #[inline(always)]
789    pub fn overrun1(&self) -> OVERRUN1_R {
790        OVERRUN1_R::new(((self.bits >> 13) & 0x01) != 0)
791    }
792    #[doc = "Bit 14 - Mirrors the OVERRRUN status flag from the result register for ADC channel 2"]
793    #[inline(always)]
794    pub fn overrun2(&self) -> OVERRUN2_R {
795        OVERRUN2_R::new(((self.bits >> 14) & 0x01) != 0)
796    }
797    #[doc = "Bit 15 - Mirrors the OVERRRUN status flag from the result register for ADC channel 3"]
798    #[inline(always)]
799    pub fn overrun3(&self) -> OVERRUN3_R {
800        OVERRUN3_R::new(((self.bits >> 15) & 0x01) != 0)
801    }
802    #[doc = "Bit 16 - Mirrors the OVERRRUN status flag from the result register for ADC channel 4"]
803    #[inline(always)]
804    pub fn overrun4(&self) -> OVERRUN4_R {
805        OVERRUN4_R::new(((self.bits >> 16) & 0x01) != 0)
806    }
807    #[doc = "Bit 17 - Mirrors the OVERRRUN status flag from the result register for ADC channel 5"]
808    #[inline(always)]
809    pub fn overrun5(&self) -> OVERRUN5_R {
810        OVERRUN5_R::new(((self.bits >> 17) & 0x01) != 0)
811    }
812    #[doc = "Bit 18 - Mirrors the OVERRRUN status flag from the result register for ADC channel 6"]
813    #[inline(always)]
814    pub fn overrun6(&self) -> OVERRUN6_R {
815        OVERRUN6_R::new(((self.bits >> 18) & 0x01) != 0)
816    }
817    #[doc = "Bit 19 - Mirrors the OVERRRUN status flag from the result register for ADC channel 7"]
818    #[inline(always)]
819    pub fn overrun7(&self) -> OVERRUN7_R {
820        OVERRUN7_R::new(((self.bits >> 19) & 0x01) != 0)
821    }
822    #[doc = "Bit 20 - Mirrors the OVERRRUN status flag from the result register for ADC channel 8"]
823    #[inline(always)]
824    pub fn overrun8(&self) -> OVERRUN8_R {
825        OVERRUN8_R::new(((self.bits >> 20) & 0x01) != 0)
826    }
827    #[doc = "Bit 21 - Mirrors the OVERRRUN status flag from the result register for ADC channel 9"]
828    #[inline(always)]
829    pub fn overrun9(&self) -> OVERRUN9_R {
830        OVERRUN9_R::new(((self.bits >> 21) & 0x01) != 0)
831    }
832    #[doc = "Bit 22 - Mirrors the OVERRRUN status flag from the result register for ADC channel 10"]
833    #[inline(always)]
834    pub fn overrun10(&self) -> OVERRUN10_R {
835        OVERRUN10_R::new(((self.bits >> 22) & 0x01) != 0)
836    }
837    #[doc = "Bit 23 - Mirrors the OVERRRUN status flag from the result register for ADC channel 11"]
838    #[inline(always)]
839    pub fn overrun11(&self) -> OVERRUN11_R {
840        OVERRUN11_R::new(((self.bits >> 23) & 0x01) != 0)
841    }
842    #[doc = "Bit 24 - Mirrors the global OVERRUN status flag in the SEQA_GDAT register"]
843    #[inline(always)]
844    pub fn seqa_ovr(&self) -> SEQA_OVR_R {
845        SEQA_OVR_R::new(((self.bits >> 24) & 0x01) != 0)
846    }
847    #[doc = "Bit 25 - Mirrors the global OVERRUN status flag in the SEQB_GDAT register"]
848    #[inline(always)]
849    pub fn seqb_ovr(&self) -> SEQB_OVR_R {
850        SEQB_OVR_R::new(((self.bits >> 25) & 0x01) != 0)
851    }
852    #[doc = "Bit 28 - Sequence A interrupt/DMA trigger. If the MODE bit in the SEQA_CTRL register is 0, this flag will mirror the DATAVALID bit in the sequence A global data register (SEQA_GDAT), which is set at the end of every ADC conversion performed as part of sequence A. It will be cleared automatically when the SEQA_GDAT register is read. If the MODE bit in the SEQA_CTRL register is 1, this flag will be set upon completion of an entire A sequence. In this case it must be cleared by writing a 1 to this SEQA_INT bit. This interrupt must be enabled in the INTEN register."]
853    #[inline(always)]
854    pub fn seqa_int(&self) -> SEQA_INT_R {
855        SEQA_INT_R::new(((self.bits >> 28) & 0x01) != 0)
856    }
857    #[doc = "Bit 29 - Sequence A interrupt/DMA trigger. If the MODE bit in the SEQB_CTRL register is 0, this flag will mirror the DATAVALID bit in the sequence A global data register (SEQB_GDAT), which is set at the end of every ADC conversion performed as part of sequence B. It will be cleared automatically when the SEQB_GDAT register is read. If the MODE bit in the SEQB_CTRL register is 1, this flag will be set upon completion of an entire B sequence. In this case it must be cleared by writing a 1 to this SEQB_INT bit. This interrupt must be enabled in the INTEN register."]
858    #[inline(always)]
859    pub fn seqb_int(&self) -> SEQB_INT_R {
860        SEQB_INT_R::new(((self.bits >> 29) & 0x01) != 0)
861    }
862    #[doc = "Bit 30 - Threshold Comparison Interrupt. This bit will be set if any of the THCMP flags in the lower bits of this register are set to 1 (due to an enabled out-of-range or threshold-crossing event on any channel). Each type of threshold comparison interrupt on each channel must be individually enabled in the INTEN register to cause this interrupt. This bit will be cleared when all of the individual threshold flags are cleared via writing 1s to those bits."]
863    #[inline(always)]
864    pub fn thcmp_int(&self) -> THCMP_INT_R {
865        THCMP_INT_R::new(((self.bits >> 30) & 0x01) != 0)
866    }
867    #[doc = "Bit 31 - Overrun Interrupt flag. Any overrun bit in any of the individual channel data registers will cause this interrupt. In addition, if the MODE bit in either of the SEQn_CTRL registers is 0 then the OVERRUN bit in the corresponding SEQn_GDAT register will also cause this interrupt. This interrupt must be enabled in the INTEN register. This bit will be cleared when all of the individual overrun bits have been cleared via reading the corresponding data registers."]
868    #[inline(always)]
869    pub fn ovr_int(&self) -> OVR_INT_R {
870        OVR_INT_R::new(((self.bits >> 31) & 0x01) != 0)
871    }
872}
873impl W {
874    #[doc = "Bit 0 - Threshold comparison event on Channel 0. Set to 1 upon either an out-of-range result or a threshold-crossing result if enabled to do so in the INTEN register. This bit is cleared by writing a 1."]
875    #[inline(always)]
876    pub fn thcmp0(&mut self) -> THCMP0_W {
877        THCMP0_W { w: self }
878    }
879    #[doc = "Bit 1 - Threshold comparison event on Channel 1. See description for channel 0."]
880    #[inline(always)]
881    pub fn thcmp1(&mut self) -> THCMP1_W {
882        THCMP1_W { w: self }
883    }
884    #[doc = "Bit 2 - Threshold comparison event on Channel 2. See description for channel 0."]
885    #[inline(always)]
886    pub fn thcmp2(&mut self) -> THCMP2_W {
887        THCMP2_W { w: self }
888    }
889    #[doc = "Bit 3 - Threshold comparison event on Channel 3. See description for channel 0."]
890    #[inline(always)]
891    pub fn thcmp3(&mut self) -> THCMP3_W {
892        THCMP3_W { w: self }
893    }
894    #[doc = "Bit 4 - Threshold comparison event on Channel 4. See description for channel 0."]
895    #[inline(always)]
896    pub fn thcmp4(&mut self) -> THCMP4_W {
897        THCMP4_W { w: self }
898    }
899    #[doc = "Bit 5 - Threshold comparison event on Channel 5. See description for channel 0."]
900    #[inline(always)]
901    pub fn thcmp5(&mut self) -> THCMP5_W {
902        THCMP5_W { w: self }
903    }
904    #[doc = "Bit 6 - Threshold comparison event on Channel 6. See description for channel 0."]
905    #[inline(always)]
906    pub fn thcmp6(&mut self) -> THCMP6_W {
907        THCMP6_W { w: self }
908    }
909    #[doc = "Bit 7 - Threshold comparison event on Channel 7. See description for channel 0."]
910    #[inline(always)]
911    pub fn thcmp7(&mut self) -> THCMP7_W {
912        THCMP7_W { w: self }
913    }
914    #[doc = "Bit 8 - Threshold comparison event on Channel 8. See description for channel 0."]
915    #[inline(always)]
916    pub fn thcmp8(&mut self) -> THCMP8_W {
917        THCMP8_W { w: self }
918    }
919    #[doc = "Bit 9 - Threshold comparison event on Channel 9. See description for channel 0."]
920    #[inline(always)]
921    pub fn thcmp9(&mut self) -> THCMP9_W {
922        THCMP9_W { w: self }
923    }
924    #[doc = "Bit 10 - Threshold comparison event on Channel 10. See description for channel 0."]
925    #[inline(always)]
926    pub fn thcmp10(&mut self) -> THCMP10_W {
927        THCMP10_W { w: self }
928    }
929    #[doc = "Bit 11 - Threshold comparison event on Channel 11. See description for channel 0."]
930    #[inline(always)]
931    pub fn thcmp11(&mut self) -> THCMP11_W {
932        THCMP11_W { w: self }
933    }
934    #[doc = "Writes raw bits to the register."]
935    #[inline(always)]
936    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
937        self.0.bits(bits);
938        self
939    }
940}
941#[doc = "ADC Flags register. Contains the four interrupt/DMA trigger flags and the individual component overrun and threshold-compare flags. (The overrun bits replicate information stored in the result registers).\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [flags](index.html) module"]
942pub struct FLAGS_SPEC;
943impl crate::RegisterSpec for FLAGS_SPEC {
944    type Ux = u32;
945}
946#[doc = "`read()` method returns [flags::R](R) reader structure"]
947impl crate::Readable for FLAGS_SPEC {
948    type Reader = R;
949}
950#[doc = "`write(|w| ..)` method takes [flags::W](W) writer structure"]
951impl crate::Writable for FLAGS_SPEC {
952    type Writer = W;
953}
954#[doc = "`reset()` method sets FLAGS to value 0"]
955impl crate::Resettable for FLAGS_SPEC {
956    #[inline(always)]
957    fn reset_value() -> Self::Ux {
958        0
959    }
960}
lpc82x_pac/adc0/flags.rs

lpc82x_pac/adc0/
flags.rs
