lpc82x_pac/swm0/
pinassign0.rs

1#[doc = "Register `PINASSIGN0` reader"]
2pub struct R(crate::R<PINASSIGN0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PINASSIGN0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PINASSIGN0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PINASSIGN0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PINASSIGN0` writer"]
17pub struct W(crate::W<PINASSIGN0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PINASSIGN0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PINASSIGN0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PINASSIGN0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `U0_TXD_O` reader - U0_TXD function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
38pub struct U0_TXD_O_R(crate::FieldReader<u8, u8>);
39impl U0_TXD_O_R {
40    pub(crate) fn new(bits: u8) -> Self {
41        U0_TXD_O_R(crate::FieldReader::new(bits))
42    }
43}
44impl core::ops::Deref for U0_TXD_O_R {
45    type Target = crate::FieldReader<u8, u8>;
46    #[inline(always)]
47    fn deref(&self) -> &Self::Target {
48        &self.0
49    }
50}
51#[doc = "Field `U0_TXD_O` writer - U0_TXD function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
52pub struct U0_TXD_O_W<'a> {
53    w: &'a mut W,
54}
55impl<'a> U0_TXD_O_W<'a> {
56    #[doc = r"Writes raw bits to the field"]
57    #[inline(always)]
58    pub unsafe fn bits(self, value: u8) -> &'a mut W {
59        self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff);
60        self.w
61    }
62}
63#[doc = "Field `U0_RXD_I` reader - U0_RXD function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
64pub struct U0_RXD_I_R(crate::FieldReader<u8, u8>);
65impl U0_RXD_I_R {
66    pub(crate) fn new(bits: u8) -> Self {
67        U0_RXD_I_R(crate::FieldReader::new(bits))
68    }
69}
70impl core::ops::Deref for U0_RXD_I_R {
71    type Target = crate::FieldReader<u8, u8>;
72    #[inline(always)]
73    fn deref(&self) -> &Self::Target {
74        &self.0
75    }
76}
77#[doc = "Field `U0_RXD_I` writer - U0_RXD function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
78pub struct U0_RXD_I_W<'a> {
79    w: &'a mut W,
80}
81impl<'a> U0_RXD_I_W<'a> {
82    #[doc = r"Writes raw bits to the field"]
83    #[inline(always)]
84    pub unsafe fn bits(self, value: u8) -> &'a mut W {
85        self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8);
86        self.w
87    }
88}
89#[doc = "Field `U0_RTS_O` reader - U0_RTS function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
90pub struct U0_RTS_O_R(crate::FieldReader<u8, u8>);
91impl U0_RTS_O_R {
92    pub(crate) fn new(bits: u8) -> Self {
93        U0_RTS_O_R(crate::FieldReader::new(bits))
94    }
95}
96impl core::ops::Deref for U0_RTS_O_R {
97    type Target = crate::FieldReader<u8, u8>;
98    #[inline(always)]
99    fn deref(&self) -> &Self::Target {
100        &self.0
101    }
102}
103#[doc = "Field `U0_RTS_O` writer - U0_RTS function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
104pub struct U0_RTS_O_W<'a> {
105    w: &'a mut W,
106}
107impl<'a> U0_RTS_O_W<'a> {
108    #[doc = r"Writes raw bits to the field"]
109    #[inline(always)]
110    pub unsafe fn bits(self, value: u8) -> &'a mut W {
111        self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
112        self.w
113    }
114}
115#[doc = "Field `U0_CTS_I` reader - U0_CTS function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
116pub struct U0_CTS_I_R(crate::FieldReader<u8, u8>);
117impl U0_CTS_I_R {
118    pub(crate) fn new(bits: u8) -> Self {
119        U0_CTS_I_R(crate::FieldReader::new(bits))
120    }
121}
122impl core::ops::Deref for U0_CTS_I_R {
123    type Target = crate::FieldReader<u8, u8>;
124    #[inline(always)]
125    fn deref(&self) -> &Self::Target {
126        &self.0
127    }
128}
129#[doc = "Field `U0_CTS_I` writer - U0_CTS function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
130pub struct U0_CTS_I_W<'a> {
131    w: &'a mut W,
132}
133impl<'a> U0_CTS_I_W<'a> {
134    #[doc = r"Writes raw bits to the field"]
135    #[inline(always)]
136    pub unsafe fn bits(self, value: u8) -> &'a mut W {
137        self.w.bits = (self.w.bits & !(0xff << 24)) | ((value as u32 & 0xff) << 24);
138        self.w
139    }
140}
141impl R {
142    #[doc = "Bits 0:7 - U0_TXD function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
143    #[inline(always)]
144    pub fn u0_txd_o(&self) -> U0_TXD_O_R {
145        U0_TXD_O_R::new((self.bits & 0xff) as u8)
146    }
147    #[doc = "Bits 8:15 - U0_RXD function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
148    #[inline(always)]
149    pub fn u0_rxd_i(&self) -> U0_RXD_I_R {
150        U0_RXD_I_R::new(((self.bits >> 8) & 0xff) as u8)
151    }
152    #[doc = "Bits 16:23 - U0_RTS function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
153    #[inline(always)]
154    pub fn u0_rts_o(&self) -> U0_RTS_O_R {
155        U0_RTS_O_R::new(((self.bits >> 16) & 0xff) as u8)
156    }
157    #[doc = "Bits 24:31 - U0_CTS function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
158    #[inline(always)]
159    pub fn u0_cts_i(&self) -> U0_CTS_I_R {
160        U0_CTS_I_R::new(((self.bits >> 24) & 0xff) as u8)
161    }
162}
163impl W {
164    #[doc = "Bits 0:7 - U0_TXD function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
165    #[inline(always)]
166    pub fn u0_txd_o(&mut self) -> U0_TXD_O_W {
167        U0_TXD_O_W { w: self }
168    }
169    #[doc = "Bits 8:15 - U0_RXD function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
170    #[inline(always)]
171    pub fn u0_rxd_i(&mut self) -> U0_RXD_I_W {
172        U0_RXD_I_W { w: self }
173    }
174    #[doc = "Bits 16:23 - U0_RTS function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
175    #[inline(always)]
176    pub fn u0_rts_o(&mut self) -> U0_RTS_O_W {
177        U0_RTS_O_W { w: self }
178    }
179    #[doc = "Bits 24:31 - U0_CTS function assignment. The value is the pin number to be assigned to this function. The following pins are available: PIO0_0(= 0) to PIO0_28 (= 0x1C)."]
180    #[inline(always)]
181    pub fn u0_cts_i(&mut self) -> U0_CTS_I_W {
182        U0_CTS_I_W { w: self }
183    }
184    #[doc = "Writes raw bits to the register."]
185    #[inline(always)]
186    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
187        self.0.bits(bits);
188        self
189    }
190}
191#[doc = "Pin assign register 0. Assign movable functions U0_TXD, U0_RXD, U0_RTS, U0_CTS.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pinassign0](index.html) module"]
192pub struct PINASSIGN0_SPEC;
193impl crate::RegisterSpec for PINASSIGN0_SPEC {
194    type Ux = u32;
195}
196#[doc = "`read()` method returns [pinassign0::R](R) reader structure"]
197impl crate::Readable for PINASSIGN0_SPEC {
198    type Reader = R;
199}
200#[doc = "`write(|w| ..)` method takes [pinassign0::W](W) writer structure"]
201impl crate::Writable for PINASSIGN0_SPEC {
202    type Writer = W;
203}
204#[doc = "`reset()` method sets PINASSIGN0 to value 0xffff_ffff"]
205impl crate::Resettable for PINASSIGN0_SPEC {
206    #[inline(always)]
207    fn reset_value() -> Self::Ux {
208        0xffff_ffff
209    }
210}
lpc82x_pac/swm0/pinassign0.rs

lpc82x_pac/swm0/
pinassign0.rs
