lpc82x_pac/sct0/
input.rs

1#[doc = "Register `INPUT` reader"]
2pub struct R(crate::R<INPUT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INPUT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INPUT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INPUT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INPUT` writer"]
17pub struct W(crate::W<INPUT_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INPUT_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INPUT_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INPUT_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `AIN0` reader - Input 0 state. Input 0 state on the last SCT clock edge."]
38pub struct AIN0_R(crate::FieldReader<bool, bool>);
39impl AIN0_R {
40    pub(crate) fn new(bits: bool) -> Self {
41        AIN0_R(crate::FieldReader::new(bits))
42    }
43}
44impl core::ops::Deref for AIN0_R {
45    type Target = crate::FieldReader<bool, bool>;
46    #[inline(always)]
47    fn deref(&self) -> &Self::Target {
48        &self.0
49    }
50}
51#[doc = "Field `AIN1` reader - Input 1 state. Input 1 state on the last SCT clock edge."]
52pub struct AIN1_R(crate::FieldReader<bool, bool>);
53impl AIN1_R {
54    pub(crate) fn new(bits: bool) -> Self {
55        AIN1_R(crate::FieldReader::new(bits))
56    }
57}
58impl core::ops::Deref for AIN1_R {
59    type Target = crate::FieldReader<bool, bool>;
60    #[inline(always)]
61    fn deref(&self) -> &Self::Target {
62        &self.0
63    }
64}
65#[doc = "Field `AIN2` reader - Input 2 state. Input 2 state on the last SCT clock edge."]
66pub struct AIN2_R(crate::FieldReader<bool, bool>);
67impl AIN2_R {
68    pub(crate) fn new(bits: bool) -> Self {
69        AIN2_R(crate::FieldReader::new(bits))
70    }
71}
72impl core::ops::Deref for AIN2_R {
73    type Target = crate::FieldReader<bool, bool>;
74    #[inline(always)]
75    fn deref(&self) -> &Self::Target {
76        &self.0
77    }
78}
79#[doc = "Field `AIN3` reader - Input 3 state. Input 3 state on the last SCT clock edge."]
80pub struct AIN3_R(crate::FieldReader<bool, bool>);
81impl AIN3_R {
82    pub(crate) fn new(bits: bool) -> Self {
83        AIN3_R(crate::FieldReader::new(bits))
84    }
85}
86impl core::ops::Deref for AIN3_R {
87    type Target = crate::FieldReader<bool, bool>;
88    #[inline(always)]
89    fn deref(&self) -> &Self::Target {
90        &self.0
91    }
92}
93#[doc = "Field `SIN0` reader - Input 0 state. Input 0 state following the synchronization specified by INSYNC."]
94pub struct SIN0_R(crate::FieldReader<bool, bool>);
95impl SIN0_R {
96    pub(crate) fn new(bits: bool) -> Self {
97        SIN0_R(crate::FieldReader::new(bits))
98    }
99}
100impl core::ops::Deref for SIN0_R {
101    type Target = crate::FieldReader<bool, bool>;
102    #[inline(always)]
103    fn deref(&self) -> &Self::Target {
104        &self.0
105    }
106}
107#[doc = "Field `SIN1` reader - Input 1 state. Input 1 state following the synchronization specified by INSYNC."]
108pub struct SIN1_R(crate::FieldReader<bool, bool>);
109impl SIN1_R {
110    pub(crate) fn new(bits: bool) -> Self {
111        SIN1_R(crate::FieldReader::new(bits))
112    }
113}
114impl core::ops::Deref for SIN1_R {
115    type Target = crate::FieldReader<bool, bool>;
116    #[inline(always)]
117    fn deref(&self) -> &Self::Target {
118        &self.0
119    }
120}
121#[doc = "Field `SIN2` reader - Input 2 state. Input 2 state following the synchronization specified by INSYNC."]
122pub struct SIN2_R(crate::FieldReader<bool, bool>);
123impl SIN2_R {
124    pub(crate) fn new(bits: bool) -> Self {
125        SIN2_R(crate::FieldReader::new(bits))
126    }
127}
128impl core::ops::Deref for SIN2_R {
129    type Target = crate::FieldReader<bool, bool>;
130    #[inline(always)]
131    fn deref(&self) -> &Self::Target {
132        &self.0
133    }
134}
135#[doc = "Field `SIN3` reader - Input 3 state. Input 3 state following the synchronization specified by INSYNC."]
136pub struct SIN3_R(crate::FieldReader<bool, bool>);
137impl SIN3_R {
138    pub(crate) fn new(bits: bool) -> Self {
139        SIN3_R(crate::FieldReader::new(bits))
140    }
141}
142impl core::ops::Deref for SIN3_R {
143    type Target = crate::FieldReader<bool, bool>;
144    #[inline(always)]
145    fn deref(&self) -> &Self::Target {
146        &self.0
147    }
148}
149impl R {
150    #[doc = "Bit 0 - Input 0 state. Input 0 state on the last SCT clock edge."]
151    #[inline(always)]
152    pub fn ain0(&self) -> AIN0_R {
153        AIN0_R::new((self.bits & 0x01) != 0)
154    }
155    #[doc = "Bit 1 - Input 1 state. Input 1 state on the last SCT clock edge."]
156    #[inline(always)]
157    pub fn ain1(&self) -> AIN1_R {
158        AIN1_R::new(((self.bits >> 1) & 0x01) != 0)
159    }
160    #[doc = "Bit 2 - Input 2 state. Input 2 state on the last SCT clock edge."]
161    #[inline(always)]
162    pub fn ain2(&self) -> AIN2_R {
163        AIN2_R::new(((self.bits >> 2) & 0x01) != 0)
164    }
165    #[doc = "Bit 3 - Input 3 state. Input 3 state on the last SCT clock edge."]
166    #[inline(always)]
167    pub fn ain3(&self) -> AIN3_R {
168        AIN3_R::new(((self.bits >> 3) & 0x01) != 0)
169    }
170    #[doc = "Bit 16 - Input 0 state. Input 0 state following the synchronization specified by INSYNC."]
171    #[inline(always)]
172    pub fn sin0(&self) -> SIN0_R {
173        SIN0_R::new(((self.bits >> 16) & 0x01) != 0)
174    }
175    #[doc = "Bit 17 - Input 1 state. Input 1 state following the synchronization specified by INSYNC."]
176    #[inline(always)]
177    pub fn sin1(&self) -> SIN1_R {
178        SIN1_R::new(((self.bits >> 17) & 0x01) != 0)
179    }
180    #[doc = "Bit 18 - Input 2 state. Input 2 state following the synchronization specified by INSYNC."]
181    #[inline(always)]
182    pub fn sin2(&self) -> SIN2_R {
183        SIN2_R::new(((self.bits >> 18) & 0x01) != 0)
184    }
185    #[doc = "Bit 19 - Input 3 state. Input 3 state following the synchronization specified by INSYNC."]
186    #[inline(always)]
187    pub fn sin3(&self) -> SIN3_R {
188        SIN3_R::new(((self.bits >> 19) & 0x01) != 0)
189    }
190}
191impl W {
192    #[doc = "Writes raw bits to the register."]
193    #[inline(always)]
194    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
195        self.0.bits(bits);
196        self
197    }
198}
199#[doc = "SCT input register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [input](index.html) module"]
200pub struct INPUT_SPEC;
201impl crate::RegisterSpec for INPUT_SPEC {
202    type Ux = u32;
203}
204#[doc = "`read()` method returns [input::R](R) reader structure"]
205impl crate::Readable for INPUT_SPEC {
206    type Reader = R;
207}
208#[doc = "`write(|w| ..)` method takes [input::W](W) writer structure"]
209impl crate::Writable for INPUT_SPEC {
210    type Writer = W;
211}
212#[doc = "`reset()` method sets INPUT to value 0"]
213impl crate::Resettable for INPUT_SPEC {
214    #[inline(always)]
215    fn reset_value() -> Self::Ux {
216        0
217    }
218}