lpc82x_pac/mrt0/channel/
intval.rs

1#[doc = "Register `INTVAL` reader"]
2pub struct R(crate::R<INTVAL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTVAL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTVAL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTVAL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTVAL` writer"]
17pub struct W(crate::W<INTVAL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTVAL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTVAL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTVAL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `IVALUE` reader - Time interval load value. This value is loaded into the TIMERn register and the MRT channel n starts counting down from IVALUE -1. If the timer is idle, writing a non-zero value to this bit field starts the timer immediately. If the timer is running, writing a zero to this bit field does the following: If LOAD = 1, the timer stops immediately. If LOAD = 0, the timer stops at the end of the time interval."]
38pub struct IVALUE_R(crate::FieldReader<u32, u32>);
39impl IVALUE_R {
40    pub(crate) fn new(bits: u32) -> Self {
41        IVALUE_R(crate::FieldReader::new(bits))
42    }
43}
44impl core::ops::Deref for IVALUE_R {
45    type Target = crate::FieldReader<u32, u32>;
46    #[inline(always)]
47    fn deref(&self) -> &Self::Target {
48        &self.0
49    }
50}
51#[doc = "Field `IVALUE` writer - Time interval load value. This value is loaded into the TIMERn register and the MRT channel n starts counting down from IVALUE -1. If the timer is idle, writing a non-zero value to this bit field starts the timer immediately. If the timer is running, writing a zero to this bit field does the following: If LOAD = 1, the timer stops immediately. If LOAD = 0, the timer stops at the end of the time interval."]
52pub struct IVALUE_W<'a> {
53    w: &'a mut W,
54}
55impl<'a> IVALUE_W<'a> {
56    #[doc = r"Writes raw bits to the field"]
57    #[inline(always)]
58    pub unsafe fn bits(self, value: u32) -> &'a mut W {
59        self.w.bits = (self.w.bits & !0x7fff_ffff) | (value as u32 & 0x7fff_ffff);
60        self.w
61    }
62}
63#[doc = "Determines how the timer interval value IVALUE -1 is loaded into the TIMERn register. This bit is write-only. Reading this bit always returns 0.\n\nValue on reset: 0"]
64#[derive(Clone, Copy, Debug, PartialEq)]
65pub enum LOAD_A {
66    #[doc = "0: No force load. The load from the INTVALn register to the TIMERn register is processed at the end of the time interval if the repeat mode is selected."]
67    NO_FORCE_LOAD = 0,
68    #[doc = "1: Force load. The INTVALn interval value IVALUE -1 is immediately loaded into the TIMERn register while TIMERn is running."]
69    FORCE_LOAD = 1,
70}
71impl From<LOAD_A> for bool {
72    #[inline(always)]
73    fn from(variant: LOAD_A) -> Self {
74        variant as u8 != 0
75    }
76}
77#[doc = "Field `LOAD` reader - Determines how the timer interval value IVALUE -1 is loaded into the TIMERn register. This bit is write-only. Reading this bit always returns 0."]
78pub struct LOAD_R(crate::FieldReader<bool, LOAD_A>);
79impl LOAD_R {
80    pub(crate) fn new(bits: bool) -> Self {
81        LOAD_R(crate::FieldReader::new(bits))
82    }
83    #[doc = r"Get enumerated values variant"]
84    #[inline(always)]
85    pub fn variant(&self) -> LOAD_A {
86        match self.bits {
87            false => LOAD_A::NO_FORCE_LOAD,
88            true => LOAD_A::FORCE_LOAD,
89        }
90    }
91    #[doc = "Checks if the value of the field is `NO_FORCE_LOAD`"]
92    #[inline(always)]
93    pub fn is_no_force_load(&self) -> bool {
94        **self == LOAD_A::NO_FORCE_LOAD
95    }
96    #[doc = "Checks if the value of the field is `FORCE_LOAD`"]
97    #[inline(always)]
98    pub fn is_force_load(&self) -> bool {
99        **self == LOAD_A::FORCE_LOAD
100    }
101}
102impl core::ops::Deref for LOAD_R {
103    type Target = crate::FieldReader<bool, LOAD_A>;
104    #[inline(always)]
105    fn deref(&self) -> &Self::Target {
106        &self.0
107    }
108}
109#[doc = "Field `LOAD` writer - Determines how the timer interval value IVALUE -1 is loaded into the TIMERn register. This bit is write-only. Reading this bit always returns 0."]
110pub struct LOAD_W<'a> {
111    w: &'a mut W,
112}
113impl<'a> LOAD_W<'a> {
114    #[doc = r"Writes `variant` to the field"]
115    #[inline(always)]
116    pub fn variant(self, variant: LOAD_A) -> &'a mut W {
117        self.bit(variant.into())
118    }
119    #[doc = "No force load. The load from the INTVALn register to the TIMERn register is processed at the end of the time interval if the repeat mode is selected."]
120    #[inline(always)]
121    pub fn no_force_load(self) -> &'a mut W {
122        self.variant(LOAD_A::NO_FORCE_LOAD)
123    }
124    #[doc = "Force load. The INTVALn interval value IVALUE -1 is immediately loaded into the TIMERn register while TIMERn is running."]
125    #[inline(always)]
126    pub fn force_load(self) -> &'a mut W {
127        self.variant(LOAD_A::FORCE_LOAD)
128    }
129    #[doc = r"Sets the field bit"]
130    #[inline(always)]
131    pub fn set_bit(self) -> &'a mut W {
132        self.bit(true)
133    }
134    #[doc = r"Clears the field bit"]
135    #[inline(always)]
136    pub fn clear_bit(self) -> &'a mut W {
137        self.bit(false)
138    }
139    #[doc = r"Writes raw bits to the field"]
140    #[inline(always)]
141    pub fn bit(self, value: bool) -> &'a mut W {
142        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
143        self.w
144    }
145}
146impl R {
147    #[doc = "Bits 0:30 - Time interval load value. This value is loaded into the TIMERn register and the MRT channel n starts counting down from IVALUE -1. If the timer is idle, writing a non-zero value to this bit field starts the timer immediately. If the timer is running, writing a zero to this bit field does the following: If LOAD = 1, the timer stops immediately. If LOAD = 0, the timer stops at the end of the time interval."]
148    #[inline(always)]
149    pub fn ivalue(&self) -> IVALUE_R {
150        IVALUE_R::new((self.bits & 0x7fff_ffff) as u32)
151    }
152    #[doc = "Bit 31 - Determines how the timer interval value IVALUE -1 is loaded into the TIMERn register. This bit is write-only. Reading this bit always returns 0."]
153    #[inline(always)]
154    pub fn load(&self) -> LOAD_R {
155        LOAD_R::new(((self.bits >> 31) & 0x01) != 0)
156    }
157}
158impl W {
159    #[doc = "Bits 0:30 - Time interval load value. This value is loaded into the TIMERn register and the MRT channel n starts counting down from IVALUE -1. If the timer is idle, writing a non-zero value to this bit field starts the timer immediately. If the timer is running, writing a zero to this bit field does the following: If LOAD = 1, the timer stops immediately. If LOAD = 0, the timer stops at the end of the time interval."]
160    #[inline(always)]
161    pub fn ivalue(&mut self) -> IVALUE_W {
162        IVALUE_W { w: self }
163    }
164    #[doc = "Bit 31 - Determines how the timer interval value IVALUE -1 is loaded into the TIMERn register. This bit is write-only. Reading this bit always returns 0."]
165    #[inline(always)]
166    pub fn load(&mut self) -> LOAD_W {
167        LOAD_W { w: self }
168    }
169    #[doc = "Writes raw bits to the register."]
170    #[inline(always)]
171    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
172        self.0.bits(bits);
173        self
174    }
175}
176#[doc = "MRT Time interval value register. This value is loaded into the TIMER register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intval](index.html) module"]
177pub struct INTVAL_SPEC;
178impl crate::RegisterSpec for INTVAL_SPEC {
179    type Ux = u32;
180}
181#[doc = "`read()` method returns [intval::R](R) reader structure"]
182impl crate::Readable for INTVAL_SPEC {
183    type Reader = R;
184}
185#[doc = "`write(|w| ..)` method takes [intval::W](W) writer structure"]
186impl crate::Writable for INTVAL_SPEC {
187    type Writer = W;
188}
189#[doc = "`reset()` method sets INTVAL to value 0"]
190impl crate::Resettable for INTVAL_SPEC {
191    #[inline(always)]
192    fn reset_value() -> Self::Ux {
193        0
194    }
195}
lpc82x_pac/mrt0/channel/intval.rs

lpc82x_pac/mrt0/channel/
intval.rs
