lpc82x_pac/iocon/
pio0_11.rs

1#[doc = "Register `PIO0_11` reader"]
2pub struct R(crate::R<PIO0_11_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PIO0_11_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PIO0_11_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PIO0_11_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PIO0_11` writer"]
17pub struct W(crate::W<PIO0_11_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PIO0_11_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PIO0_11_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PIO0_11_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Invert input\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum INV_A {
40    #[doc = "0: Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0)."]
41    NOT_INVERTED = 0,
42    #[doc = "1: Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)."]
43    INVERTED = 1,
44}
45impl From<INV_A> for bool {
46    #[inline(always)]
47    fn from(variant: INV_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `INV` reader - Invert input"]
52pub struct INV_R(crate::FieldReader<bool, INV_A>);
53impl INV_R {
54    pub(crate) fn new(bits: bool) -> Self {
55        INV_R(crate::FieldReader::new(bits))
56    }
57    #[doc = r"Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> INV_A {
60        match self.bits {
61            false => INV_A::NOT_INVERTED,
62            true => INV_A::INVERTED,
63        }
64    }
65    #[doc = "Checks if the value of the field is `NOT_INVERTED`"]
66    #[inline(always)]
67    pub fn is_not_inverted(&self) -> bool {
68        **self == INV_A::NOT_INVERTED
69    }
70    #[doc = "Checks if the value of the field is `INVERTED`"]
71    #[inline(always)]
72    pub fn is_inverted(&self) -> bool {
73        **self == INV_A::INVERTED
74    }
75}
76impl core::ops::Deref for INV_R {
77    type Target = crate::FieldReader<bool, INV_A>;
78    #[inline(always)]
79    fn deref(&self) -> &Self::Target {
80        &self.0
81    }
82}
83#[doc = "Field `INV` writer - Invert input"]
84pub struct INV_W<'a> {
85    w: &'a mut W,
86}
87impl<'a> INV_W<'a> {
88    #[doc = r"Writes `variant` to the field"]
89    #[inline(always)]
90    pub fn variant(self, variant: INV_A) -> &'a mut W {
91        self.bit(variant.into())
92    }
93    #[doc = "Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0)."]
94    #[inline(always)]
95    pub fn not_inverted(self) -> &'a mut W {
96        self.variant(INV_A::NOT_INVERTED)
97    }
98    #[doc = "Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)."]
99    #[inline(always)]
100    pub fn inverted(self) -> &'a mut W {
101        self.variant(INV_A::INVERTED)
102    }
103    #[doc = r"Sets the field bit"]
104    #[inline(always)]
105    pub fn set_bit(self) -> &'a mut W {
106        self.bit(true)
107    }
108    #[doc = r"Clears the field bit"]
109    #[inline(always)]
110    pub fn clear_bit(self) -> &'a mut W {
111        self.bit(false)
112    }
113    #[doc = r"Writes raw bits to the field"]
114    #[inline(always)]
115    pub fn bit(self, value: bool) -> &'a mut W {
116        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
117        self.w
118    }
119}
120#[doc = "Selects I2C mode.\n\nValue on reset: 0"]
121#[derive(Clone, Copy, Debug, PartialEq)]
122#[repr(u8)]
123pub enum I2CMODE_A {
124    #[doc = "0: Standard mode/ Fast-mode I2C."]
125    STANDARAD_I2C = 0,
126    #[doc = "1: Standard GPIO functionality. Requires external pull-up for GPIO output function."]
127    STANDARD_GPIO = 1,
128    #[doc = "2: Fast-mode Plus I2C"]
129    FAST_PLUS_I2C = 2,
130}
131impl From<I2CMODE_A> for u8 {
132    #[inline(always)]
133    fn from(variant: I2CMODE_A) -> Self {
134        variant as _
135    }
136}
137#[doc = "Field `I2CMODE` reader - Selects I2C mode."]
138pub struct I2CMODE_R(crate::FieldReader<u8, I2CMODE_A>);
139impl I2CMODE_R {
140    pub(crate) fn new(bits: u8) -> Self {
141        I2CMODE_R(crate::FieldReader::new(bits))
142    }
143    #[doc = r"Get enumerated values variant"]
144    #[inline(always)]
145    pub fn variant(&self) -> Option<I2CMODE_A> {
146        match self.bits {
147            0 => Some(I2CMODE_A::STANDARAD_I2C),
148            1 => Some(I2CMODE_A::STANDARD_GPIO),
149            2 => Some(I2CMODE_A::FAST_PLUS_I2C),
150            _ => None,
151        }
152    }
153    #[doc = "Checks if the value of the field is `STANDARAD_I2C`"]
154    #[inline(always)]
155    pub fn is_standarad_i2c(&self) -> bool {
156        **self == I2CMODE_A::STANDARAD_I2C
157    }
158    #[doc = "Checks if the value of the field is `STANDARD_GPIO`"]
159    #[inline(always)]
160    pub fn is_standard_gpio(&self) -> bool {
161        **self == I2CMODE_A::STANDARD_GPIO
162    }
163    #[doc = "Checks if the value of the field is `FAST_PLUS_I2C`"]
164    #[inline(always)]
165    pub fn is_fast_plus_i2c(&self) -> bool {
166        **self == I2CMODE_A::FAST_PLUS_I2C
167    }
168}
169impl core::ops::Deref for I2CMODE_R {
170    type Target = crate::FieldReader<u8, I2CMODE_A>;
171    #[inline(always)]
172    fn deref(&self) -> &Self::Target {
173        &self.0
174    }
175}
176#[doc = "Field `I2CMODE` writer - Selects I2C mode."]
177pub struct I2CMODE_W<'a> {
178    w: &'a mut W,
179}
180impl<'a> I2CMODE_W<'a> {
181    #[doc = r"Writes `variant` to the field"]
182    #[inline(always)]
183    pub fn variant(self, variant: I2CMODE_A) -> &'a mut W {
184        unsafe { self.bits(variant.into()) }
185    }
186    #[doc = "Standard mode/ Fast-mode I2C."]
187    #[inline(always)]
188    pub fn standarad_i2c(self) -> &'a mut W {
189        self.variant(I2CMODE_A::STANDARAD_I2C)
190    }
191    #[doc = "Standard GPIO functionality. Requires external pull-up for GPIO output function."]
192    #[inline(always)]
193    pub fn standard_gpio(self) -> &'a mut W {
194        self.variant(I2CMODE_A::STANDARD_GPIO)
195    }
196    #[doc = "Fast-mode Plus I2C"]
197    #[inline(always)]
198    pub fn fast_plus_i2c(self) -> &'a mut W {
199        self.variant(I2CMODE_A::FAST_PLUS_I2C)
200    }
201    #[doc = r"Writes raw bits to the field"]
202    #[inline(always)]
203    pub unsafe fn bits(self, value: u8) -> &'a mut W {
204        self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8);
205        self.w
206    }
207}
208#[doc = "Digital filter sample mode.\n\nValue on reset: 0"]
209#[derive(Clone, Copy, Debug, PartialEq)]
210#[repr(u8)]
211pub enum S_MODE_A {
212    #[doc = "0: Bypass input filter."]
213    S_MODE_0 = 0,
214    #[doc = "1: 1 clock cycle. Input pulses shorter than one filter clock are rejected."]
215    S_MODE_1 = 1,
216    #[doc = "2: 2 clock cycles. Input pulses shorter than two filter clocks are rejected."]
217    S_MODE_2 = 2,
218    #[doc = "3: 3 clock cycles. Input pulses shorter than three filter clocks are rejected."]
219    S_MODE_3 = 3,
220}
221impl From<S_MODE_A> for u8 {
222    #[inline(always)]
223    fn from(variant: S_MODE_A) -> Self {
224        variant as _
225    }
226}
227#[doc = "Field `S_MODE` reader - Digital filter sample mode."]
228pub struct S_MODE_R(crate::FieldReader<u8, S_MODE_A>);
229impl S_MODE_R {
230    pub(crate) fn new(bits: u8) -> Self {
231        S_MODE_R(crate::FieldReader::new(bits))
232    }
233    #[doc = r"Get enumerated values variant"]
234    #[inline(always)]
235    pub fn variant(&self) -> S_MODE_A {
236        match self.bits {
237            0 => S_MODE_A::S_MODE_0,
238            1 => S_MODE_A::S_MODE_1,
239            2 => S_MODE_A::S_MODE_2,
240            3 => S_MODE_A::S_MODE_3,
241            _ => unreachable!(),
242        }
243    }
244    #[doc = "Checks if the value of the field is `S_MODE_0`"]
245    #[inline(always)]
246    pub fn is_s_mode_0(&self) -> bool {
247        **self == S_MODE_A::S_MODE_0
248    }
249    #[doc = "Checks if the value of the field is `S_MODE_1`"]
250    #[inline(always)]
251    pub fn is_s_mode_1(&self) -> bool {
252        **self == S_MODE_A::S_MODE_1
253    }
254    #[doc = "Checks if the value of the field is `S_MODE_2`"]
255    #[inline(always)]
256    pub fn is_s_mode_2(&self) -> bool {
257        **self == S_MODE_A::S_MODE_2
258    }
259    #[doc = "Checks if the value of the field is `S_MODE_3`"]
260    #[inline(always)]
261    pub fn is_s_mode_3(&self) -> bool {
262        **self == S_MODE_A::S_MODE_3
263    }
264}
265impl core::ops::Deref for S_MODE_R {
266    type Target = crate::FieldReader<u8, S_MODE_A>;
267    #[inline(always)]
268    fn deref(&self) -> &Self::Target {
269        &self.0
270    }
271}
272#[doc = "Field `S_MODE` writer - Digital filter sample mode."]
273pub struct S_MODE_W<'a> {
274    w: &'a mut W,
275}
276impl<'a> S_MODE_W<'a> {
277    #[doc = r"Writes `variant` to the field"]
278    #[inline(always)]
279    pub fn variant(self, variant: S_MODE_A) -> &'a mut W {
280        self.bits(variant.into())
281    }
282    #[doc = "Bypass input filter."]
283    #[inline(always)]
284    pub fn s_mode_0(self) -> &'a mut W {
285        self.variant(S_MODE_A::S_MODE_0)
286    }
287    #[doc = "1 clock cycle. Input pulses shorter than one filter clock are rejected."]
288    #[inline(always)]
289    pub fn s_mode_1(self) -> &'a mut W {
290        self.variant(S_MODE_A::S_MODE_1)
291    }
292    #[doc = "2 clock cycles. Input pulses shorter than two filter clocks are rejected."]
293    #[inline(always)]
294    pub fn s_mode_2(self) -> &'a mut W {
295        self.variant(S_MODE_A::S_MODE_2)
296    }
297    #[doc = "3 clock cycles. Input pulses shorter than three filter clocks are rejected."]
298    #[inline(always)]
299    pub fn s_mode_3(self) -> &'a mut W {
300        self.variant(S_MODE_A::S_MODE_3)
301    }
302    #[doc = r"Writes raw bits to the field"]
303    #[inline(always)]
304    pub fn bits(self, value: u8) -> &'a mut W {
305        self.w.bits = (self.w.bits & !(0x03 << 11)) | ((value as u32 & 0x03) << 11);
306        self.w
307    }
308}
309#[doc = "Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved.\n\nValue on reset: 0"]
310#[derive(Clone, Copy, Debug, PartialEq)]
311#[repr(u8)]
312pub enum CLK_DIV_A {
313    #[doc = "0: IOCONCLKDIV0"]
314    CLK_DIV_0 = 0,
315    #[doc = "1: IOCONCLKDIV1"]
316    CLK_DIV_1 = 1,
317    #[doc = "2: IOCONCLKDIV2"]
318    CLK_DIV_2 = 2,
319    #[doc = "3: IOCONCLKDIV3"]
320    CLK_DIV_3 = 3,
321    #[doc = "4: IOCONCLKDIV4"]
322    CLK_DIV_4 = 4,
323    #[doc = "5: IOCONCLKDIV5"]
324    CLK_DIV_5 = 5,
325    #[doc = "6: IOCONCLKDIV6"]
326    CLK_DIV_6 = 6,
327}
328impl From<CLK_DIV_A> for u8 {
329    #[inline(always)]
330    fn from(variant: CLK_DIV_A) -> Self {
331        variant as _
332    }
333}
334#[doc = "Field `CLK_DIV` reader - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved."]
335pub struct CLK_DIV_R(crate::FieldReader<u8, CLK_DIV_A>);
336impl CLK_DIV_R {
337    pub(crate) fn new(bits: u8) -> Self {
338        CLK_DIV_R(crate::FieldReader::new(bits))
339    }
340    #[doc = r"Get enumerated values variant"]
341    #[inline(always)]
342    pub fn variant(&self) -> Option<CLK_DIV_A> {
343        match self.bits {
344            0 => Some(CLK_DIV_A::CLK_DIV_0),
345            1 => Some(CLK_DIV_A::CLK_DIV_1),
346            2 => Some(CLK_DIV_A::CLK_DIV_2),
347            3 => Some(CLK_DIV_A::CLK_DIV_3),
348            4 => Some(CLK_DIV_A::CLK_DIV_4),
349            5 => Some(CLK_DIV_A::CLK_DIV_5),
350            6 => Some(CLK_DIV_A::CLK_DIV_6),
351            _ => None,
352        }
353    }
354    #[doc = "Checks if the value of the field is `CLK_DIV_0`"]
355    #[inline(always)]
356    pub fn is_clk_div_0(&self) -> bool {
357        **self == CLK_DIV_A::CLK_DIV_0
358    }
359    #[doc = "Checks if the value of the field is `CLK_DIV_1`"]
360    #[inline(always)]
361    pub fn is_clk_div_1(&self) -> bool {
362        **self == CLK_DIV_A::CLK_DIV_1
363    }
364    #[doc = "Checks if the value of the field is `CLK_DIV_2`"]
365    #[inline(always)]
366    pub fn is_clk_div_2(&self) -> bool {
367        **self == CLK_DIV_A::CLK_DIV_2
368    }
369    #[doc = "Checks if the value of the field is `CLK_DIV_3`"]
370    #[inline(always)]
371    pub fn is_clk_div_3(&self) -> bool {
372        **self == CLK_DIV_A::CLK_DIV_3
373    }
374    #[doc = "Checks if the value of the field is `CLK_DIV_4`"]
375    #[inline(always)]
376    pub fn is_clk_div_4(&self) -> bool {
377        **self == CLK_DIV_A::CLK_DIV_4
378    }
379    #[doc = "Checks if the value of the field is `CLK_DIV_5`"]
380    #[inline(always)]
381    pub fn is_clk_div_5(&self) -> bool {
382        **self == CLK_DIV_A::CLK_DIV_5
383    }
384    #[doc = "Checks if the value of the field is `CLK_DIV_6`"]
385    #[inline(always)]
386    pub fn is_clk_div_6(&self) -> bool {
387        **self == CLK_DIV_A::CLK_DIV_6
388    }
389}
390impl core::ops::Deref for CLK_DIV_R {
391    type Target = crate::FieldReader<u8, CLK_DIV_A>;
392    #[inline(always)]
393    fn deref(&self) -> &Self::Target {
394        &self.0
395    }
396}
397#[doc = "Field `CLK_DIV` writer - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved."]
398pub struct CLK_DIV_W<'a> {
399    w: &'a mut W,
400}
401impl<'a> CLK_DIV_W<'a> {
402    #[doc = r"Writes `variant` to the field"]
403    #[inline(always)]
404    pub fn variant(self, variant: CLK_DIV_A) -> &'a mut W {
405        unsafe { self.bits(variant.into()) }
406    }
407    #[doc = "IOCONCLKDIV0"]
408    #[inline(always)]
409    pub fn clk_div_0(self) -> &'a mut W {
410        self.variant(CLK_DIV_A::CLK_DIV_0)
411    }
412    #[doc = "IOCONCLKDIV1"]
413    #[inline(always)]
414    pub fn clk_div_1(self) -> &'a mut W {
415        self.variant(CLK_DIV_A::CLK_DIV_1)
416    }
417    #[doc = "IOCONCLKDIV2"]
418    #[inline(always)]
419    pub fn clk_div_2(self) -> &'a mut W {
420        self.variant(CLK_DIV_A::CLK_DIV_2)
421    }
422    #[doc = "IOCONCLKDIV3"]
423    #[inline(always)]
424    pub fn clk_div_3(self) -> &'a mut W {
425        self.variant(CLK_DIV_A::CLK_DIV_3)
426    }
427    #[doc = "IOCONCLKDIV4"]
428    #[inline(always)]
429    pub fn clk_div_4(self) -> &'a mut W {
430        self.variant(CLK_DIV_A::CLK_DIV_4)
431    }
432    #[doc = "IOCONCLKDIV5"]
433    #[inline(always)]
434    pub fn clk_div_5(self) -> &'a mut W {
435        self.variant(CLK_DIV_A::CLK_DIV_5)
436    }
437    #[doc = "IOCONCLKDIV6"]
438    #[inline(always)]
439    pub fn clk_div_6(self) -> &'a mut W {
440        self.variant(CLK_DIV_A::CLK_DIV_6)
441    }
442    #[doc = r"Writes raw bits to the field"]
443    #[inline(always)]
444    pub unsafe fn bits(self, value: u8) -> &'a mut W {
445        self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13);
446        self.w
447    }
448}
449impl R {
450    #[doc = "Bit 6 - Invert input"]
451    #[inline(always)]
452    pub fn inv(&self) -> INV_R {
453        INV_R::new(((self.bits >> 6) & 0x01) != 0)
454    }
455    #[doc = "Bits 8:9 - Selects I2C mode."]
456    #[inline(always)]
457    pub fn i2cmode(&self) -> I2CMODE_R {
458        I2CMODE_R::new(((self.bits >> 8) & 0x03) as u8)
459    }
460    #[doc = "Bits 11:12 - Digital filter sample mode."]
461    #[inline(always)]
462    pub fn s_mode(&self) -> S_MODE_R {
463        S_MODE_R::new(((self.bits >> 11) & 0x03) as u8)
464    }
465    #[doc = "Bits 13:15 - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved."]
466    #[inline(always)]
467    pub fn clk_div(&self) -> CLK_DIV_R {
468        CLK_DIV_R::new(((self.bits >> 13) & 0x07) as u8)
469    }
470}
471impl W {
472    #[doc = "Bit 6 - Invert input"]
473    #[inline(always)]
474    pub fn inv(&mut self) -> INV_W {
475        INV_W { w: self }
476    }
477    #[doc = "Bits 8:9 - Selects I2C mode."]
478    #[inline(always)]
479    pub fn i2cmode(&mut self) -> I2CMODE_W {
480        I2CMODE_W { w: self }
481    }
482    #[doc = "Bits 11:12 - Digital filter sample mode."]
483    #[inline(always)]
484    pub fn s_mode(&mut self) -> S_MODE_W {
485        S_MODE_W { w: self }
486    }
487    #[doc = "Bits 13:15 - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved."]
488    #[inline(always)]
489    pub fn clk_div(&mut self) -> CLK_DIV_W {
490        CLK_DIV_W { w: self }
491    }
492    #[doc = "Writes raw bits to the register."]
493    #[inline(always)]
494    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
495        self.0.bits(bits);
496        self
497    }
498}
499#[doc = "Digital I/O control for pins PIO0_11\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pio0_11](index.html) module"]
500pub struct PIO0_11_SPEC;
501impl crate::RegisterSpec for PIO0_11_SPEC {
502    type Ux = u32;
503}
504#[doc = "`read()` method returns [pio0_11::R](R) reader structure"]
505impl crate::Readable for PIO0_11_SPEC {
506    type Reader = R;
507}
508#[doc = "`write(|w| ..)` method takes [pio0_11::W](W) writer structure"]
509impl crate::Writable for PIO0_11_SPEC {
510    type Writer = W;
511}
512#[doc = "`reset()` method sets PIO0_11 to value 0x80"]
513impl crate::Resettable for PIO0_11_SPEC {
514    #[inline(always)]
515    fn reset_value() -> Self::Ux {
516        0x80
517    }
518}
lpc82x_pac/iocon/pio0_11.rs

lpc82x_pac/iocon/
pio0_11.rs
