lpc82x_pac/i2c0/
stat.rs

1#[doc = "Register `STAT` reader"]
2pub struct R(crate::R<STAT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STAT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STAT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STAT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `STAT` writer"]
17pub struct W(crate::W<STAT_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<STAT_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<STAT_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<STAT_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Master Pending. Indicates that the Master is waiting to continue communication on the I2C-bus (pending) or is idle. When the master is pending, the MSTSTATE bits indicate what type of software service if any the master expects. This flag will cause an interrupt when set if, enabled via the INTENSET register. The MSTPENDING flag is not set when the DMA is handling an event (if the MSTDMA bit in the MSTCTL register is set). If the master is in the idle state, and no communication is needed, mask this interrupt.\n\nValue on reset: 1"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum MSTPENDING_A {
40    #[doc = "0: In progress. Communication is in progress and the Master function is busy and cannot currently accept a command."]
41    IN_PROGRESS = 0,
42    #[doc = "1: Pending. The Master function needs software service or is in the idle state. If the master is not in the idle state, it is waiting to receive or transmit data or the NACK bit."]
43    PENDING = 1,
44}
45impl From<MSTPENDING_A> for bool {
46    #[inline(always)]
47    fn from(variant: MSTPENDING_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `MSTPENDING` reader - Master Pending. Indicates that the Master is waiting to continue communication on the I2C-bus (pending) or is idle. When the master is pending, the MSTSTATE bits indicate what type of software service if any the master expects. This flag will cause an interrupt when set if, enabled via the INTENSET register. The MSTPENDING flag is not set when the DMA is handling an event (if the MSTDMA bit in the MSTCTL register is set). If the master is in the idle state, and no communication is needed, mask this interrupt."]
52pub struct MSTPENDING_R(crate::FieldReader<bool, MSTPENDING_A>);
53impl MSTPENDING_R {
54    pub(crate) fn new(bits: bool) -> Self {
55        MSTPENDING_R(crate::FieldReader::new(bits))
56    }
57    #[doc = r"Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> MSTPENDING_A {
60        match self.bits {
61            false => MSTPENDING_A::IN_PROGRESS,
62            true => MSTPENDING_A::PENDING,
63        }
64    }
65    #[doc = "Checks if the value of the field is `IN_PROGRESS`"]
66    #[inline(always)]
67    pub fn is_in_progress(&self) -> bool {
68        **self == MSTPENDING_A::IN_PROGRESS
69    }
70    #[doc = "Checks if the value of the field is `PENDING`"]
71    #[inline(always)]
72    pub fn is_pending(&self) -> bool {
73        **self == MSTPENDING_A::PENDING
74    }
75}
76impl core::ops::Deref for MSTPENDING_R {
77    type Target = crate::FieldReader<bool, MSTPENDING_A>;
78    #[inline(always)]
79    fn deref(&self) -> &Self::Target {
80        &self.0
81    }
82}
83#[doc = "Master State code. The master state code reflects the master state when the MSTPENDING bit is set, that is the master is pending or in the idle state. Each value of this field indicates a specific required service for the Master function. All other values are reserved. See Table 400 for details of state values and appropriate responses.\n\nValue on reset: 0"]
84#[derive(Clone, Copy, Debug, PartialEq)]
85#[repr(u8)]
86pub enum MSTSTATE_A {
87    #[doc = "0: Idle. The Master function is available to be used for a new transaction."]
88    IDLE = 0,
89    #[doc = "1: Receive ready. Received data available (Master Receiver mode). Address plus Read was previously sent and Acknowledged by slave."]
90    RECEIVE_READY = 1,
91    #[doc = "2: Transmit ready. Data can be transmitted (Master Transmitter mode). Address plus Write was previously sent and Acknowledged by slave."]
92    TRANSMIT_READY = 2,
93    #[doc = "3: NACK Address. Slave NACKed address."]
94    NACK_ADDRESS = 3,
95    #[doc = "4: NACK Data. Slave NACKed transmitted data."]
96    NACK_DATA = 4,
97}
98impl From<MSTSTATE_A> for u8 {
99    #[inline(always)]
100    fn from(variant: MSTSTATE_A) -> Self {
101        variant as _
102    }
103}
104#[doc = "Field `MSTSTATE` reader - Master State code. The master state code reflects the master state when the MSTPENDING bit is set, that is the master is pending or in the idle state. Each value of this field indicates a specific required service for the Master function. All other values are reserved. See Table 400 for details of state values and appropriate responses."]
105pub struct MSTSTATE_R(crate::FieldReader<u8, MSTSTATE_A>);
106impl MSTSTATE_R {
107    pub(crate) fn new(bits: u8) -> Self {
108        MSTSTATE_R(crate::FieldReader::new(bits))
109    }
110    #[doc = r"Get enumerated values variant"]
111    #[inline(always)]
112    pub fn variant(&self) -> Option<MSTSTATE_A> {
113        match self.bits {
114            0 => Some(MSTSTATE_A::IDLE),
115            1 => Some(MSTSTATE_A::RECEIVE_READY),
116            2 => Some(MSTSTATE_A::TRANSMIT_READY),
117            3 => Some(MSTSTATE_A::NACK_ADDRESS),
118            4 => Some(MSTSTATE_A::NACK_DATA),
119            _ => None,
120        }
121    }
122    #[doc = "Checks if the value of the field is `IDLE`"]
123    #[inline(always)]
124    pub fn is_idle(&self) -> bool {
125        **self == MSTSTATE_A::IDLE
126    }
127    #[doc = "Checks if the value of the field is `RECEIVE_READY`"]
128    #[inline(always)]
129    pub fn is_receive_ready(&self) -> bool {
130        **self == MSTSTATE_A::RECEIVE_READY
131    }
132    #[doc = "Checks if the value of the field is `TRANSMIT_READY`"]
133    #[inline(always)]
134    pub fn is_transmit_ready(&self) -> bool {
135        **self == MSTSTATE_A::TRANSMIT_READY
136    }
137    #[doc = "Checks if the value of the field is `NACK_ADDRESS`"]
138    #[inline(always)]
139    pub fn is_nack_address(&self) -> bool {
140        **self == MSTSTATE_A::NACK_ADDRESS
141    }
142    #[doc = "Checks if the value of the field is `NACK_DATA`"]
143    #[inline(always)]
144    pub fn is_nack_data(&self) -> bool {
145        **self == MSTSTATE_A::NACK_DATA
146    }
147}
148impl core::ops::Deref for MSTSTATE_R {
149    type Target = crate::FieldReader<u8, MSTSTATE_A>;
150    #[inline(always)]
151    fn deref(&self) -> &Self::Target {
152        &self.0
153    }
154}
155#[doc = "Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE.\n\nValue on reset: 0"]
156#[derive(Clone, Copy, Debug, PartialEq)]
157pub enum MSTARBLOSS_A {
158    #[doc = "0: No Arbitration Loss has occurred."]
159    NO_LOSS = 0,
160    #[doc = "1: Arbitration loss. The Master function has experienced an Arbitration Loss. At this point, the Master function has already stopped driving the bus and gone to an idle state. Software can respond by doing nothing, or by sending a Start in order to attempt to gain control of the bus when it next becomes idle."]
161    ARBITRATION_LOSS = 1,
162}
163impl From<MSTARBLOSS_A> for bool {
164    #[inline(always)]
165    fn from(variant: MSTARBLOSS_A) -> Self {
166        variant as u8 != 0
167    }
168}
169#[doc = "Field `MSTARBLOSS` reader - Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
170pub struct MSTARBLOSS_R(crate::FieldReader<bool, MSTARBLOSS_A>);
171impl MSTARBLOSS_R {
172    pub(crate) fn new(bits: bool) -> Self {
173        MSTARBLOSS_R(crate::FieldReader::new(bits))
174    }
175    #[doc = r"Get enumerated values variant"]
176    #[inline(always)]
177    pub fn variant(&self) -> MSTARBLOSS_A {
178        match self.bits {
179            false => MSTARBLOSS_A::NO_LOSS,
180            true => MSTARBLOSS_A::ARBITRATION_LOSS,
181        }
182    }
183    #[doc = "Checks if the value of the field is `NO_LOSS`"]
184    #[inline(always)]
185    pub fn is_no_loss(&self) -> bool {
186        **self == MSTARBLOSS_A::NO_LOSS
187    }
188    #[doc = "Checks if the value of the field is `ARBITRATION_LOSS`"]
189    #[inline(always)]
190    pub fn is_arbitration_loss(&self) -> bool {
191        **self == MSTARBLOSS_A::ARBITRATION_LOSS
192    }
193}
194impl core::ops::Deref for MSTARBLOSS_R {
195    type Target = crate::FieldReader<bool, MSTARBLOSS_A>;
196    #[inline(always)]
197    fn deref(&self) -> &Self::Target {
198        &self.0
199    }
200}
201#[doc = "Field `MSTARBLOSS` writer - Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
202pub struct MSTARBLOSS_W<'a> {
203    w: &'a mut W,
204}
205impl<'a> MSTARBLOSS_W<'a> {
206    #[doc = r"Writes `variant` to the field"]
207    #[inline(always)]
208    pub fn variant(self, variant: MSTARBLOSS_A) -> &'a mut W {
209        self.bit(variant.into())
210    }
211    #[doc = "No Arbitration Loss has occurred."]
212    #[inline(always)]
213    pub fn no_loss(self) -> &'a mut W {
214        self.variant(MSTARBLOSS_A::NO_LOSS)
215    }
216    #[doc = "Arbitration loss. The Master function has experienced an Arbitration Loss. At this point, the Master function has already stopped driving the bus and gone to an idle state. Software can respond by doing nothing, or by sending a Start in order to attempt to gain control of the bus when it next becomes idle."]
217    #[inline(always)]
218    pub fn arbitration_loss(self) -> &'a mut W {
219        self.variant(MSTARBLOSS_A::ARBITRATION_LOSS)
220    }
221    #[doc = r"Sets the field bit"]
222    #[inline(always)]
223    pub fn set_bit(self) -> &'a mut W {
224        self.bit(true)
225    }
226    #[doc = r"Clears the field bit"]
227    #[inline(always)]
228    pub fn clear_bit(self) -> &'a mut W {
229        self.bit(false)
230    }
231    #[doc = r"Writes raw bits to the field"]
232    #[inline(always)]
233    pub fn bit(self, value: bool) -> &'a mut W {
234        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
235        self.w
236    }
237}
238#[doc = "Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE.\n\nValue on reset: 0"]
239#[derive(Clone, Copy, Debug, PartialEq)]
240pub enum MSTSTSTPERR_A {
241    #[doc = "0: No Start/Stop Error has occurred."]
242    NO_ERROR = 0,
243    #[doc = "1: The Master function has experienced a Start/Stop Error. A Start or Stop was detected at a time when it is not allowed by the I2C specification. The Master interface has stopped driving the bus and gone to an idle state, no action is required. A request for a Start could be made, or software could attempt to insure that the bus has not stalled."]
244    ERROR = 1,
245}
246impl From<MSTSTSTPERR_A> for bool {
247    #[inline(always)]
248    fn from(variant: MSTSTSTPERR_A) -> Self {
249        variant as u8 != 0
250    }
251}
252#[doc = "Field `MSTSTSTPERR` reader - Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
253pub struct MSTSTSTPERR_R(crate::FieldReader<bool, MSTSTSTPERR_A>);
254impl MSTSTSTPERR_R {
255    pub(crate) fn new(bits: bool) -> Self {
256        MSTSTSTPERR_R(crate::FieldReader::new(bits))
257    }
258    #[doc = r"Get enumerated values variant"]
259    #[inline(always)]
260    pub fn variant(&self) -> MSTSTSTPERR_A {
261        match self.bits {
262            false => MSTSTSTPERR_A::NO_ERROR,
263            true => MSTSTSTPERR_A::ERROR,
264        }
265    }
266    #[doc = "Checks if the value of the field is `NO_ERROR`"]
267    #[inline(always)]
268    pub fn is_no_error(&self) -> bool {
269        **self == MSTSTSTPERR_A::NO_ERROR
270    }
271    #[doc = "Checks if the value of the field is `ERROR`"]
272    #[inline(always)]
273    pub fn is_error(&self) -> bool {
274        **self == MSTSTSTPERR_A::ERROR
275    }
276}
277impl core::ops::Deref for MSTSTSTPERR_R {
278    type Target = crate::FieldReader<bool, MSTSTSTPERR_A>;
279    #[inline(always)]
280    fn deref(&self) -> &Self::Target {
281        &self.0
282    }
283}
284#[doc = "Field `MSTSTSTPERR` writer - Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
285pub struct MSTSTSTPERR_W<'a> {
286    w: &'a mut W,
287}
288impl<'a> MSTSTSTPERR_W<'a> {
289    #[doc = r"Writes `variant` to the field"]
290    #[inline(always)]
291    pub fn variant(self, variant: MSTSTSTPERR_A) -> &'a mut W {
292        self.bit(variant.into())
293    }
294    #[doc = "No Start/Stop Error has occurred."]
295    #[inline(always)]
296    pub fn no_error(self) -> &'a mut W {
297        self.variant(MSTSTSTPERR_A::NO_ERROR)
298    }
299    #[doc = "The Master function has experienced a Start/Stop Error. A Start or Stop was detected at a time when it is not allowed by the I2C specification. The Master interface has stopped driving the bus and gone to an idle state, no action is required. A request for a Start could be made, or software could attempt to insure that the bus has not stalled."]
300    #[inline(always)]
301    pub fn error(self) -> &'a mut W {
302        self.variant(MSTSTSTPERR_A::ERROR)
303    }
304    #[doc = r"Sets the field bit"]
305    #[inline(always)]
306    pub fn set_bit(self) -> &'a mut W {
307        self.bit(true)
308    }
309    #[doc = r"Clears the field bit"]
310    #[inline(always)]
311    pub fn clear_bit(self) -> &'a mut W {
312        self.bit(false)
313    }
314    #[doc = r"Writes raw bits to the field"]
315    #[inline(always)]
316    pub fn bit(self, value: bool) -> &'a mut W {
317        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
318        self.w
319    }
320}
321#[doc = "Slave Pending. Indicates that the Slave function is waiting to continue communication on the I2C-bus and needs software service. This flag will cause an interrupt when set if enabled via INTENSET. The SLVPENDING flag is not set when the DMA is handling an event (if the SLVDMA bit in the SLVCTL register is set). The SLVPENDING flag is read-only and is automatically cleared when a 1 is written to the SLVCONTINUE bit in the SLVCTL register. The point in time when SlvPending is set depends on whether the I2C interface is in HSCAPABLE mode. See Section 25.7.2.2.2. When the I2C interface is configured to be HSCAPABLE, HS master codes are detected automatically. Due to the requirements of the HS I2C specification, slave addresses must also be detected automatically, since the address must be acknowledged before the clock can be stretched.\n\nValue on reset: 0"]
322#[derive(Clone, Copy, Debug, PartialEq)]
323pub enum SLVPENDING_A {
324    #[doc = "0: In progress. The Slave function does not currently need service."]
325    IN_PROGRESS = 0,
326    #[doc = "1: Pending. The Slave function needs service. Information on what is needed can be found in the adjacent SLVSTATE field."]
327    PENDING = 1,
328}
329impl From<SLVPENDING_A> for bool {
330    #[inline(always)]
331    fn from(variant: SLVPENDING_A) -> Self {
332        variant as u8 != 0
333    }
334}
335#[doc = "Field `SLVPENDING` reader - Slave Pending. Indicates that the Slave function is waiting to continue communication on the I2C-bus and needs software service. This flag will cause an interrupt when set if enabled via INTENSET. The SLVPENDING flag is not set when the DMA is handling an event (if the SLVDMA bit in the SLVCTL register is set). The SLVPENDING flag is read-only and is automatically cleared when a 1 is written to the SLVCONTINUE bit in the SLVCTL register. The point in time when SlvPending is set depends on whether the I2C interface is in HSCAPABLE mode. See Section 25.7.2.2.2. When the I2C interface is configured to be HSCAPABLE, HS master codes are detected automatically. Due to the requirements of the HS I2C specification, slave addresses must also be detected automatically, since the address must be acknowledged before the clock can be stretched."]
336pub struct SLVPENDING_R(crate::FieldReader<bool, SLVPENDING_A>);
337impl SLVPENDING_R {
338    pub(crate) fn new(bits: bool) -> Self {
339        SLVPENDING_R(crate::FieldReader::new(bits))
340    }
341    #[doc = r"Get enumerated values variant"]
342    #[inline(always)]
343    pub fn variant(&self) -> SLVPENDING_A {
344        match self.bits {
345            false => SLVPENDING_A::IN_PROGRESS,
346            true => SLVPENDING_A::PENDING,
347        }
348    }
349    #[doc = "Checks if the value of the field is `IN_PROGRESS`"]
350    #[inline(always)]
351    pub fn is_in_progress(&self) -> bool {
352        **self == SLVPENDING_A::IN_PROGRESS
353    }
354    #[doc = "Checks if the value of the field is `PENDING`"]
355    #[inline(always)]
356    pub fn is_pending(&self) -> bool {
357        **self == SLVPENDING_A::PENDING
358    }
359}
360impl core::ops::Deref for SLVPENDING_R {
361    type Target = crate::FieldReader<bool, SLVPENDING_A>;
362    #[inline(always)]
363    fn deref(&self) -> &Self::Target {
364        &self.0
365    }
366}
367#[doc = "Slave State code. Each value of this field indicates a specific required service for the Slave function. All other values are reserved. See Table 401 for state values and actions. note that the occurrence of some states and how they are handled are affected by DMA mode and Automatic Operation modes.\n\nValue on reset: 0"]
368#[derive(Clone, Copy, Debug, PartialEq)]
369#[repr(u8)]
370pub enum SLVSTATE_A {
371    #[doc = "0: Slave address. Address plus R/W received. At least one of the four slave addresses has been matched by hardware."]
372    SLAVE_ADDRESS = 0,
373    #[doc = "1: Slave receive. Received data is available (Slave Receiver mode)."]
374    SLAVE_RECEIVE = 1,
375    #[doc = "2: Slave transmit. Data can be transmitted (Slave Transmitter mode)."]
376    SLAVE_TRANSMIT = 2,
377}
378impl From<SLVSTATE_A> for u8 {
379    #[inline(always)]
380    fn from(variant: SLVSTATE_A) -> Self {
381        variant as _
382    }
383}
384#[doc = "Field `SLVSTATE` reader - Slave State code. Each value of this field indicates a specific required service for the Slave function. All other values are reserved. See Table 401 for state values and actions. note that the occurrence of some states and how they are handled are affected by DMA mode and Automatic Operation modes."]
385pub struct SLVSTATE_R(crate::FieldReader<u8, SLVSTATE_A>);
386impl SLVSTATE_R {
387    pub(crate) fn new(bits: u8) -> Self {
388        SLVSTATE_R(crate::FieldReader::new(bits))
389    }
390    #[doc = r"Get enumerated values variant"]
391    #[inline(always)]
392    pub fn variant(&self) -> Option<SLVSTATE_A> {
393        match self.bits {
394            0 => Some(SLVSTATE_A::SLAVE_ADDRESS),
395            1 => Some(SLVSTATE_A::SLAVE_RECEIVE),
396            2 => Some(SLVSTATE_A::SLAVE_TRANSMIT),
397            _ => None,
398        }
399    }
400    #[doc = "Checks if the value of the field is `SLAVE_ADDRESS`"]
401    #[inline(always)]
402    pub fn is_slave_address(&self) -> bool {
403        **self == SLVSTATE_A::SLAVE_ADDRESS
404    }
405    #[doc = "Checks if the value of the field is `SLAVE_RECEIVE`"]
406    #[inline(always)]
407    pub fn is_slave_receive(&self) -> bool {
408        **self == SLVSTATE_A::SLAVE_RECEIVE
409    }
410    #[doc = "Checks if the value of the field is `SLAVE_TRANSMIT`"]
411    #[inline(always)]
412    pub fn is_slave_transmit(&self) -> bool {
413        **self == SLVSTATE_A::SLAVE_TRANSMIT
414    }
415}
416impl core::ops::Deref for SLVSTATE_R {
417    type Target = crate::FieldReader<u8, SLVSTATE_A>;
418    #[inline(always)]
419    fn deref(&self) -> &Self::Target {
420        &self.0
421    }
422}
423#[doc = "Slave Not Stretching. Indicates when the slave function is stretching the I2C clock. This is needed in order to gracefully invoke Deep Sleep or Power-down modes during slave operation. This read-only flag reflects the slave function status in real time.\n\nValue on reset: 1"]
424#[derive(Clone, Copy, Debug, PartialEq)]
425pub enum SLVNOTSTR_A {
426    #[doc = "0: Stretching. The slave function is currently stretching the I2C bus clock. Deep-Sleep or Power-down mode cannot be entered at this time."]
427    STRETCHING = 0,
428    #[doc = "1: Not stretching. The slave function is not currently stretching the I 2C bus clock. Deep-sleep or Power-down mode could be entered at this time."]
429    NOT_STRETCHING = 1,
430}
431impl From<SLVNOTSTR_A> for bool {
432    #[inline(always)]
433    fn from(variant: SLVNOTSTR_A) -> Self {
434        variant as u8 != 0
435    }
436}
437#[doc = "Field `SLVNOTSTR` reader - Slave Not Stretching. Indicates when the slave function is stretching the I2C clock. This is needed in order to gracefully invoke Deep Sleep or Power-down modes during slave operation. This read-only flag reflects the slave function status in real time."]
438pub struct SLVNOTSTR_R(crate::FieldReader<bool, SLVNOTSTR_A>);
439impl SLVNOTSTR_R {
440    pub(crate) fn new(bits: bool) -> Self {
441        SLVNOTSTR_R(crate::FieldReader::new(bits))
442    }
443    #[doc = r"Get enumerated values variant"]
444    #[inline(always)]
445    pub fn variant(&self) -> SLVNOTSTR_A {
446        match self.bits {
447            false => SLVNOTSTR_A::STRETCHING,
448            true => SLVNOTSTR_A::NOT_STRETCHING,
449        }
450    }
451    #[doc = "Checks if the value of the field is `STRETCHING`"]
452    #[inline(always)]
453    pub fn is_stretching(&self) -> bool {
454        **self == SLVNOTSTR_A::STRETCHING
455    }
456    #[doc = "Checks if the value of the field is `NOT_STRETCHING`"]
457    #[inline(always)]
458    pub fn is_not_stretching(&self) -> bool {
459        **self == SLVNOTSTR_A::NOT_STRETCHING
460    }
461}
462impl core::ops::Deref for SLVNOTSTR_R {
463    type Target = crate::FieldReader<bool, SLVNOTSTR_A>;
464    #[inline(always)]
465    fn deref(&self) -> &Self::Target {
466        &self.0
467    }
468}
469#[doc = "Slave address match Index. This field is valid when the I2C slave function has been selected by receiving an address that matches one of the slave addresses defined by any enabled slave address registers, and provides an identification of the address that was matched. It is possible that more than one address could be matched, but only one match can be reported here.\n\nValue on reset: 0"]
470#[derive(Clone, Copy, Debug, PartialEq)]
471#[repr(u8)]
472pub enum SLVIDX_A {
473    #[doc = "0: Address 0. Slave address 0 was matched."]
474    ADDRESS0 = 0,
475    #[doc = "1: Address 1. Slave address 1 was matched."]
476    ADDRESS1 = 1,
477    #[doc = "2: Address 2. Slave address 2 was matched."]
478    ADDRESS2 = 2,
479    #[doc = "3: Address 3. Slave address 3 was matched."]
480    ADDRESS3 = 3,
481}
482impl From<SLVIDX_A> for u8 {
483    #[inline(always)]
484    fn from(variant: SLVIDX_A) -> Self {
485        variant as _
486    }
487}
488#[doc = "Field `SLVIDX` reader - Slave address match Index. This field is valid when the I2C slave function has been selected by receiving an address that matches one of the slave addresses defined by any enabled slave address registers, and provides an identification of the address that was matched. It is possible that more than one address could be matched, but only one match can be reported here."]
489pub struct SLVIDX_R(crate::FieldReader<u8, SLVIDX_A>);
490impl SLVIDX_R {
491    pub(crate) fn new(bits: u8) -> Self {
492        SLVIDX_R(crate::FieldReader::new(bits))
493    }
494    #[doc = r"Get enumerated values variant"]
495    #[inline(always)]
496    pub fn variant(&self) -> SLVIDX_A {
497        match self.bits {
498            0 => SLVIDX_A::ADDRESS0,
499            1 => SLVIDX_A::ADDRESS1,
500            2 => SLVIDX_A::ADDRESS2,
501            3 => SLVIDX_A::ADDRESS3,
502            _ => unreachable!(),
503        }
504    }
505    #[doc = "Checks if the value of the field is `ADDRESS0`"]
506    #[inline(always)]
507    pub fn is_address0(&self) -> bool {
508        **self == SLVIDX_A::ADDRESS0
509    }
510    #[doc = "Checks if the value of the field is `ADDRESS1`"]
511    #[inline(always)]
512    pub fn is_address1(&self) -> bool {
513        **self == SLVIDX_A::ADDRESS1
514    }
515    #[doc = "Checks if the value of the field is `ADDRESS2`"]
516    #[inline(always)]
517    pub fn is_address2(&self) -> bool {
518        **self == SLVIDX_A::ADDRESS2
519    }
520    #[doc = "Checks if the value of the field is `ADDRESS3`"]
521    #[inline(always)]
522    pub fn is_address3(&self) -> bool {
523        **self == SLVIDX_A::ADDRESS3
524    }
525}
526impl core::ops::Deref for SLVIDX_R {
527    type Target = crate::FieldReader<u8, SLVIDX_A>;
528    #[inline(always)]
529    fn deref(&self) -> &Self::Target {
530        &self.0
531    }
532}
533#[doc = "Slave selected flag. SLVSEL is set after an address match when software tells the Slave function to acknowledge the address, or when the address has been automatically acknowledged. It is cleared when another address cycle presents an address that does not match an enabled address on the Slave function, when slave software decides to NACK a matched address, when there is a Stop detected on the bus, when the master NACKs slave data, and in some combinations of Automatic Operation. SLVSEL is not cleared if software NACKs data.\n\nValue on reset: 0"]
534#[derive(Clone, Copy, Debug, PartialEq)]
535pub enum SLVSEL_A {
536    #[doc = "0: Not selected. The Slave function is not currently selected."]
537    NOT_SELECTED = 0,
538    #[doc = "1: Selected. The Slave function is currently selected."]
539    SELECTED = 1,
540}
541impl From<SLVSEL_A> for bool {
542    #[inline(always)]
543    fn from(variant: SLVSEL_A) -> Self {
544        variant as u8 != 0
545    }
546}
547#[doc = "Field `SLVSEL` reader - Slave selected flag. SLVSEL is set after an address match when software tells the Slave function to acknowledge the address, or when the address has been automatically acknowledged. It is cleared when another address cycle presents an address that does not match an enabled address on the Slave function, when slave software decides to NACK a matched address, when there is a Stop detected on the bus, when the master NACKs slave data, and in some combinations of Automatic Operation. SLVSEL is not cleared if software NACKs data."]
548pub struct SLVSEL_R(crate::FieldReader<bool, SLVSEL_A>);
549impl SLVSEL_R {
550    pub(crate) fn new(bits: bool) -> Self {
551        SLVSEL_R(crate::FieldReader::new(bits))
552    }
553    #[doc = r"Get enumerated values variant"]
554    #[inline(always)]
555    pub fn variant(&self) -> SLVSEL_A {
556        match self.bits {
557            false => SLVSEL_A::NOT_SELECTED,
558            true => SLVSEL_A::SELECTED,
559        }
560    }
561    #[doc = "Checks if the value of the field is `NOT_SELECTED`"]
562    #[inline(always)]
563    pub fn is_not_selected(&self) -> bool {
564        **self == SLVSEL_A::NOT_SELECTED
565    }
566    #[doc = "Checks if the value of the field is `SELECTED`"]
567    #[inline(always)]
568    pub fn is_selected(&self) -> bool {
569        **self == SLVSEL_A::SELECTED
570    }
571}
572impl core::ops::Deref for SLVSEL_R {
573    type Target = crate::FieldReader<bool, SLVSEL_A>;
574    #[inline(always)]
575    fn deref(&self) -> &Self::Target {
576        &self.0
577    }
578}
579#[doc = "Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit.\n\nValue on reset: 0"]
580#[derive(Clone, Copy, Debug, PartialEq)]
581pub enum SLVDESEL_A {
582    #[doc = "0: Not deselected. The Slave function has not become deselected. This does not mean that it is currently selected. That information can be found in the SLVSEL flag."]
583    NOT_DESELECTED = 0,
584    #[doc = "1: Deselected. The Slave function has become deselected. This is specifically caused by the SLVSEL flag changing from 1 to 0. See the description of SLVSEL for details on when that event occurs."]
585    DESELECTED = 1,
586}
587impl From<SLVDESEL_A> for bool {
588    #[inline(always)]
589    fn from(variant: SLVDESEL_A) -> Self {
590        variant as u8 != 0
591    }
592}
593#[doc = "Field `SLVDESEL` reader - Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit."]
594pub struct SLVDESEL_R(crate::FieldReader<bool, SLVDESEL_A>);
595impl SLVDESEL_R {
596    pub(crate) fn new(bits: bool) -> Self {
597        SLVDESEL_R(crate::FieldReader::new(bits))
598    }
599    #[doc = r"Get enumerated values variant"]
600    #[inline(always)]
601    pub fn variant(&self) -> SLVDESEL_A {
602        match self.bits {
603            false => SLVDESEL_A::NOT_DESELECTED,
604            true => SLVDESEL_A::DESELECTED,
605        }
606    }
607    #[doc = "Checks if the value of the field is `NOT_DESELECTED`"]
608    #[inline(always)]
609    pub fn is_not_deselected(&self) -> bool {
610        **self == SLVDESEL_A::NOT_DESELECTED
611    }
612    #[doc = "Checks if the value of the field is `DESELECTED`"]
613    #[inline(always)]
614    pub fn is_deselected(&self) -> bool {
615        **self == SLVDESEL_A::DESELECTED
616    }
617}
618impl core::ops::Deref for SLVDESEL_R {
619    type Target = crate::FieldReader<bool, SLVDESEL_A>;
620    #[inline(always)]
621    fn deref(&self) -> &Self::Target {
622        &self.0
623    }
624}
625#[doc = "Field `SLVDESEL` writer - Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit."]
626pub struct SLVDESEL_W<'a> {
627    w: &'a mut W,
628}
629impl<'a> SLVDESEL_W<'a> {
630    #[doc = r"Writes `variant` to the field"]
631    #[inline(always)]
632    pub fn variant(self, variant: SLVDESEL_A) -> &'a mut W {
633        self.bit(variant.into())
634    }
635    #[doc = "Not deselected. The Slave function has not become deselected. This does not mean that it is currently selected. That information can be found in the SLVSEL flag."]
636    #[inline(always)]
637    pub fn not_deselected(self) -> &'a mut W {
638        self.variant(SLVDESEL_A::NOT_DESELECTED)
639    }
640    #[doc = "Deselected. The Slave function has become deselected. This is specifically caused by the SLVSEL flag changing from 1 to 0. See the description of SLVSEL for details on when that event occurs."]
641    #[inline(always)]
642    pub fn deselected(self) -> &'a mut W {
643        self.variant(SLVDESEL_A::DESELECTED)
644    }
645    #[doc = r"Sets the field bit"]
646    #[inline(always)]
647    pub fn set_bit(self) -> &'a mut W {
648        self.bit(true)
649    }
650    #[doc = r"Clears the field bit"]
651    #[inline(always)]
652    pub fn clear_bit(self) -> &'a mut W {
653        self.bit(false)
654    }
655    #[doc = r"Writes raw bits to the field"]
656    #[inline(always)]
657    pub fn bit(self, value: bool) -> &'a mut W {
658        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
659        self.w
660    }
661}
662#[doc = "Monitor Ready. This flag is cleared when the MONRXDAT register is read.\n\nValue on reset: 0"]
663#[derive(Clone, Copy, Debug, PartialEq)]
664pub enum MONRDY_A {
665    #[doc = "0: No data. The Monitor function does not currently have data available."]
666    NO_DATA = 0,
667    #[doc = "1: Data waiting. The Monitor function has data waiting to be read."]
668    DATA_WAITING = 1,
669}
670impl From<MONRDY_A> for bool {
671    #[inline(always)]
672    fn from(variant: MONRDY_A) -> Self {
673        variant as u8 != 0
674    }
675}
676#[doc = "Field `MONRDY` reader - Monitor Ready. This flag is cleared when the MONRXDAT register is read."]
677pub struct MONRDY_R(crate::FieldReader<bool, MONRDY_A>);
678impl MONRDY_R {
679    pub(crate) fn new(bits: bool) -> Self {
680        MONRDY_R(crate::FieldReader::new(bits))
681    }
682    #[doc = r"Get enumerated values variant"]
683    #[inline(always)]
684    pub fn variant(&self) -> MONRDY_A {
685        match self.bits {
686            false => MONRDY_A::NO_DATA,
687            true => MONRDY_A::DATA_WAITING,
688        }
689    }
690    #[doc = "Checks if the value of the field is `NO_DATA`"]
691    #[inline(always)]
692    pub fn is_no_data(&self) -> bool {
693        **self == MONRDY_A::NO_DATA
694    }
695    #[doc = "Checks if the value of the field is `DATA_WAITING`"]
696    #[inline(always)]
697    pub fn is_data_waiting(&self) -> bool {
698        **self == MONRDY_A::DATA_WAITING
699    }
700}
701impl core::ops::Deref for MONRDY_R {
702    type Target = crate::FieldReader<bool, MONRDY_A>;
703    #[inline(always)]
704    fn deref(&self) -> &Self::Target {
705        &self.0
706    }
707}
708#[doc = "Monitor Overflow flag.\n\nValue on reset: 0"]
709#[derive(Clone, Copy, Debug, PartialEq)]
710pub enum MONOV_A {
711    #[doc = "0: No overrun. Monitor data has not overrun."]
712    NO_OVERRUN = 0,
713    #[doc = "1: Overrun. A Monitor data overrun has occurred. This can only happen when Monitor clock stretching not enabled via the MONCLKSTR bit in the CFG register. Writing 1 to this bit clears the flag."]
714    OVERRUN = 1,
715}
716impl From<MONOV_A> for bool {
717    #[inline(always)]
718    fn from(variant: MONOV_A) -> Self {
719        variant as u8 != 0
720    }
721}
722#[doc = "Field `MONOV` reader - Monitor Overflow flag."]
723pub struct MONOV_R(crate::FieldReader<bool, MONOV_A>);
724impl MONOV_R {
725    pub(crate) fn new(bits: bool) -> Self {
726        MONOV_R(crate::FieldReader::new(bits))
727    }
728    #[doc = r"Get enumerated values variant"]
729    #[inline(always)]
730    pub fn variant(&self) -> MONOV_A {
731        match self.bits {
732            false => MONOV_A::NO_OVERRUN,
733            true => MONOV_A::OVERRUN,
734        }
735    }
736    #[doc = "Checks if the value of the field is `NO_OVERRUN`"]
737    #[inline(always)]
738    pub fn is_no_overrun(&self) -> bool {
739        **self == MONOV_A::NO_OVERRUN
740    }
741    #[doc = "Checks if the value of the field is `OVERRUN`"]
742    #[inline(always)]
743    pub fn is_overrun(&self) -> bool {
744        **self == MONOV_A::OVERRUN
745    }
746}
747impl core::ops::Deref for MONOV_R {
748    type Target = crate::FieldReader<bool, MONOV_A>;
749    #[inline(always)]
750    fn deref(&self) -> &Self::Target {
751        &self.0
752    }
753}
754#[doc = "Field `MONOV` writer - Monitor Overflow flag."]
755pub struct MONOV_W<'a> {
756    w: &'a mut W,
757}
758impl<'a> MONOV_W<'a> {
759    #[doc = r"Writes `variant` to the field"]
760    #[inline(always)]
761    pub fn variant(self, variant: MONOV_A) -> &'a mut W {
762        self.bit(variant.into())
763    }
764    #[doc = "No overrun. Monitor data has not overrun."]
765    #[inline(always)]
766    pub fn no_overrun(self) -> &'a mut W {
767        self.variant(MONOV_A::NO_OVERRUN)
768    }
769    #[doc = "Overrun. A Monitor data overrun has occurred. This can only happen when Monitor clock stretching not enabled via the MONCLKSTR bit in the CFG register. Writing 1 to this bit clears the flag."]
770    #[inline(always)]
771    pub fn overrun(self) -> &'a mut W {
772        self.variant(MONOV_A::OVERRUN)
773    }
774    #[doc = r"Sets the field bit"]
775    #[inline(always)]
776    pub fn set_bit(self) -> &'a mut W {
777        self.bit(true)
778    }
779    #[doc = r"Clears the field bit"]
780    #[inline(always)]
781    pub fn clear_bit(self) -> &'a mut W {
782        self.bit(false)
783    }
784    #[doc = r"Writes raw bits to the field"]
785    #[inline(always)]
786    pub fn bit(self, value: bool) -> &'a mut W {
787        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
788        self.w
789    }
790}
791#[doc = "Monitor Active flag. Indicates when the Monitor function considers the I 2C bus to be active. Active is defined here as when some Master is on the bus: a bus Start has occurred more recently than a bus Stop.\n\nValue on reset: 0"]
792#[derive(Clone, Copy, Debug, PartialEq)]
793pub enum MONACTIVE_A {
794    #[doc = "0: Inactive. The Monitor function considers the I2C bus to be inactive."]
795    INACTIVE = 0,
796    #[doc = "1: Active. The Monitor function considers the I2C bus to be active."]
797    ACTIVE = 1,
798}
799impl From<MONACTIVE_A> for bool {
800    #[inline(always)]
801    fn from(variant: MONACTIVE_A) -> Self {
802        variant as u8 != 0
803    }
804}
805#[doc = "Field `MONACTIVE` reader - Monitor Active flag. Indicates when the Monitor function considers the I 2C bus to be active. Active is defined here as when some Master is on the bus: a bus Start has occurred more recently than a bus Stop."]
806pub struct MONACTIVE_R(crate::FieldReader<bool, MONACTIVE_A>);
807impl MONACTIVE_R {
808    pub(crate) fn new(bits: bool) -> Self {
809        MONACTIVE_R(crate::FieldReader::new(bits))
810    }
811    #[doc = r"Get enumerated values variant"]
812    #[inline(always)]
813    pub fn variant(&self) -> MONACTIVE_A {
814        match self.bits {
815            false => MONACTIVE_A::INACTIVE,
816            true => MONACTIVE_A::ACTIVE,
817        }
818    }
819    #[doc = "Checks if the value of the field is `INACTIVE`"]
820    #[inline(always)]
821    pub fn is_inactive(&self) -> bool {
822        **self == MONACTIVE_A::INACTIVE
823    }
824    #[doc = "Checks if the value of the field is `ACTIVE`"]
825    #[inline(always)]
826    pub fn is_active(&self) -> bool {
827        **self == MONACTIVE_A::ACTIVE
828    }
829}
830impl core::ops::Deref for MONACTIVE_R {
831    type Target = crate::FieldReader<bool, MONACTIVE_A>;
832    #[inline(always)]
833    fn deref(&self) -> &Self::Target {
834        &self.0
835    }
836}
837#[doc = "Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit.\n\nValue on reset: 0"]
838#[derive(Clone, Copy, Debug, PartialEq)]
839pub enum MONIDLE_A {
840    #[doc = "0: Not idle. The I2C bus is not idle, or this flag has been cleared by software."]
841    NOT_IDLE = 0,
842    #[doc = "1: Idle. The I2C bus has gone idle at least once since the last time this flag was cleared by software."]
843    IDLE = 1,
844}
845impl From<MONIDLE_A> for bool {
846    #[inline(always)]
847    fn from(variant: MONIDLE_A) -> Self {
848        variant as u8 != 0
849    }
850}
851#[doc = "Field `MONIDLE` reader - Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit."]
852pub struct MONIDLE_R(crate::FieldReader<bool, MONIDLE_A>);
853impl MONIDLE_R {
854    pub(crate) fn new(bits: bool) -> Self {
855        MONIDLE_R(crate::FieldReader::new(bits))
856    }
857    #[doc = r"Get enumerated values variant"]
858    #[inline(always)]
859    pub fn variant(&self) -> MONIDLE_A {
860        match self.bits {
861            false => MONIDLE_A::NOT_IDLE,
862            true => MONIDLE_A::IDLE,
863        }
864    }
865    #[doc = "Checks if the value of the field is `NOT_IDLE`"]
866    #[inline(always)]
867    pub fn is_not_idle(&self) -> bool {
868        **self == MONIDLE_A::NOT_IDLE
869    }
870    #[doc = "Checks if the value of the field is `IDLE`"]
871    #[inline(always)]
872    pub fn is_idle(&self) -> bool {
873        **self == MONIDLE_A::IDLE
874    }
875}
876impl core::ops::Deref for MONIDLE_R {
877    type Target = crate::FieldReader<bool, MONIDLE_A>;
878    #[inline(always)]
879    fn deref(&self) -> &Self::Target {
880        &self.0
881    }
882}
883#[doc = "Field `MONIDLE` writer - Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit."]
884pub struct MONIDLE_W<'a> {
885    w: &'a mut W,
886}
887impl<'a> MONIDLE_W<'a> {
888    #[doc = r"Writes `variant` to the field"]
889    #[inline(always)]
890    pub fn variant(self, variant: MONIDLE_A) -> &'a mut W {
891        self.bit(variant.into())
892    }
893    #[doc = "Not idle. The I2C bus is not idle, or this flag has been cleared by software."]
894    #[inline(always)]
895    pub fn not_idle(self) -> &'a mut W {
896        self.variant(MONIDLE_A::NOT_IDLE)
897    }
898    #[doc = "Idle. The I2C bus has gone idle at least once since the last time this flag was cleared by software."]
899    #[inline(always)]
900    pub fn idle(self) -> &'a mut W {
901        self.variant(MONIDLE_A::IDLE)
902    }
903    #[doc = r"Sets the field bit"]
904    #[inline(always)]
905    pub fn set_bit(self) -> &'a mut W {
906        self.bit(true)
907    }
908    #[doc = r"Clears the field bit"]
909    #[inline(always)]
910    pub fn clear_bit(self) -> &'a mut W {
911        self.bit(false)
912    }
913    #[doc = r"Writes raw bits to the field"]
914    #[inline(always)]
915    pub fn bit(self, value: bool) -> &'a mut W {
916        self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
917        self.w
918    }
919}
920#[doc = "Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle.\n\nValue on reset: 0"]
921#[derive(Clone, Copy, Debug, PartialEq)]
922pub enum EVENTTIMEOUT_A {
923    #[doc = "0: No time-out. I2C bus events have not caused a time-out."]
924    NO_TIMEOUT = 0,
925    #[doc = "1: Event time-out. The time between I2C bus events has been longer than the time specified by the TIMEOUT register."]
926    EVEN_TIMEOUT = 1,
927}
928impl From<EVENTTIMEOUT_A> for bool {
929    #[inline(always)]
930    fn from(variant: EVENTTIMEOUT_A) -> Self {
931        variant as u8 != 0
932    }
933}
934#[doc = "Field `EVENTTIMEOUT` reader - Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle."]
935pub struct EVENTTIMEOUT_R(crate::FieldReader<bool, EVENTTIMEOUT_A>);
936impl EVENTTIMEOUT_R {
937    pub(crate) fn new(bits: bool) -> Self {
938        EVENTTIMEOUT_R(crate::FieldReader::new(bits))
939    }
940    #[doc = r"Get enumerated values variant"]
941    #[inline(always)]
942    pub fn variant(&self) -> EVENTTIMEOUT_A {
943        match self.bits {
944            false => EVENTTIMEOUT_A::NO_TIMEOUT,
945            true => EVENTTIMEOUT_A::EVEN_TIMEOUT,
946        }
947    }
948    #[doc = "Checks if the value of the field is `NO_TIMEOUT`"]
949    #[inline(always)]
950    pub fn is_no_timeout(&self) -> bool {
951        **self == EVENTTIMEOUT_A::NO_TIMEOUT
952    }
953    #[doc = "Checks if the value of the field is `EVEN_TIMEOUT`"]
954    #[inline(always)]
955    pub fn is_even_timeout(&self) -> bool {
956        **self == EVENTTIMEOUT_A::EVEN_TIMEOUT
957    }
958}
959impl core::ops::Deref for EVENTTIMEOUT_R {
960    type Target = crate::FieldReader<bool, EVENTTIMEOUT_A>;
961    #[inline(always)]
962    fn deref(&self) -> &Self::Target {
963        &self.0
964    }
965}
966#[doc = "Field `EVENTTIMEOUT` writer - Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle."]
967pub struct EVENTTIMEOUT_W<'a> {
968    w: &'a mut W,
969}
970impl<'a> EVENTTIMEOUT_W<'a> {
971    #[doc = r"Writes `variant` to the field"]
972    #[inline(always)]
973    pub fn variant(self, variant: EVENTTIMEOUT_A) -> &'a mut W {
974        self.bit(variant.into())
975    }
976    #[doc = "No time-out. I2C bus events have not caused a time-out."]
977    #[inline(always)]
978    pub fn no_timeout(self) -> &'a mut W {
979        self.variant(EVENTTIMEOUT_A::NO_TIMEOUT)
980    }
981    #[doc = "Event time-out. The time between I2C bus events has been longer than the time specified by the TIMEOUT register."]
982    #[inline(always)]
983    pub fn even_timeout(self) -> &'a mut W {
984        self.variant(EVENTTIMEOUT_A::EVEN_TIMEOUT)
985    }
986    #[doc = r"Sets the field bit"]
987    #[inline(always)]
988    pub fn set_bit(self) -> &'a mut W {
989        self.bit(true)
990    }
991    #[doc = r"Clears the field bit"]
992    #[inline(always)]
993    pub fn clear_bit(self) -> &'a mut W {
994        self.bit(false)
995    }
996    #[doc = r"Writes raw bits to the field"]
997    #[inline(always)]
998    pub fn bit(self, value: bool) -> &'a mut W {
999        self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
1000        self.w
1001    }
1002}
1003#[doc = "SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit.\n\nValue on reset: 0"]
1004#[derive(Clone, Copy, Debug, PartialEq)]
1005pub enum SCLTIMEOUT_A {
1006    #[doc = "0: No time-out. SCL low time has not caused a time-out."]
1007    NO_TIMEOUT = 0,
1008    #[doc = "1: Time-out. SCL low time has caused a time-out."]
1009    TIMEOUT = 1,
1010}
1011impl From<SCLTIMEOUT_A> for bool {
1012    #[inline(always)]
1013    fn from(variant: SCLTIMEOUT_A) -> Self {
1014        variant as u8 != 0
1015    }
1016}
1017#[doc = "Field `SCLTIMEOUT` reader - SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit."]
1018pub struct SCLTIMEOUT_R(crate::FieldReader<bool, SCLTIMEOUT_A>);
1019impl SCLTIMEOUT_R {
1020    pub(crate) fn new(bits: bool) -> Self {
1021        SCLTIMEOUT_R(crate::FieldReader::new(bits))
1022    }
1023    #[doc = r"Get enumerated values variant"]
1024    #[inline(always)]
1025    pub fn variant(&self) -> SCLTIMEOUT_A {
1026        match self.bits {
1027            false => SCLTIMEOUT_A::NO_TIMEOUT,
1028            true => SCLTIMEOUT_A::TIMEOUT,
1029        }
1030    }
1031    #[doc = "Checks if the value of the field is `NO_TIMEOUT`"]
1032    #[inline(always)]
1033    pub fn is_no_timeout(&self) -> bool {
1034        **self == SCLTIMEOUT_A::NO_TIMEOUT
1035    }
1036    #[doc = "Checks if the value of the field is `TIMEOUT`"]
1037    #[inline(always)]
1038    pub fn is_timeout(&self) -> bool {
1039        **self == SCLTIMEOUT_A::TIMEOUT
1040    }
1041}
1042impl core::ops::Deref for SCLTIMEOUT_R {
1043    type Target = crate::FieldReader<bool, SCLTIMEOUT_A>;
1044    #[inline(always)]
1045    fn deref(&self) -> &Self::Target {
1046        &self.0
1047    }
1048}
1049#[doc = "Field `SCLTIMEOUT` writer - SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit."]
1050pub struct SCLTIMEOUT_W<'a> {
1051    w: &'a mut W,
1052}
1053impl<'a> SCLTIMEOUT_W<'a> {
1054    #[doc = r"Writes `variant` to the field"]
1055    #[inline(always)]
1056    pub fn variant(self, variant: SCLTIMEOUT_A) -> &'a mut W {
1057        self.bit(variant.into())
1058    }
1059    #[doc = "No time-out. SCL low time has not caused a time-out."]
1060    #[inline(always)]
1061    pub fn no_timeout(self) -> &'a mut W {
1062        self.variant(SCLTIMEOUT_A::NO_TIMEOUT)
1063    }
1064    #[doc = "Time-out. SCL low time has caused a time-out."]
1065    #[inline(always)]
1066    pub fn timeout(self) -> &'a mut W {
1067        self.variant(SCLTIMEOUT_A::TIMEOUT)
1068    }
1069    #[doc = r"Sets the field bit"]
1070    #[inline(always)]
1071    pub fn set_bit(self) -> &'a mut W {
1072        self.bit(true)
1073    }
1074    #[doc = r"Clears the field bit"]
1075    #[inline(always)]
1076    pub fn clear_bit(self) -> &'a mut W {
1077        self.bit(false)
1078    }
1079    #[doc = r"Writes raw bits to the field"]
1080    #[inline(always)]
1081    pub fn bit(self, value: bool) -> &'a mut W {
1082        self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
1083        self.w
1084    }
1085}
1086impl R {
1087    #[doc = "Bit 0 - Master Pending. Indicates that the Master is waiting to continue communication on the I2C-bus (pending) or is idle. When the master is pending, the MSTSTATE bits indicate what type of software service if any the master expects. This flag will cause an interrupt when set if, enabled via the INTENSET register. The MSTPENDING flag is not set when the DMA is handling an event (if the MSTDMA bit in the MSTCTL register is set). If the master is in the idle state, and no communication is needed, mask this interrupt."]
1088    #[inline(always)]
1089    pub fn mstpending(&self) -> MSTPENDING_R {
1090        MSTPENDING_R::new((self.bits & 0x01) != 0)
1091    }
1092    #[doc = "Bits 1:3 - Master State code. The master state code reflects the master state when the MSTPENDING bit is set, that is the master is pending or in the idle state. Each value of this field indicates a specific required service for the Master function. All other values are reserved. See Table 400 for details of state values and appropriate responses."]
1093    #[inline(always)]
1094    pub fn mststate(&self) -> MSTSTATE_R {
1095        MSTSTATE_R::new(((self.bits >> 1) & 0x07) as u8)
1096    }
1097    #[doc = "Bit 4 - Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
1098    #[inline(always)]
1099    pub fn mstarbloss(&self) -> MSTARBLOSS_R {
1100        MSTARBLOSS_R::new(((self.bits >> 4) & 0x01) != 0)
1101    }
1102    #[doc = "Bit 6 - Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
1103    #[inline(always)]
1104    pub fn mstststperr(&self) -> MSTSTSTPERR_R {
1105        MSTSTSTPERR_R::new(((self.bits >> 6) & 0x01) != 0)
1106    }
1107    #[doc = "Bit 8 - Slave Pending. Indicates that the Slave function is waiting to continue communication on the I2C-bus and needs software service. This flag will cause an interrupt when set if enabled via INTENSET. The SLVPENDING flag is not set when the DMA is handling an event (if the SLVDMA bit in the SLVCTL register is set). The SLVPENDING flag is read-only and is automatically cleared when a 1 is written to the SLVCONTINUE bit in the SLVCTL register. The point in time when SlvPending is set depends on whether the I2C interface is in HSCAPABLE mode. See Section 25.7.2.2.2. When the I2C interface is configured to be HSCAPABLE, HS master codes are detected automatically. Due to the requirements of the HS I2C specification, slave addresses must also be detected automatically, since the address must be acknowledged before the clock can be stretched."]
1108    #[inline(always)]
1109    pub fn slvpending(&self) -> SLVPENDING_R {
1110        SLVPENDING_R::new(((self.bits >> 8) & 0x01) != 0)
1111    }
1112    #[doc = "Bits 9:10 - Slave State code. Each value of this field indicates a specific required service for the Slave function. All other values are reserved. See Table 401 for state values and actions. note that the occurrence of some states and how they are handled are affected by DMA mode and Automatic Operation modes."]
1113    #[inline(always)]
1114    pub fn slvstate(&self) -> SLVSTATE_R {
1115        SLVSTATE_R::new(((self.bits >> 9) & 0x03) as u8)
1116    }
1117    #[doc = "Bit 11 - Slave Not Stretching. Indicates when the slave function is stretching the I2C clock. This is needed in order to gracefully invoke Deep Sleep or Power-down modes during slave operation. This read-only flag reflects the slave function status in real time."]
1118    #[inline(always)]
1119    pub fn slvnotstr(&self) -> SLVNOTSTR_R {
1120        SLVNOTSTR_R::new(((self.bits >> 11) & 0x01) != 0)
1121    }
1122    #[doc = "Bits 12:13 - Slave address match Index. This field is valid when the I2C slave function has been selected by receiving an address that matches one of the slave addresses defined by any enabled slave address registers, and provides an identification of the address that was matched. It is possible that more than one address could be matched, but only one match can be reported here."]
1123    #[inline(always)]
1124    pub fn slvidx(&self) -> SLVIDX_R {
1125        SLVIDX_R::new(((self.bits >> 12) & 0x03) as u8)
1126    }
1127    #[doc = "Bit 14 - Slave selected flag. SLVSEL is set after an address match when software tells the Slave function to acknowledge the address, or when the address has been automatically acknowledged. It is cleared when another address cycle presents an address that does not match an enabled address on the Slave function, when slave software decides to NACK a matched address, when there is a Stop detected on the bus, when the master NACKs slave data, and in some combinations of Automatic Operation. SLVSEL is not cleared if software NACKs data."]
1128    #[inline(always)]
1129    pub fn slvsel(&self) -> SLVSEL_R {
1130        SLVSEL_R::new(((self.bits >> 14) & 0x01) != 0)
1131    }
1132    #[doc = "Bit 15 - Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit."]
1133    #[inline(always)]
1134    pub fn slvdesel(&self) -> SLVDESEL_R {
1135        SLVDESEL_R::new(((self.bits >> 15) & 0x01) != 0)
1136    }
1137    #[doc = "Bit 16 - Monitor Ready. This flag is cleared when the MONRXDAT register is read."]
1138    #[inline(always)]
1139    pub fn monrdy(&self) -> MONRDY_R {
1140        MONRDY_R::new(((self.bits >> 16) & 0x01) != 0)
1141    }
1142    #[doc = "Bit 17 - Monitor Overflow flag."]
1143    #[inline(always)]
1144    pub fn monov(&self) -> MONOV_R {
1145        MONOV_R::new(((self.bits >> 17) & 0x01) != 0)
1146    }
1147    #[doc = "Bit 18 - Monitor Active flag. Indicates when the Monitor function considers the I 2C bus to be active. Active is defined here as when some Master is on the bus: a bus Start has occurred more recently than a bus Stop."]
1148    #[inline(always)]
1149    pub fn monactive(&self) -> MONACTIVE_R {
1150        MONACTIVE_R::new(((self.bits >> 18) & 0x01) != 0)
1151    }
1152    #[doc = "Bit 19 - Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit."]
1153    #[inline(always)]
1154    pub fn monidle(&self) -> MONIDLE_R {
1155        MONIDLE_R::new(((self.bits >> 19) & 0x01) != 0)
1156    }
1157    #[doc = "Bit 24 - Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle."]
1158    #[inline(always)]
1159    pub fn eventtimeout(&self) -> EVENTTIMEOUT_R {
1160        EVENTTIMEOUT_R::new(((self.bits >> 24) & 0x01) != 0)
1161    }
1162    #[doc = "Bit 25 - SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit."]
1163    #[inline(always)]
1164    pub fn scltimeout(&self) -> SCLTIMEOUT_R {
1165        SCLTIMEOUT_R::new(((self.bits >> 25) & 0x01) != 0)
1166    }
1167}
1168impl W {
1169    #[doc = "Bit 4 - Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
1170    #[inline(always)]
1171    pub fn mstarbloss(&mut self) -> MSTARBLOSS_W {
1172        MSTARBLOSS_W { w: self }
1173    }
1174    #[doc = "Bit 6 - Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
1175    #[inline(always)]
1176    pub fn mstststperr(&mut self) -> MSTSTSTPERR_W {
1177        MSTSTSTPERR_W { w: self }
1178    }
1179    #[doc = "Bit 15 - Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit."]
1180    #[inline(always)]
1181    pub fn slvdesel(&mut self) -> SLVDESEL_W {
1182        SLVDESEL_W { w: self }
1183    }
1184    #[doc = "Bit 17 - Monitor Overflow flag."]
1185    #[inline(always)]
1186    pub fn monov(&mut self) -> MONOV_W {
1187        MONOV_W { w: self }
1188    }
1189    #[doc = "Bit 19 - Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit."]
1190    #[inline(always)]
1191    pub fn monidle(&mut self) -> MONIDLE_W {
1192        MONIDLE_W { w: self }
1193    }
1194    #[doc = "Bit 24 - Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle."]
1195    #[inline(always)]
1196    pub fn eventtimeout(&mut self) -> EVENTTIMEOUT_W {
1197        EVENTTIMEOUT_W { w: self }
1198    }
1199    #[doc = "Bit 25 - SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit."]
1200    #[inline(always)]
1201    pub fn scltimeout(&mut self) -> SCLTIMEOUT_W {
1202        SCLTIMEOUT_W { w: self }
1203    }
1204    #[doc = "Writes raw bits to the register."]
1205    #[inline(always)]
1206    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1207        self.0.bits(bits);
1208        self
1209    }
1210}
1211#[doc = "Status register for Master, Slave, and Monitor functions.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"]
1212pub struct STAT_SPEC;
1213impl crate::RegisterSpec for STAT_SPEC {
1214    type Ux = u32;
1215}
1216#[doc = "`read()` method returns [stat::R](R) reader structure"]
1217impl crate::Readable for STAT_SPEC {
1218    type Reader = R;
1219}
1220#[doc = "`write(|w| ..)` method takes [stat::W](W) writer structure"]
1221impl crate::Writable for STAT_SPEC {
1222    type Writer = W;
1223}
1224#[doc = "`reset()` method sets STAT to value 0x0801"]
1225impl crate::Resettable for STAT_SPEC {
1226    #[inline(always)]
1227    fn reset_value() -> Self::Ux {
1228        0x0801
1229    }
1230}
lpc82x_pac/i2c0/stat.rs

lpc82x_pac/i2c0/
stat.rs
