lpc82x_pac/gpio/
clr0.rs

1#[doc = "Register `CLR0` reader"]
2pub struct R(crate::R<CLR0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CLR0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CLR0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CLR0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CLR0` writer"]
17pub struct W(crate::W<CLR0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CLR0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CLR0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CLR0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CLRP` writer - Clear output bits (bit 0 = PIOn_0, bit 1 = PIOn_1, etc.). Supported pins depends on the specific device and package. 0 = No operation. 1 = Clear output bit."]
38pub struct CLRP_W<'a> {
39    w: &'a mut W,
40}
41impl<'a> CLRP_W<'a> {
42    #[doc = r"Writes raw bits to the field"]
43    #[inline(always)]
44    pub unsafe fn bits(self, value: u32) -> &'a mut W {
45        self.w.bits = (self.w.bits & !0x1fff_ffff) | (value as u32 & 0x1fff_ffff);
46        self.w
47    }
48}
49impl W {
50    #[doc = "Bits 0:28 - Clear output bits (bit 0 = PIOn_0, bit 1 = PIOn_1, etc.). Supported pins depends on the specific device and package. 0 = No operation. 1 = Clear output bit."]
51    #[inline(always)]
52    pub fn clrp(&mut self) -> CLRP_W {
53        CLRP_W { w: self }
54    }
55    #[doc = "Writes raw bits to the register."]
56    #[inline(always)]
57    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
58        self.0.bits(bits);
59        self
60    }
61}
62#[doc = "Clear port\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr0](index.html) module"]
63pub struct CLR0_SPEC;
64impl crate::RegisterSpec for CLR0_SPEC {
65    type Ux = u32;
66}
67#[doc = "`read()` method returns [clr0::R](R) reader structure"]
68impl crate::Readable for CLR0_SPEC {
69    type Reader = R;
70}
71#[doc = "`write(|w| ..)` method takes [clr0::W](W) writer structure"]
72impl crate::Writable for CLR0_SPEC {
73    type Writer = W;
74}
75#[doc = "`reset()` method sets CLR0 to value 0"]
76impl crate::Resettable for CLR0_SPEC {
77    #[inline(always)]
78    fn reset_value() -> Self::Ux {
79        0
80    }
81}
lpc82x_pac/gpio/clr0.rs

lpc82x_pac/gpio/
clr0.rs
