1#[doc = "Register `MODE` reader"]
2pub struct R(crate::R<MODE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<MODE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<MODE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<MODE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `MODE` writer"]
17pub struct W(crate::W<MODE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<MODE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<MODE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<MODE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CRC_POLY` reader - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
38pub struct CRC_POLY_R(crate::FieldReader<u8, u8>);
39impl CRC_POLY_R {
40 pub(crate) fn new(bits: u8) -> Self {
41 CRC_POLY_R(crate::FieldReader::new(bits))
42 }
43}
44impl core::ops::Deref for CRC_POLY_R {
45 type Target = crate::FieldReader<u8, u8>;
46 #[inline(always)]
47 fn deref(&self) -> &Self::Target {
48 &self.0
49 }
50}
51#[doc = "Field `CRC_POLY` writer - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
52pub struct CRC_POLY_W<'a> {
53 w: &'a mut W,
54}
55impl<'a> CRC_POLY_W<'a> {
56 #[doc = r"Writes raw bits to the field"]
57 #[inline(always)]
58 pub unsafe fn bits(self, value: u8) -> &'a mut W {
59 self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
60 self.w
61 }
62}
63#[doc = "Field `BIT_RVS_WR` reader - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
64pub struct BIT_RVS_WR_R(crate::FieldReader<bool, bool>);
65impl BIT_RVS_WR_R {
66 pub(crate) fn new(bits: bool) -> Self {
67 BIT_RVS_WR_R(crate::FieldReader::new(bits))
68 }
69}
70impl core::ops::Deref for BIT_RVS_WR_R {
71 type Target = crate::FieldReader<bool, bool>;
72 #[inline(always)]
73 fn deref(&self) -> &Self::Target {
74 &self.0
75 }
76}
77#[doc = "Field `BIT_RVS_WR` writer - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
78pub struct BIT_RVS_WR_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> BIT_RVS_WR_W<'a> {
82 #[doc = r"Sets the field bit"]
83 #[inline(always)]
84 pub fn set_bit(self) -> &'a mut W {
85 self.bit(true)
86 }
87 #[doc = r"Clears the field bit"]
88 #[inline(always)]
89 pub fn clear_bit(self) -> &'a mut W {
90 self.bit(false)
91 }
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub fn bit(self, value: bool) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
96 self.w
97 }
98}
99#[doc = "Field `CMPL_WR` reader - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
100pub struct CMPL_WR_R(crate::FieldReader<bool, bool>);
101impl CMPL_WR_R {
102 pub(crate) fn new(bits: bool) -> Self {
103 CMPL_WR_R(crate::FieldReader::new(bits))
104 }
105}
106impl core::ops::Deref for CMPL_WR_R {
107 type Target = crate::FieldReader<bool, bool>;
108 #[inline(always)]
109 fn deref(&self) -> &Self::Target {
110 &self.0
111 }
112}
113#[doc = "Field `CMPL_WR` writer - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
114pub struct CMPL_WR_W<'a> {
115 w: &'a mut W,
116}
117impl<'a> CMPL_WR_W<'a> {
118 #[doc = r"Sets the field bit"]
119 #[inline(always)]
120 pub fn set_bit(self) -> &'a mut W {
121 self.bit(true)
122 }
123 #[doc = r"Clears the field bit"]
124 #[inline(always)]
125 pub fn clear_bit(self) -> &'a mut W {
126 self.bit(false)
127 }
128 #[doc = r"Writes raw bits to the field"]
129 #[inline(always)]
130 pub fn bit(self, value: bool) -> &'a mut W {
131 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
132 self.w
133 }
134}
135#[doc = "Field `BIT_RVS_SUM` reader - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
136pub struct BIT_RVS_SUM_R(crate::FieldReader<bool, bool>);
137impl BIT_RVS_SUM_R {
138 pub(crate) fn new(bits: bool) -> Self {
139 BIT_RVS_SUM_R(crate::FieldReader::new(bits))
140 }
141}
142impl core::ops::Deref for BIT_RVS_SUM_R {
143 type Target = crate::FieldReader<bool, bool>;
144 #[inline(always)]
145 fn deref(&self) -> &Self::Target {
146 &self.0
147 }
148}
149#[doc = "Field `BIT_RVS_SUM` writer - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
150pub struct BIT_RVS_SUM_W<'a> {
151 w: &'a mut W,
152}
153impl<'a> BIT_RVS_SUM_W<'a> {
154 #[doc = r"Sets the field bit"]
155 #[inline(always)]
156 pub fn set_bit(self) -> &'a mut W {
157 self.bit(true)
158 }
159 #[doc = r"Clears the field bit"]
160 #[inline(always)]
161 pub fn clear_bit(self) -> &'a mut W {
162 self.bit(false)
163 }
164 #[doc = r"Writes raw bits to the field"]
165 #[inline(always)]
166 pub fn bit(self, value: bool) -> &'a mut W {
167 self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
168 self.w
169 }
170}
171#[doc = "Field `CMPL_SUM` reader - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
172pub struct CMPL_SUM_R(crate::FieldReader<bool, bool>);
173impl CMPL_SUM_R {
174 pub(crate) fn new(bits: bool) -> Self {
175 CMPL_SUM_R(crate::FieldReader::new(bits))
176 }
177}
178impl core::ops::Deref for CMPL_SUM_R {
179 type Target = crate::FieldReader<bool, bool>;
180 #[inline(always)]
181 fn deref(&self) -> &Self::Target {
182 &self.0
183 }
184}
185#[doc = "Field `CMPL_SUM` writer - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
186pub struct CMPL_SUM_W<'a> {
187 w: &'a mut W,
188}
189impl<'a> CMPL_SUM_W<'a> {
190 #[doc = r"Sets the field bit"]
191 #[inline(always)]
192 pub fn set_bit(self) -> &'a mut W {
193 self.bit(true)
194 }
195 #[doc = r"Clears the field bit"]
196 #[inline(always)]
197 pub fn clear_bit(self) -> &'a mut W {
198 self.bit(false)
199 }
200 #[doc = r"Writes raw bits to the field"]
201 #[inline(always)]
202 pub fn bit(self, value: bool) -> &'a mut W {
203 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
204 self.w
205 }
206}
207impl R {
208 #[doc = "Bits 0:1 - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
209 #[inline(always)]
210 pub fn crc_poly(&self) -> CRC_POLY_R {
211 CRC_POLY_R::new((self.bits & 0x03) as u8)
212 }
213 #[doc = "Bit 2 - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
214 #[inline(always)]
215 pub fn bit_rvs_wr(&self) -> BIT_RVS_WR_R {
216 BIT_RVS_WR_R::new(((self.bits >> 2) & 0x01) != 0)
217 }
218 #[doc = "Bit 3 - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
219 #[inline(always)]
220 pub fn cmpl_wr(&self) -> CMPL_WR_R {
221 CMPL_WR_R::new(((self.bits >> 3) & 0x01) != 0)
222 }
223 #[doc = "Bit 4 - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
224 #[inline(always)]
225 pub fn bit_rvs_sum(&self) -> BIT_RVS_SUM_R {
226 BIT_RVS_SUM_R::new(((self.bits >> 4) & 0x01) != 0)
227 }
228 #[doc = "Bit 5 - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
229 #[inline(always)]
230 pub fn cmpl_sum(&self) -> CMPL_SUM_R {
231 CMPL_SUM_R::new(((self.bits >> 5) & 0x01) != 0)
232 }
233}
234impl W {
235 #[doc = "Bits 0:1 - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
236 #[inline(always)]
237 pub fn crc_poly(&mut self) -> CRC_POLY_W {
238 CRC_POLY_W { w: self }
239 }
240 #[doc = "Bit 2 - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
241 #[inline(always)]
242 pub fn bit_rvs_wr(&mut self) -> BIT_RVS_WR_W {
243 BIT_RVS_WR_W { w: self }
244 }
245 #[doc = "Bit 3 - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
246 #[inline(always)]
247 pub fn cmpl_wr(&mut self) -> CMPL_WR_W {
248 CMPL_WR_W { w: self }
249 }
250 #[doc = "Bit 4 - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
251 #[inline(always)]
252 pub fn bit_rvs_sum(&mut self) -> BIT_RVS_SUM_W {
253 BIT_RVS_SUM_W { w: self }
254 }
255 #[doc = "Bit 5 - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
256 #[inline(always)]
257 pub fn cmpl_sum(&mut self) -> CMPL_SUM_W {
258 CMPL_SUM_W { w: self }
259 }
260 #[doc = "Writes raw bits to the register."]
261 #[inline(always)]
262 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
263 self.0.bits(bits);
264 self
265 }
266}
267#[doc = "CRC mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
268pub struct MODE_SPEC;
269impl crate::RegisterSpec for MODE_SPEC {
270 type Ux = u32;
271}
272#[doc = "`read()` method returns [mode::R](R) reader structure"]
273impl crate::Readable for MODE_SPEC {
274 type Reader = R;
275}
276#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
277impl crate::Writable for MODE_SPEC {
278 type Writer = W;
279}
280#[doc = "`reset()` method sets MODE to value 0"]
281impl crate::Resettable for MODE_SPEC {
282 #[inline(always)]
283 fn reset_value() -> Self::Ux {
284 0
285 }
286}