lpc82x_pac/spi0/
cfg.rs

1#[doc = "Register `CFG` reader"]
2pub struct R(crate::R<CFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CFG` writer"]
17pub struct W(crate::W<CFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "SPI enable.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum ENABLE_A {
40    #[doc = "0: Disabled. The SPI is disabled and the internal state machine and counters are reset."]
41    DISABLED = 0,
42    #[doc = "1: Enabled. The SPI is enabled for operation."]
43    ENABLED = 1,
44}
45impl From<ENABLE_A> for bool {
46    #[inline(always)]
47    fn from(variant: ENABLE_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `ENABLE` reader - SPI enable."]
52pub struct ENABLE_R(crate::FieldReader<bool, ENABLE_A>);
53impl ENABLE_R {
54    pub(crate) fn new(bits: bool) -> Self {
55        ENABLE_R(crate::FieldReader::new(bits))
56    }
57    #[doc = r"Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> ENABLE_A {
60        match self.bits {
61            false => ENABLE_A::DISABLED,
62            true => ENABLE_A::ENABLED,
63        }
64    }
65    #[doc = "Checks if the value of the field is `DISABLED`"]
66    #[inline(always)]
67    pub fn is_disabled(&self) -> bool {
68        **self == ENABLE_A::DISABLED
69    }
70    #[doc = "Checks if the value of the field is `ENABLED`"]
71    #[inline(always)]
72    pub fn is_enabled(&self) -> bool {
73        **self == ENABLE_A::ENABLED
74    }
75}
76impl core::ops::Deref for ENABLE_R {
77    type Target = crate::FieldReader<bool, ENABLE_A>;
78    #[inline(always)]
79    fn deref(&self) -> &Self::Target {
80        &self.0
81    }
82}
83#[doc = "Field `ENABLE` writer - SPI enable."]
84pub struct ENABLE_W<'a> {
85    w: &'a mut W,
86}
87impl<'a> ENABLE_W<'a> {
88    #[doc = r"Writes `variant` to the field"]
89    #[inline(always)]
90    pub fn variant(self, variant: ENABLE_A) -> &'a mut W {
91        self.bit(variant.into())
92    }
93    #[doc = "Disabled. The SPI is disabled and the internal state machine and counters are reset."]
94    #[inline(always)]
95    pub fn disabled(self) -> &'a mut W {
96        self.variant(ENABLE_A::DISABLED)
97    }
98    #[doc = "Enabled. The SPI is enabled for operation."]
99    #[inline(always)]
100    pub fn enabled(self) -> &'a mut W {
101        self.variant(ENABLE_A::ENABLED)
102    }
103    #[doc = r"Sets the field bit"]
104    #[inline(always)]
105    pub fn set_bit(self) -> &'a mut W {
106        self.bit(true)
107    }
108    #[doc = r"Clears the field bit"]
109    #[inline(always)]
110    pub fn clear_bit(self) -> &'a mut W {
111        self.bit(false)
112    }
113    #[doc = r"Writes raw bits to the field"]
114    #[inline(always)]
115    pub fn bit(self, value: bool) -> &'a mut W {
116        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
117        self.w
118    }
119}
120#[doc = "Master mode select.\n\nValue on reset: 0"]
121#[derive(Clone, Copy, Debug, PartialEq)]
122pub enum MASTER_A {
123    #[doc = "0: Slave mode. The SPI will operate in slave mode. SCK, MOSI, and the SSEL signals are inputs, MISO is an output."]
124    SLAVE_MODE = 0,
125    #[doc = "1: Master mode. The SPI will operate in master mode. SCK, MOSI, and the SSEL signals are outputs, MISO is an input."]
126    MASTER_MODE = 1,
127}
128impl From<MASTER_A> for bool {
129    #[inline(always)]
130    fn from(variant: MASTER_A) -> Self {
131        variant as u8 != 0
132    }
133}
134#[doc = "Field `MASTER` reader - Master mode select."]
135pub struct MASTER_R(crate::FieldReader<bool, MASTER_A>);
136impl MASTER_R {
137    pub(crate) fn new(bits: bool) -> Self {
138        MASTER_R(crate::FieldReader::new(bits))
139    }
140    #[doc = r"Get enumerated values variant"]
141    #[inline(always)]
142    pub fn variant(&self) -> MASTER_A {
143        match self.bits {
144            false => MASTER_A::SLAVE_MODE,
145            true => MASTER_A::MASTER_MODE,
146        }
147    }
148    #[doc = "Checks if the value of the field is `SLAVE_MODE`"]
149    #[inline(always)]
150    pub fn is_slave_mode(&self) -> bool {
151        **self == MASTER_A::SLAVE_MODE
152    }
153    #[doc = "Checks if the value of the field is `MASTER_MODE`"]
154    #[inline(always)]
155    pub fn is_master_mode(&self) -> bool {
156        **self == MASTER_A::MASTER_MODE
157    }
158}
159impl core::ops::Deref for MASTER_R {
160    type Target = crate::FieldReader<bool, MASTER_A>;
161    #[inline(always)]
162    fn deref(&self) -> &Self::Target {
163        &self.0
164    }
165}
166#[doc = "Field `MASTER` writer - Master mode select."]
167pub struct MASTER_W<'a> {
168    w: &'a mut W,
169}
170impl<'a> MASTER_W<'a> {
171    #[doc = r"Writes `variant` to the field"]
172    #[inline(always)]
173    pub fn variant(self, variant: MASTER_A) -> &'a mut W {
174        self.bit(variant.into())
175    }
176    #[doc = "Slave mode. The SPI will operate in slave mode. SCK, MOSI, and the SSEL signals are inputs, MISO is an output."]
177    #[inline(always)]
178    pub fn slave_mode(self) -> &'a mut W {
179        self.variant(MASTER_A::SLAVE_MODE)
180    }
181    #[doc = "Master mode. The SPI will operate in master mode. SCK, MOSI, and the SSEL signals are outputs, MISO is an input."]
182    #[inline(always)]
183    pub fn master_mode(self) -> &'a mut W {
184        self.variant(MASTER_A::MASTER_MODE)
185    }
186    #[doc = r"Sets the field bit"]
187    #[inline(always)]
188    pub fn set_bit(self) -> &'a mut W {
189        self.bit(true)
190    }
191    #[doc = r"Clears the field bit"]
192    #[inline(always)]
193    pub fn clear_bit(self) -> &'a mut W {
194        self.bit(false)
195    }
196    #[doc = r"Writes raw bits to the field"]
197    #[inline(always)]
198    pub fn bit(self, value: bool) -> &'a mut W {
199        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
200        self.w
201    }
202}
203#[doc = "LSB First mode enable.\n\nValue on reset: 0"]
204#[derive(Clone, Copy, Debug, PartialEq)]
205pub enum LSBF_A {
206    #[doc = "0: Standard. Data is transmitted and received in standard MSB first order."]
207    STANDARD = 0,
208    #[doc = "1: Reverse. Data is transmitted and received in reverse order (LSB first)."]
209    REVERSE = 1,
210}
211impl From<LSBF_A> for bool {
212    #[inline(always)]
213    fn from(variant: LSBF_A) -> Self {
214        variant as u8 != 0
215    }
216}
217#[doc = "Field `LSBF` reader - LSB First mode enable."]
218pub struct LSBF_R(crate::FieldReader<bool, LSBF_A>);
219impl LSBF_R {
220    pub(crate) fn new(bits: bool) -> Self {
221        LSBF_R(crate::FieldReader::new(bits))
222    }
223    #[doc = r"Get enumerated values variant"]
224    #[inline(always)]
225    pub fn variant(&self) -> LSBF_A {
226        match self.bits {
227            false => LSBF_A::STANDARD,
228            true => LSBF_A::REVERSE,
229        }
230    }
231    #[doc = "Checks if the value of the field is `STANDARD`"]
232    #[inline(always)]
233    pub fn is_standard(&self) -> bool {
234        **self == LSBF_A::STANDARD
235    }
236    #[doc = "Checks if the value of the field is `REVERSE`"]
237    #[inline(always)]
238    pub fn is_reverse(&self) -> bool {
239        **self == LSBF_A::REVERSE
240    }
241}
242impl core::ops::Deref for LSBF_R {
243    type Target = crate::FieldReader<bool, LSBF_A>;
244    #[inline(always)]
245    fn deref(&self) -> &Self::Target {
246        &self.0
247    }
248}
249#[doc = "Field `LSBF` writer - LSB First mode enable."]
250pub struct LSBF_W<'a> {
251    w: &'a mut W,
252}
253impl<'a> LSBF_W<'a> {
254    #[doc = r"Writes `variant` to the field"]
255    #[inline(always)]
256    pub fn variant(self, variant: LSBF_A) -> &'a mut W {
257        self.bit(variant.into())
258    }
259    #[doc = "Standard. Data is transmitted and received in standard MSB first order."]
260    #[inline(always)]
261    pub fn standard(self) -> &'a mut W {
262        self.variant(LSBF_A::STANDARD)
263    }
264    #[doc = "Reverse. Data is transmitted and received in reverse order (LSB first)."]
265    #[inline(always)]
266    pub fn reverse(self) -> &'a mut W {
267        self.variant(LSBF_A::REVERSE)
268    }
269    #[doc = r"Sets the field bit"]
270    #[inline(always)]
271    pub fn set_bit(self) -> &'a mut W {
272        self.bit(true)
273    }
274    #[doc = r"Clears the field bit"]
275    #[inline(always)]
276    pub fn clear_bit(self) -> &'a mut W {
277        self.bit(false)
278    }
279    #[doc = r"Writes raw bits to the field"]
280    #[inline(always)]
281    pub fn bit(self, value: bool) -> &'a mut W {
282        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
283        self.w
284    }
285}
286#[doc = "Clock Phase select.\n\nValue on reset: 0"]
287#[derive(Clone, Copy, Debug, PartialEq)]
288pub enum CPHA_A {
289    #[doc = "0: Change. The SPI captures serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is changed on the following edge."]
290    CHANGE = 0,
291    #[doc = "1: Capture. The SPI changes serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is captured on the following edge."]
292    CAPTURE = 1,
293}
294impl From<CPHA_A> for bool {
295    #[inline(always)]
296    fn from(variant: CPHA_A) -> Self {
297        variant as u8 != 0
298    }
299}
300#[doc = "Field `CPHA` reader - Clock Phase select."]
301pub struct CPHA_R(crate::FieldReader<bool, CPHA_A>);
302impl CPHA_R {
303    pub(crate) fn new(bits: bool) -> Self {
304        CPHA_R(crate::FieldReader::new(bits))
305    }
306    #[doc = r"Get enumerated values variant"]
307    #[inline(always)]
308    pub fn variant(&self) -> CPHA_A {
309        match self.bits {
310            false => CPHA_A::CHANGE,
311            true => CPHA_A::CAPTURE,
312        }
313    }
314    #[doc = "Checks if the value of the field is `CHANGE`"]
315    #[inline(always)]
316    pub fn is_change(&self) -> bool {
317        **self == CPHA_A::CHANGE
318    }
319    #[doc = "Checks if the value of the field is `CAPTURE`"]
320    #[inline(always)]
321    pub fn is_capture(&self) -> bool {
322        **self == CPHA_A::CAPTURE
323    }
324}
325impl core::ops::Deref for CPHA_R {
326    type Target = crate::FieldReader<bool, CPHA_A>;
327    #[inline(always)]
328    fn deref(&self) -> &Self::Target {
329        &self.0
330    }
331}
332#[doc = "Field `CPHA` writer - Clock Phase select."]
333pub struct CPHA_W<'a> {
334    w: &'a mut W,
335}
336impl<'a> CPHA_W<'a> {
337    #[doc = r"Writes `variant` to the field"]
338    #[inline(always)]
339    pub fn variant(self, variant: CPHA_A) -> &'a mut W {
340        self.bit(variant.into())
341    }
342    #[doc = "Change. The SPI captures serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is changed on the following edge."]
343    #[inline(always)]
344    pub fn change(self) -> &'a mut W {
345        self.variant(CPHA_A::CHANGE)
346    }
347    #[doc = "Capture. The SPI changes serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is captured on the following edge."]
348    #[inline(always)]
349    pub fn capture(self) -> &'a mut W {
350        self.variant(CPHA_A::CAPTURE)
351    }
352    #[doc = r"Sets the field bit"]
353    #[inline(always)]
354    pub fn set_bit(self) -> &'a mut W {
355        self.bit(true)
356    }
357    #[doc = r"Clears the field bit"]
358    #[inline(always)]
359    pub fn clear_bit(self) -> &'a mut W {
360        self.bit(false)
361    }
362    #[doc = r"Writes raw bits to the field"]
363    #[inline(always)]
364    pub fn bit(self, value: bool) -> &'a mut W {
365        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
366        self.w
367    }
368}
369#[doc = "Clock Polarity select.\n\nValue on reset: 0"]
370#[derive(Clone, Copy, Debug, PartialEq)]
371pub enum CPOL_A {
372    #[doc = "0: Low. The rest state of the clock (between transfers) is low."]
373    LOW = 0,
374    #[doc = "1: High. The rest state of the clock (between transfers) is high."]
375    HIGH = 1,
376}
377impl From<CPOL_A> for bool {
378    #[inline(always)]
379    fn from(variant: CPOL_A) -> Self {
380        variant as u8 != 0
381    }
382}
383#[doc = "Field `CPOL` reader - Clock Polarity select."]
384pub struct CPOL_R(crate::FieldReader<bool, CPOL_A>);
385impl CPOL_R {
386    pub(crate) fn new(bits: bool) -> Self {
387        CPOL_R(crate::FieldReader::new(bits))
388    }
389    #[doc = r"Get enumerated values variant"]
390    #[inline(always)]
391    pub fn variant(&self) -> CPOL_A {
392        match self.bits {
393            false => CPOL_A::LOW,
394            true => CPOL_A::HIGH,
395        }
396    }
397    #[doc = "Checks if the value of the field is `LOW`"]
398    #[inline(always)]
399    pub fn is_low(&self) -> bool {
400        **self == CPOL_A::LOW
401    }
402    #[doc = "Checks if the value of the field is `HIGH`"]
403    #[inline(always)]
404    pub fn is_high(&self) -> bool {
405        **self == CPOL_A::HIGH
406    }
407}
408impl core::ops::Deref for CPOL_R {
409    type Target = crate::FieldReader<bool, CPOL_A>;
410    #[inline(always)]
411    fn deref(&self) -> &Self::Target {
412        &self.0
413    }
414}
415#[doc = "Field `CPOL` writer - Clock Polarity select."]
416pub struct CPOL_W<'a> {
417    w: &'a mut W,
418}
419impl<'a> CPOL_W<'a> {
420    #[doc = r"Writes `variant` to the field"]
421    #[inline(always)]
422    pub fn variant(self, variant: CPOL_A) -> &'a mut W {
423        self.bit(variant.into())
424    }
425    #[doc = "Low. The rest state of the clock (between transfers) is low."]
426    #[inline(always)]
427    pub fn low(self) -> &'a mut W {
428        self.variant(CPOL_A::LOW)
429    }
430    #[doc = "High. The rest state of the clock (between transfers) is high."]
431    #[inline(always)]
432    pub fn high(self) -> &'a mut W {
433        self.variant(CPOL_A::HIGH)
434    }
435    #[doc = r"Sets the field bit"]
436    #[inline(always)]
437    pub fn set_bit(self) -> &'a mut W {
438        self.bit(true)
439    }
440    #[doc = r"Clears the field bit"]
441    #[inline(always)]
442    pub fn clear_bit(self) -> &'a mut W {
443        self.bit(false)
444    }
445    #[doc = r"Writes raw bits to the field"]
446    #[inline(always)]
447    pub fn bit(self, value: bool) -> &'a mut W {
448        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
449        self.w
450    }
451}
452#[doc = "Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing.\n\nValue on reset: 0"]
453#[derive(Clone, Copy, Debug, PartialEq)]
454pub enum LOOP_A {
455    #[doc = "0: Disabled."]
456    DISABLED = 0,
457    #[doc = "1: Enabled."]
458    ENABLED = 1,
459}
460impl From<LOOP_A> for bool {
461    #[inline(always)]
462    fn from(variant: LOOP_A) -> Self {
463        variant as u8 != 0
464    }
465}
466#[doc = "Field `LOOP` reader - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing."]
467pub struct LOOP_R(crate::FieldReader<bool, LOOP_A>);
468impl LOOP_R {
469    pub(crate) fn new(bits: bool) -> Self {
470        LOOP_R(crate::FieldReader::new(bits))
471    }
472    #[doc = r"Get enumerated values variant"]
473    #[inline(always)]
474    pub fn variant(&self) -> LOOP_A {
475        match self.bits {
476            false => LOOP_A::DISABLED,
477            true => LOOP_A::ENABLED,
478        }
479    }
480    #[doc = "Checks if the value of the field is `DISABLED`"]
481    #[inline(always)]
482    pub fn is_disabled(&self) -> bool {
483        **self == LOOP_A::DISABLED
484    }
485    #[doc = "Checks if the value of the field is `ENABLED`"]
486    #[inline(always)]
487    pub fn is_enabled(&self) -> bool {
488        **self == LOOP_A::ENABLED
489    }
490}
491impl core::ops::Deref for LOOP_R {
492    type Target = crate::FieldReader<bool, LOOP_A>;
493    #[inline(always)]
494    fn deref(&self) -> &Self::Target {
495        &self.0
496    }
497}
498#[doc = "Field `LOOP` writer - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing."]
499pub struct LOOP_W<'a> {
500    w: &'a mut W,
501}
502impl<'a> LOOP_W<'a> {
503    #[doc = r"Writes `variant` to the field"]
504    #[inline(always)]
505    pub fn variant(self, variant: LOOP_A) -> &'a mut W {
506        self.bit(variant.into())
507    }
508    #[doc = "Disabled."]
509    #[inline(always)]
510    pub fn disabled(self) -> &'a mut W {
511        self.variant(LOOP_A::DISABLED)
512    }
513    #[doc = "Enabled."]
514    #[inline(always)]
515    pub fn enabled(self) -> &'a mut W {
516        self.variant(LOOP_A::ENABLED)
517    }
518    #[doc = r"Sets the field bit"]
519    #[inline(always)]
520    pub fn set_bit(self) -> &'a mut W {
521        self.bit(true)
522    }
523    #[doc = r"Clears the field bit"]
524    #[inline(always)]
525    pub fn clear_bit(self) -> &'a mut W {
526        self.bit(false)
527    }
528    #[doc = r"Writes raw bits to the field"]
529    #[inline(always)]
530    pub fn bit(self, value: bool) -> &'a mut W {
531        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
532        self.w
533    }
534}
535#[doc = "SSEL0 Polarity select.\n\nValue on reset: 0"]
536#[derive(Clone, Copy, Debug, PartialEq)]
537pub enum SPOL0_A {
538    #[doc = "0: Low. The SSEL0 pin is active low."]
539    LOW = 0,
540    #[doc = "1: High. The SSEL0 pin is active high."]
541    HIGH = 1,
542}
543impl From<SPOL0_A> for bool {
544    #[inline(always)]
545    fn from(variant: SPOL0_A) -> Self {
546        variant as u8 != 0
547    }
548}
549#[doc = "Field `SPOL0` reader - SSEL0 Polarity select."]
550pub struct SPOL0_R(crate::FieldReader<bool, SPOL0_A>);
551impl SPOL0_R {
552    pub(crate) fn new(bits: bool) -> Self {
553        SPOL0_R(crate::FieldReader::new(bits))
554    }
555    #[doc = r"Get enumerated values variant"]
556    #[inline(always)]
557    pub fn variant(&self) -> SPOL0_A {
558        match self.bits {
559            false => SPOL0_A::LOW,
560            true => SPOL0_A::HIGH,
561        }
562    }
563    #[doc = "Checks if the value of the field is `LOW`"]
564    #[inline(always)]
565    pub fn is_low(&self) -> bool {
566        **self == SPOL0_A::LOW
567    }
568    #[doc = "Checks if the value of the field is `HIGH`"]
569    #[inline(always)]
570    pub fn is_high(&self) -> bool {
571        **self == SPOL0_A::HIGH
572    }
573}
574impl core::ops::Deref for SPOL0_R {
575    type Target = crate::FieldReader<bool, SPOL0_A>;
576    #[inline(always)]
577    fn deref(&self) -> &Self::Target {
578        &self.0
579    }
580}
581#[doc = "Field `SPOL0` writer - SSEL0 Polarity select."]
582pub struct SPOL0_W<'a> {
583    w: &'a mut W,
584}
585impl<'a> SPOL0_W<'a> {
586    #[doc = r"Writes `variant` to the field"]
587    #[inline(always)]
588    pub fn variant(self, variant: SPOL0_A) -> &'a mut W {
589        self.bit(variant.into())
590    }
591    #[doc = "Low. The SSEL0 pin is active low."]
592    #[inline(always)]
593    pub fn low(self) -> &'a mut W {
594        self.variant(SPOL0_A::LOW)
595    }
596    #[doc = "High. The SSEL0 pin is active high."]
597    #[inline(always)]
598    pub fn high(self) -> &'a mut W {
599        self.variant(SPOL0_A::HIGH)
600    }
601    #[doc = r"Sets the field bit"]
602    #[inline(always)]
603    pub fn set_bit(self) -> &'a mut W {
604        self.bit(true)
605    }
606    #[doc = r"Clears the field bit"]
607    #[inline(always)]
608    pub fn clear_bit(self) -> &'a mut W {
609        self.bit(false)
610    }
611    #[doc = r"Writes raw bits to the field"]
612    #[inline(always)]
613    pub fn bit(self, value: bool) -> &'a mut W {
614        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
615        self.w
616    }
617}
618#[doc = "SSEL1 Polarity select.\n\nValue on reset: 0"]
619#[derive(Clone, Copy, Debug, PartialEq)]
620pub enum SPOL1_A {
621    #[doc = "0: Low. The SSEL1 pin is active low."]
622    LOW = 0,
623    #[doc = "1: High. The SSEL1 pin is active high."]
624    HIGH = 1,
625}
626impl From<SPOL1_A> for bool {
627    #[inline(always)]
628    fn from(variant: SPOL1_A) -> Self {
629        variant as u8 != 0
630    }
631}
632#[doc = "Field `SPOL1` reader - SSEL1 Polarity select."]
633pub struct SPOL1_R(crate::FieldReader<bool, SPOL1_A>);
634impl SPOL1_R {
635    pub(crate) fn new(bits: bool) -> Self {
636        SPOL1_R(crate::FieldReader::new(bits))
637    }
638    #[doc = r"Get enumerated values variant"]
639    #[inline(always)]
640    pub fn variant(&self) -> SPOL1_A {
641        match self.bits {
642            false => SPOL1_A::LOW,
643            true => SPOL1_A::HIGH,
644        }
645    }
646    #[doc = "Checks if the value of the field is `LOW`"]
647    #[inline(always)]
648    pub fn is_low(&self) -> bool {
649        **self == SPOL1_A::LOW
650    }
651    #[doc = "Checks if the value of the field is `HIGH`"]
652    #[inline(always)]
653    pub fn is_high(&self) -> bool {
654        **self == SPOL1_A::HIGH
655    }
656}
657impl core::ops::Deref for SPOL1_R {
658    type Target = crate::FieldReader<bool, SPOL1_A>;
659    #[inline(always)]
660    fn deref(&self) -> &Self::Target {
661        &self.0
662    }
663}
664#[doc = "Field `SPOL1` writer - SSEL1 Polarity select."]
665pub struct SPOL1_W<'a> {
666    w: &'a mut W,
667}
668impl<'a> SPOL1_W<'a> {
669    #[doc = r"Writes `variant` to the field"]
670    #[inline(always)]
671    pub fn variant(self, variant: SPOL1_A) -> &'a mut W {
672        self.bit(variant.into())
673    }
674    #[doc = "Low. The SSEL1 pin is active low."]
675    #[inline(always)]
676    pub fn low(self) -> &'a mut W {
677        self.variant(SPOL1_A::LOW)
678    }
679    #[doc = "High. The SSEL1 pin is active high."]
680    #[inline(always)]
681    pub fn high(self) -> &'a mut W {
682        self.variant(SPOL1_A::HIGH)
683    }
684    #[doc = r"Sets the field bit"]
685    #[inline(always)]
686    pub fn set_bit(self) -> &'a mut W {
687        self.bit(true)
688    }
689    #[doc = r"Clears the field bit"]
690    #[inline(always)]
691    pub fn clear_bit(self) -> &'a mut W {
692        self.bit(false)
693    }
694    #[doc = r"Writes raw bits to the field"]
695    #[inline(always)]
696    pub fn bit(self, value: bool) -> &'a mut W {
697        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
698        self.w
699    }
700}
701#[doc = "SSEL2 Polarity select.\n\nValue on reset: 0"]
702#[derive(Clone, Copy, Debug, PartialEq)]
703pub enum SPOL2_A {
704    #[doc = "0: Low. The SSEL2 pin is active low."]
705    LOW = 0,
706    #[doc = "1: High. The SSEL2 pin is active high."]
707    HIGH = 1,
708}
709impl From<SPOL2_A> for bool {
710    #[inline(always)]
711    fn from(variant: SPOL2_A) -> Self {
712        variant as u8 != 0
713    }
714}
715#[doc = "Field `SPOL2` reader - SSEL2 Polarity select."]
716pub struct SPOL2_R(crate::FieldReader<bool, SPOL2_A>);
717impl SPOL2_R {
718    pub(crate) fn new(bits: bool) -> Self {
719        SPOL2_R(crate::FieldReader::new(bits))
720    }
721    #[doc = r"Get enumerated values variant"]
722    #[inline(always)]
723    pub fn variant(&self) -> SPOL2_A {
724        match self.bits {
725            false => SPOL2_A::LOW,
726            true => SPOL2_A::HIGH,
727        }
728    }
729    #[doc = "Checks if the value of the field is `LOW`"]
730    #[inline(always)]
731    pub fn is_low(&self) -> bool {
732        **self == SPOL2_A::LOW
733    }
734    #[doc = "Checks if the value of the field is `HIGH`"]
735    #[inline(always)]
736    pub fn is_high(&self) -> bool {
737        **self == SPOL2_A::HIGH
738    }
739}
740impl core::ops::Deref for SPOL2_R {
741    type Target = crate::FieldReader<bool, SPOL2_A>;
742    #[inline(always)]
743    fn deref(&self) -> &Self::Target {
744        &self.0
745    }
746}
747#[doc = "Field `SPOL2` writer - SSEL2 Polarity select."]
748pub struct SPOL2_W<'a> {
749    w: &'a mut W,
750}
751impl<'a> SPOL2_W<'a> {
752    #[doc = r"Writes `variant` to the field"]
753    #[inline(always)]
754    pub fn variant(self, variant: SPOL2_A) -> &'a mut W {
755        self.bit(variant.into())
756    }
757    #[doc = "Low. The SSEL2 pin is active low."]
758    #[inline(always)]
759    pub fn low(self) -> &'a mut W {
760        self.variant(SPOL2_A::LOW)
761    }
762    #[doc = "High. The SSEL2 pin is active high."]
763    #[inline(always)]
764    pub fn high(self) -> &'a mut W {
765        self.variant(SPOL2_A::HIGH)
766    }
767    #[doc = r"Sets the field bit"]
768    #[inline(always)]
769    pub fn set_bit(self) -> &'a mut W {
770        self.bit(true)
771    }
772    #[doc = r"Clears the field bit"]
773    #[inline(always)]
774    pub fn clear_bit(self) -> &'a mut W {
775        self.bit(false)
776    }
777    #[doc = r"Writes raw bits to the field"]
778    #[inline(always)]
779    pub fn bit(self, value: bool) -> &'a mut W {
780        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
781        self.w
782    }
783}
784#[doc = "SSEL3 Polarity select.\n\nValue on reset: 0"]
785#[derive(Clone, Copy, Debug, PartialEq)]
786pub enum SPOL3_A {
787    #[doc = "0: Low. The SSEL3 pin is active low."]
788    LOW = 0,
789    #[doc = "1: High. The SSEL3 pin is active high."]
790    HIGH = 1,
791}
792impl From<SPOL3_A> for bool {
793    #[inline(always)]
794    fn from(variant: SPOL3_A) -> Self {
795        variant as u8 != 0
796    }
797}
798#[doc = "Field `SPOL3` reader - SSEL3 Polarity select."]
799pub struct SPOL3_R(crate::FieldReader<bool, SPOL3_A>);
800impl SPOL3_R {
801    pub(crate) fn new(bits: bool) -> Self {
802        SPOL3_R(crate::FieldReader::new(bits))
803    }
804    #[doc = r"Get enumerated values variant"]
805    #[inline(always)]
806    pub fn variant(&self) -> SPOL3_A {
807        match self.bits {
808            false => SPOL3_A::LOW,
809            true => SPOL3_A::HIGH,
810        }
811    }
812    #[doc = "Checks if the value of the field is `LOW`"]
813    #[inline(always)]
814    pub fn is_low(&self) -> bool {
815        **self == SPOL3_A::LOW
816    }
817    #[doc = "Checks if the value of the field is `HIGH`"]
818    #[inline(always)]
819    pub fn is_high(&self) -> bool {
820        **self == SPOL3_A::HIGH
821    }
822}
823impl core::ops::Deref for SPOL3_R {
824    type Target = crate::FieldReader<bool, SPOL3_A>;
825    #[inline(always)]
826    fn deref(&self) -> &Self::Target {
827        &self.0
828    }
829}
830#[doc = "Field `SPOL3` writer - SSEL3 Polarity select."]
831pub struct SPOL3_W<'a> {
832    w: &'a mut W,
833}
834impl<'a> SPOL3_W<'a> {
835    #[doc = r"Writes `variant` to the field"]
836    #[inline(always)]
837    pub fn variant(self, variant: SPOL3_A) -> &'a mut W {
838        self.bit(variant.into())
839    }
840    #[doc = "Low. The SSEL3 pin is active low."]
841    #[inline(always)]
842    pub fn low(self) -> &'a mut W {
843        self.variant(SPOL3_A::LOW)
844    }
845    #[doc = "High. The SSEL3 pin is active high."]
846    #[inline(always)]
847    pub fn high(self) -> &'a mut W {
848        self.variant(SPOL3_A::HIGH)
849    }
850    #[doc = r"Sets the field bit"]
851    #[inline(always)]
852    pub fn set_bit(self) -> &'a mut W {
853        self.bit(true)
854    }
855    #[doc = r"Clears the field bit"]
856    #[inline(always)]
857    pub fn clear_bit(self) -> &'a mut W {
858        self.bit(false)
859    }
860    #[doc = r"Writes raw bits to the field"]
861    #[inline(always)]
862    pub fn bit(self, value: bool) -> &'a mut W {
863        self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
864        self.w
865    }
866}
867impl R {
868    #[doc = "Bit 0 - SPI enable."]
869    #[inline(always)]
870    pub fn enable(&self) -> ENABLE_R {
871        ENABLE_R::new((self.bits & 0x01) != 0)
872    }
873    #[doc = "Bit 2 - Master mode select."]
874    #[inline(always)]
875    pub fn master(&self) -> MASTER_R {
876        MASTER_R::new(((self.bits >> 2) & 0x01) != 0)
877    }
878    #[doc = "Bit 3 - LSB First mode enable."]
879    #[inline(always)]
880    pub fn lsbf(&self) -> LSBF_R {
881        LSBF_R::new(((self.bits >> 3) & 0x01) != 0)
882    }
883    #[doc = "Bit 4 - Clock Phase select."]
884    #[inline(always)]
885    pub fn cpha(&self) -> CPHA_R {
886        CPHA_R::new(((self.bits >> 4) & 0x01) != 0)
887    }
888    #[doc = "Bit 5 - Clock Polarity select."]
889    #[inline(always)]
890    pub fn cpol(&self) -> CPOL_R {
891        CPOL_R::new(((self.bits >> 5) & 0x01) != 0)
892    }
893    #[doc = "Bit 7 - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing."]
894    #[inline(always)]
895    pub fn loop_(&self) -> LOOP_R {
896        LOOP_R::new(((self.bits >> 7) & 0x01) != 0)
897    }
898    #[doc = "Bit 8 - SSEL0 Polarity select."]
899    #[inline(always)]
900    pub fn spol0(&self) -> SPOL0_R {
901        SPOL0_R::new(((self.bits >> 8) & 0x01) != 0)
902    }
903    #[doc = "Bit 9 - SSEL1 Polarity select."]
904    #[inline(always)]
905    pub fn spol1(&self) -> SPOL1_R {
906        SPOL1_R::new(((self.bits >> 9) & 0x01) != 0)
907    }
908    #[doc = "Bit 10 - SSEL2 Polarity select."]
909    #[inline(always)]
910    pub fn spol2(&self) -> SPOL2_R {
911        SPOL2_R::new(((self.bits >> 10) & 0x01) != 0)
912    }
913    #[doc = "Bit 11 - SSEL3 Polarity select."]
914    #[inline(always)]
915    pub fn spol3(&self) -> SPOL3_R {
916        SPOL3_R::new(((self.bits >> 11) & 0x01) != 0)
917    }
918}
919impl W {
920    #[doc = "Bit 0 - SPI enable."]
921    #[inline(always)]
922    pub fn enable(&mut self) -> ENABLE_W {
923        ENABLE_W { w: self }
924    }
925    #[doc = "Bit 2 - Master mode select."]
926    #[inline(always)]
927    pub fn master(&mut self) -> MASTER_W {
928        MASTER_W { w: self }
929    }
930    #[doc = "Bit 3 - LSB First mode enable."]
931    #[inline(always)]
932    pub fn lsbf(&mut self) -> LSBF_W {
933        LSBF_W { w: self }
934    }
935    #[doc = "Bit 4 - Clock Phase select."]
936    #[inline(always)]
937    pub fn cpha(&mut self) -> CPHA_W {
938        CPHA_W { w: self }
939    }
940    #[doc = "Bit 5 - Clock Polarity select."]
941    #[inline(always)]
942    pub fn cpol(&mut self) -> CPOL_W {
943        CPOL_W { w: self }
944    }
945    #[doc = "Bit 7 - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing."]
946    #[inline(always)]
947    pub fn loop_(&mut self) -> LOOP_W {
948        LOOP_W { w: self }
949    }
950    #[doc = "Bit 8 - SSEL0 Polarity select."]
951    #[inline(always)]
952    pub fn spol0(&mut self) -> SPOL0_W {
953        SPOL0_W { w: self }
954    }
955    #[doc = "Bit 9 - SSEL1 Polarity select."]
956    #[inline(always)]
957    pub fn spol1(&mut self) -> SPOL1_W {
958        SPOL1_W { w: self }
959    }
960    #[doc = "Bit 10 - SSEL2 Polarity select."]
961    #[inline(always)]
962    pub fn spol2(&mut self) -> SPOL2_W {
963        SPOL2_W { w: self }
964    }
965    #[doc = "Bit 11 - SSEL3 Polarity select."]
966    #[inline(always)]
967    pub fn spol3(&mut self) -> SPOL3_W {
968        SPOL3_W { w: self }
969    }
970    #[doc = "Writes raw bits to the register."]
971    #[inline(always)]
972    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
973        self.0.bits(bits);
974        self
975    }
976}
977#[doc = "SPI Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
978pub struct CFG_SPEC;
979impl crate::RegisterSpec for CFG_SPEC {
980    type Ux = u32;
981}
982#[doc = "`read()` method returns [cfg::R](R) reader structure"]
983impl crate::Readable for CFG_SPEC {
984    type Reader = R;
985}
986#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"]
987impl crate::Writable for CFG_SPEC {
988    type Writer = W;
989}
990#[doc = "`reset()` method sets CFG to value 0"]
991impl crate::Resettable for CFG_SPEC {
992    #[inline(always)]
993    fn reset_value() -> Self::Ux {
994        0
995    }
996}
lpc82x_pac/spi0/cfg.rs

lpc82x_pac/spi0/
cfg.rs
