1#[doc = "Register `MOD` reader"]
2pub struct R(crate::R<MOD_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<MOD_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<MOD_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<MOD_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `MOD` writer"]
17pub struct W(crate::W<MOD_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<MOD_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<MOD_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<MOD_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum WDEN_A {
40 #[doc = "0: Stop. The watchdog timer is stopped."]
41 STOP = 0,
42 #[doc = "1: Run. The watchdog timer is running."]
43 RUN = 1,
44}
45impl From<WDEN_A> for bool {
46 #[inline(always)]
47 fn from(variant: WDEN_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `WDEN` reader - Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently."]
52pub struct WDEN_R(crate::FieldReader<bool, WDEN_A>);
53impl WDEN_R {
54 pub(crate) fn new(bits: bool) -> Self {
55 WDEN_R(crate::FieldReader::new(bits))
56 }
57 #[doc = r"Get enumerated values variant"]
58 #[inline(always)]
59 pub fn variant(&self) -> WDEN_A {
60 match self.bits {
61 false => WDEN_A::STOP,
62 true => WDEN_A::RUN,
63 }
64 }
65 #[doc = "Checks if the value of the field is `STOP`"]
66 #[inline(always)]
67 pub fn is_stop(&self) -> bool {
68 **self == WDEN_A::STOP
69 }
70 #[doc = "Checks if the value of the field is `RUN`"]
71 #[inline(always)]
72 pub fn is_run(&self) -> bool {
73 **self == WDEN_A::RUN
74 }
75}
76impl core::ops::Deref for WDEN_R {
77 type Target = crate::FieldReader<bool, WDEN_A>;
78 #[inline(always)]
79 fn deref(&self) -> &Self::Target {
80 &self.0
81 }
82}
83#[doc = "Field `WDEN` writer - Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently."]
84pub struct WDEN_W<'a> {
85 w: &'a mut W,
86}
87impl<'a> WDEN_W<'a> {
88 #[doc = r"Writes `variant` to the field"]
89 #[inline(always)]
90 pub fn variant(self, variant: WDEN_A) -> &'a mut W {
91 self.bit(variant.into())
92 }
93 #[doc = "Stop. The watchdog timer is stopped."]
94 #[inline(always)]
95 pub fn stop(self) -> &'a mut W {
96 self.variant(WDEN_A::STOP)
97 }
98 #[doc = "Run. The watchdog timer is running."]
99 #[inline(always)]
100 pub fn run(self) -> &'a mut W {
101 self.variant(WDEN_A::RUN)
102 }
103 #[doc = r"Sets the field bit"]
104 #[inline(always)]
105 pub fn set_bit(self) -> &'a mut W {
106 self.bit(true)
107 }
108 #[doc = r"Clears the field bit"]
109 #[inline(always)]
110 pub fn clear_bit(self) -> &'a mut W {
111 self.bit(false)
112 }
113 #[doc = r"Writes raw bits to the field"]
114 #[inline(always)]
115 pub fn bit(self, value: bool) -> &'a mut W {
116 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
117 self.w
118 }
119}
120#[doc = "Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0.\n\nValue on reset: 0"]
121#[derive(Clone, Copy, Debug, PartialEq)]
122pub enum WDRESET_A {
123 #[doc = "0: Interrupt. A watchdog time-out will not cause a chip reset."]
124 INTERRUPT = 0,
125 #[doc = "1: Reset. A watchdog time-out will cause a chip reset."]
126 RESET = 1,
127}
128impl From<WDRESET_A> for bool {
129 #[inline(always)]
130 fn from(variant: WDRESET_A) -> Self {
131 variant as u8 != 0
132 }
133}
134#[doc = "Field `WDRESET` reader - Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0."]
135pub struct WDRESET_R(crate::FieldReader<bool, WDRESET_A>);
136impl WDRESET_R {
137 pub(crate) fn new(bits: bool) -> Self {
138 WDRESET_R(crate::FieldReader::new(bits))
139 }
140 #[doc = r"Get enumerated values variant"]
141 #[inline(always)]
142 pub fn variant(&self) -> WDRESET_A {
143 match self.bits {
144 false => WDRESET_A::INTERRUPT,
145 true => WDRESET_A::RESET,
146 }
147 }
148 #[doc = "Checks if the value of the field is `INTERRUPT`"]
149 #[inline(always)]
150 pub fn is_interrupt(&self) -> bool {
151 **self == WDRESET_A::INTERRUPT
152 }
153 #[doc = "Checks if the value of the field is `RESET`"]
154 #[inline(always)]
155 pub fn is_reset(&self) -> bool {
156 **self == WDRESET_A::RESET
157 }
158}
159impl core::ops::Deref for WDRESET_R {
160 type Target = crate::FieldReader<bool, WDRESET_A>;
161 #[inline(always)]
162 fn deref(&self) -> &Self::Target {
163 &self.0
164 }
165}
166#[doc = "Field `WDRESET` writer - Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0."]
167pub struct WDRESET_W<'a> {
168 w: &'a mut W,
169}
170impl<'a> WDRESET_W<'a> {
171 #[doc = r"Writes `variant` to the field"]
172 #[inline(always)]
173 pub fn variant(self, variant: WDRESET_A) -> &'a mut W {
174 self.bit(variant.into())
175 }
176 #[doc = "Interrupt. A watchdog time-out will not cause a chip reset."]
177 #[inline(always)]
178 pub fn interrupt(self) -> &'a mut W {
179 self.variant(WDRESET_A::INTERRUPT)
180 }
181 #[doc = "Reset. A watchdog time-out will cause a chip reset."]
182 #[inline(always)]
183 pub fn reset(self) -> &'a mut W {
184 self.variant(WDRESET_A::RESET)
185 }
186 #[doc = r"Sets the field bit"]
187 #[inline(always)]
188 pub fn set_bit(self) -> &'a mut W {
189 self.bit(true)
190 }
191 #[doc = r"Clears the field bit"]
192 #[inline(always)]
193 pub fn clear_bit(self) -> &'a mut W {
194 self.bit(false)
195 }
196 #[doc = r"Writes raw bits to the field"]
197 #[inline(always)]
198 pub fn bit(self, value: bool) -> &'a mut W {
199 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
200 self.w
201 }
202}
203#[doc = "Field `WDTOF` reader - Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1."]
204pub struct WDTOF_R(crate::FieldReader<bool, bool>);
205impl WDTOF_R {
206 pub(crate) fn new(bits: bool) -> Self {
207 WDTOF_R(crate::FieldReader::new(bits))
208 }
209}
210impl core::ops::Deref for WDTOF_R {
211 type Target = crate::FieldReader<bool, bool>;
212 #[inline(always)]
213 fn deref(&self) -> &Self::Target {
214 &self.0
215 }
216}
217#[doc = "Field `WDTOF` writer - Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1."]
218pub struct WDTOF_W<'a> {
219 w: &'a mut W,
220}
221impl<'a> WDTOF_W<'a> {
222 #[doc = r"Sets the field bit"]
223 #[inline(always)]
224 pub fn set_bit(self) -> &'a mut W {
225 self.bit(true)
226 }
227 #[doc = r"Clears the field bit"]
228 #[inline(always)]
229 pub fn clear_bit(self) -> &'a mut W {
230 self.bit(false)
231 }
232 #[doc = r"Writes raw bits to the field"]
233 #[inline(always)]
234 pub fn bit(self, value: bool) -> &'a mut W {
235 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
236 self.w
237 }
238}
239#[doc = "Field `WDINT` reader - Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0."]
240pub struct WDINT_R(crate::FieldReader<bool, bool>);
241impl WDINT_R {
242 pub(crate) fn new(bits: bool) -> Self {
243 WDINT_R(crate::FieldReader::new(bits))
244 }
245}
246impl core::ops::Deref for WDINT_R {
247 type Target = crate::FieldReader<bool, bool>;
248 #[inline(always)]
249 fn deref(&self) -> &Self::Target {
250 &self.0
251 }
252}
253#[doc = "Field `WDINT` writer - Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0."]
254pub struct WDINT_W<'a> {
255 w: &'a mut W,
256}
257impl<'a> WDINT_W<'a> {
258 #[doc = r"Sets the field bit"]
259 #[inline(always)]
260 pub fn set_bit(self) -> &'a mut W {
261 self.bit(true)
262 }
263 #[doc = r"Clears the field bit"]
264 #[inline(always)]
265 pub fn clear_bit(self) -> &'a mut W {
266 self.bit(false)
267 }
268 #[doc = r"Writes raw bits to the field"]
269 #[inline(always)]
270 pub fn bit(self, value: bool) -> &'a mut W {
271 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
272 self.w
273 }
274}
275#[doc = "Watchdog update mode. This bit can be set once by software and is only cleared by a reset.\n\nValue on reset: 0"]
276#[derive(Clone, Copy, Debug, PartialEq)]
277pub enum WDPROTECT_A {
278 #[doc = "0: Flexible. The watchdog time-out value (TC) can be changed at any time."]
279 FLEXIBLE = 0,
280 #[doc = "1: Threshold. The watchdog time-out value (TC) can be changed only after the counter is below the value of WDWARNINT and WDWINDOW."]
281 THRESHOLD = 1,
282}
283impl From<WDPROTECT_A> for bool {
284 #[inline(always)]
285 fn from(variant: WDPROTECT_A) -> Self {
286 variant as u8 != 0
287 }
288}
289#[doc = "Field `WDPROTECT` reader - Watchdog update mode. This bit can be set once by software and is only cleared by a reset."]
290pub struct WDPROTECT_R(crate::FieldReader<bool, WDPROTECT_A>);
291impl WDPROTECT_R {
292 pub(crate) fn new(bits: bool) -> Self {
293 WDPROTECT_R(crate::FieldReader::new(bits))
294 }
295 #[doc = r"Get enumerated values variant"]
296 #[inline(always)]
297 pub fn variant(&self) -> WDPROTECT_A {
298 match self.bits {
299 false => WDPROTECT_A::FLEXIBLE,
300 true => WDPROTECT_A::THRESHOLD,
301 }
302 }
303 #[doc = "Checks if the value of the field is `FLEXIBLE`"]
304 #[inline(always)]
305 pub fn is_flexible(&self) -> bool {
306 **self == WDPROTECT_A::FLEXIBLE
307 }
308 #[doc = "Checks if the value of the field is `THRESHOLD`"]
309 #[inline(always)]
310 pub fn is_threshold(&self) -> bool {
311 **self == WDPROTECT_A::THRESHOLD
312 }
313}
314impl core::ops::Deref for WDPROTECT_R {
315 type Target = crate::FieldReader<bool, WDPROTECT_A>;
316 #[inline(always)]
317 fn deref(&self) -> &Self::Target {
318 &self.0
319 }
320}
321#[doc = "Field `WDPROTECT` writer - Watchdog update mode. This bit can be set once by software and is only cleared by a reset."]
322pub struct WDPROTECT_W<'a> {
323 w: &'a mut W,
324}
325impl<'a> WDPROTECT_W<'a> {
326 #[doc = r"Writes `variant` to the field"]
327 #[inline(always)]
328 pub fn variant(self, variant: WDPROTECT_A) -> &'a mut W {
329 self.bit(variant.into())
330 }
331 #[doc = "Flexible. The watchdog time-out value (TC) can be changed at any time."]
332 #[inline(always)]
333 pub fn flexible(self) -> &'a mut W {
334 self.variant(WDPROTECT_A::FLEXIBLE)
335 }
336 #[doc = "Threshold. The watchdog time-out value (TC) can be changed only after the counter is below the value of WDWARNINT and WDWINDOW."]
337 #[inline(always)]
338 pub fn threshold(self) -> &'a mut W {
339 self.variant(WDPROTECT_A::THRESHOLD)
340 }
341 #[doc = r"Sets the field bit"]
342 #[inline(always)]
343 pub fn set_bit(self) -> &'a mut W {
344 self.bit(true)
345 }
346 #[doc = r"Clears the field bit"]
347 #[inline(always)]
348 pub fn clear_bit(self) -> &'a mut W {
349 self.bit(false)
350 }
351 #[doc = r"Writes raw bits to the field"]
352 #[inline(always)]
353 pub fn bit(self, value: bool) -> &'a mut W {
354 self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
355 self.w
356 }
357}
358#[doc = "Field `LOCK` reader - Once this bit is set to one and a watchdog feed is performed, disabling or powering down the watchdog oscillator is prevented by hardware. This bit can be set once by software and is only cleared by any reset."]
359pub struct LOCK_R(crate::FieldReader<bool, bool>);
360impl LOCK_R {
361 pub(crate) fn new(bits: bool) -> Self {
362 LOCK_R(crate::FieldReader::new(bits))
363 }
364}
365impl core::ops::Deref for LOCK_R {
366 type Target = crate::FieldReader<bool, bool>;
367 #[inline(always)]
368 fn deref(&self) -> &Self::Target {
369 &self.0
370 }
371}
372#[doc = "Field `LOCK` writer - Once this bit is set to one and a watchdog feed is performed, disabling or powering down the watchdog oscillator is prevented by hardware. This bit can be set once by software and is only cleared by any reset."]
373pub struct LOCK_W<'a> {
374 w: &'a mut W,
375}
376impl<'a> LOCK_W<'a> {
377 #[doc = r"Sets the field bit"]
378 #[inline(always)]
379 pub fn set_bit(self) -> &'a mut W {
380 self.bit(true)
381 }
382 #[doc = r"Clears the field bit"]
383 #[inline(always)]
384 pub fn clear_bit(self) -> &'a mut W {
385 self.bit(false)
386 }
387 #[doc = r"Writes raw bits to the field"]
388 #[inline(always)]
389 pub fn bit(self, value: bool) -> &'a mut W {
390 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
391 self.w
392 }
393}
394impl R {
395 #[doc = "Bit 0 - Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently."]
396 #[inline(always)]
397 pub fn wden(&self) -> WDEN_R {
398 WDEN_R::new((self.bits & 0x01) != 0)
399 }
400 #[doc = "Bit 1 - Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0."]
401 #[inline(always)]
402 pub fn wdreset(&self) -> WDRESET_R {
403 WDRESET_R::new(((self.bits >> 1) & 0x01) != 0)
404 }
405 #[doc = "Bit 2 - Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1."]
406 #[inline(always)]
407 pub fn wdtof(&self) -> WDTOF_R {
408 WDTOF_R::new(((self.bits >> 2) & 0x01) != 0)
409 }
410 #[doc = "Bit 3 - Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0."]
411 #[inline(always)]
412 pub fn wdint(&self) -> WDINT_R {
413 WDINT_R::new(((self.bits >> 3) & 0x01) != 0)
414 }
415 #[doc = "Bit 4 - Watchdog update mode. This bit can be set once by software and is only cleared by a reset."]
416 #[inline(always)]
417 pub fn wdprotect(&self) -> WDPROTECT_R {
418 WDPROTECT_R::new(((self.bits >> 4) & 0x01) != 0)
419 }
420 #[doc = "Bit 5 - Once this bit is set to one and a watchdog feed is performed, disabling or powering down the watchdog oscillator is prevented by hardware. This bit can be set once by software and is only cleared by any reset."]
421 #[inline(always)]
422 pub fn lock(&self) -> LOCK_R {
423 LOCK_R::new(((self.bits >> 5) & 0x01) != 0)
424 }
425}
426impl W {
427 #[doc = "Bit 0 - Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently."]
428 #[inline(always)]
429 pub fn wden(&mut self) -> WDEN_W {
430 WDEN_W { w: self }
431 }
432 #[doc = "Bit 1 - Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0."]
433 #[inline(always)]
434 pub fn wdreset(&mut self) -> WDRESET_W {
435 WDRESET_W { w: self }
436 }
437 #[doc = "Bit 2 - Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1."]
438 #[inline(always)]
439 pub fn wdtof(&mut self) -> WDTOF_W {
440 WDTOF_W { w: self }
441 }
442 #[doc = "Bit 3 - Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0."]
443 #[inline(always)]
444 pub fn wdint(&mut self) -> WDINT_W {
445 WDINT_W { w: self }
446 }
447 #[doc = "Bit 4 - Watchdog update mode. This bit can be set once by software and is only cleared by a reset."]
448 #[inline(always)]
449 pub fn wdprotect(&mut self) -> WDPROTECT_W {
450 WDPROTECT_W { w: self }
451 }
452 #[doc = "Bit 5 - Once this bit is set to one and a watchdog feed is performed, disabling or powering down the watchdog oscillator is prevented by hardware. This bit can be set once by software and is only cleared by any reset."]
453 #[inline(always)]
454 pub fn lock(&mut self) -> LOCK_W {
455 LOCK_W { w: self }
456 }
457 #[doc = "Writes raw bits to the register."]
458 #[inline(always)]
459 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
460 self.0.bits(bits);
461 self
462 }
463}
464#[doc = "Watchdog mode register. This register contains the basic mode and status of the Watchdog Timer.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mod_](index.html) module"]
465pub struct MOD_SPEC;
466impl crate::RegisterSpec for MOD_SPEC {
467 type Ux = u32;
468}
469#[doc = "`read()` method returns [mod_::R](R) reader structure"]
470impl crate::Readable for MOD_SPEC {
471 type Reader = R;
472}
473#[doc = "`write(|w| ..)` method takes [mod_::W](W) writer structure"]
474impl crate::Writable for MOD_SPEC {
475 type Writer = W;
476}
477#[doc = "`reset()` method sets MOD to value 0"]
478impl crate::Resettable for MOD_SPEC {
479 #[inline(always)]
480 fn reset_value() -> Self::Ux {
481 0
482 }
483}