lpc82x_pac/usart0/
ctl.rs

1#[doc = "Register `CTL` reader"]
2pub struct R(crate::R<CTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTL` writer"]
17pub struct W(crate::W<CTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Break Enable.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum TXBRKEN_A {
40    #[doc = "0: Normal operation."]
41    NORMAL = 0,
42    #[doc = "1: Continuous break. Continuous break is sent immediately when this bit is set, and remains until this bit is cleared. A break may be sent without danger of corrupting any currently transmitting character if the transmitter is first disabled (TXDIS in CTL is set) and then waiting for the transmitter to be disabled (TXDISINT in STAT = 1) before writing 1 to TXBRKEN."]
43    CONTINOUS = 1,
44}
45impl From<TXBRKEN_A> for bool {
46    #[inline(always)]
47    fn from(variant: TXBRKEN_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `TXBRKEN` reader - Break Enable."]
52pub struct TXBRKEN_R(crate::FieldReader<bool, TXBRKEN_A>);
53impl TXBRKEN_R {
54    pub(crate) fn new(bits: bool) -> Self {
55        TXBRKEN_R(crate::FieldReader::new(bits))
56    }
57    #[doc = r"Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> TXBRKEN_A {
60        match self.bits {
61            false => TXBRKEN_A::NORMAL,
62            true => TXBRKEN_A::CONTINOUS,
63        }
64    }
65    #[doc = "Checks if the value of the field is `NORMAL`"]
66    #[inline(always)]
67    pub fn is_normal(&self) -> bool {
68        **self == TXBRKEN_A::NORMAL
69    }
70    #[doc = "Checks if the value of the field is `CONTINOUS`"]
71    #[inline(always)]
72    pub fn is_continous(&self) -> bool {
73        **self == TXBRKEN_A::CONTINOUS
74    }
75}
76impl core::ops::Deref for TXBRKEN_R {
77    type Target = crate::FieldReader<bool, TXBRKEN_A>;
78    #[inline(always)]
79    fn deref(&self) -> &Self::Target {
80        &self.0
81    }
82}
83#[doc = "Field `TXBRKEN` writer - Break Enable."]
84pub struct TXBRKEN_W<'a> {
85    w: &'a mut W,
86}
87impl<'a> TXBRKEN_W<'a> {
88    #[doc = r"Writes `variant` to the field"]
89    #[inline(always)]
90    pub fn variant(self, variant: TXBRKEN_A) -> &'a mut W {
91        self.bit(variant.into())
92    }
93    #[doc = "Normal operation."]
94    #[inline(always)]
95    pub fn normal(self) -> &'a mut W {
96        self.variant(TXBRKEN_A::NORMAL)
97    }
98    #[doc = "Continuous break. Continuous break is sent immediately when this bit is set, and remains until this bit is cleared. A break may be sent without danger of corrupting any currently transmitting character if the transmitter is first disabled (TXDIS in CTL is set) and then waiting for the transmitter to be disabled (TXDISINT in STAT = 1) before writing 1 to TXBRKEN."]
99    #[inline(always)]
100    pub fn continous(self) -> &'a mut W {
101        self.variant(TXBRKEN_A::CONTINOUS)
102    }
103    #[doc = r"Sets the field bit"]
104    #[inline(always)]
105    pub fn set_bit(self) -> &'a mut W {
106        self.bit(true)
107    }
108    #[doc = r"Clears the field bit"]
109    #[inline(always)]
110    pub fn clear_bit(self) -> &'a mut W {
111        self.bit(false)
112    }
113    #[doc = r"Writes raw bits to the field"]
114    #[inline(always)]
115    pub fn bit(self, value: bool) -> &'a mut W {
116        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
117        self.w
118    }
119}
120#[doc = "Enable address detect mode.\n\nValue on reset: 0"]
121#[derive(Clone, Copy, Debug, PartialEq)]
122pub enum ADDRDET_A {
123    #[doc = "0: Disabled. The USART presents all incoming data."]
124    DISABLED = 0,
125    #[doc = "1: Enabled. The USART receiver ignores incoming data that does not have the most significant bit of the data (typically the 9th bit) = 1. When the data MSB bit = 1, the receiver treats the incoming data normally, generating a received data interrupt. Software can then check the data to see if this is an address that should be handled. If it is, the ADDRDET bit is cleared by software and further incoming data is handled normally."]
126    ENABLED = 1,
127}
128impl From<ADDRDET_A> for bool {
129    #[inline(always)]
130    fn from(variant: ADDRDET_A) -> Self {
131        variant as u8 != 0
132    }
133}
134#[doc = "Field `ADDRDET` reader - Enable address detect mode."]
135pub struct ADDRDET_R(crate::FieldReader<bool, ADDRDET_A>);
136impl ADDRDET_R {
137    pub(crate) fn new(bits: bool) -> Self {
138        ADDRDET_R(crate::FieldReader::new(bits))
139    }
140    #[doc = r"Get enumerated values variant"]
141    #[inline(always)]
142    pub fn variant(&self) -> ADDRDET_A {
143        match self.bits {
144            false => ADDRDET_A::DISABLED,
145            true => ADDRDET_A::ENABLED,
146        }
147    }
148    #[doc = "Checks if the value of the field is `DISABLED`"]
149    #[inline(always)]
150    pub fn is_disabled(&self) -> bool {
151        **self == ADDRDET_A::DISABLED
152    }
153    #[doc = "Checks if the value of the field is `ENABLED`"]
154    #[inline(always)]
155    pub fn is_enabled(&self) -> bool {
156        **self == ADDRDET_A::ENABLED
157    }
158}
159impl core::ops::Deref for ADDRDET_R {
160    type Target = crate::FieldReader<bool, ADDRDET_A>;
161    #[inline(always)]
162    fn deref(&self) -> &Self::Target {
163        &self.0
164    }
165}
166#[doc = "Field `ADDRDET` writer - Enable address detect mode."]
167pub struct ADDRDET_W<'a> {
168    w: &'a mut W,
169}
170impl<'a> ADDRDET_W<'a> {
171    #[doc = r"Writes `variant` to the field"]
172    #[inline(always)]
173    pub fn variant(self, variant: ADDRDET_A) -> &'a mut W {
174        self.bit(variant.into())
175    }
176    #[doc = "Disabled. The USART presents all incoming data."]
177    #[inline(always)]
178    pub fn disabled(self) -> &'a mut W {
179        self.variant(ADDRDET_A::DISABLED)
180    }
181    #[doc = "Enabled. The USART receiver ignores incoming data that does not have the most significant bit of the data (typically the 9th bit) = 1. When the data MSB bit = 1, the receiver treats the incoming data normally, generating a received data interrupt. Software can then check the data to see if this is an address that should be handled. If it is, the ADDRDET bit is cleared by software and further incoming data is handled normally."]
182    #[inline(always)]
183    pub fn enabled(self) -> &'a mut W {
184        self.variant(ADDRDET_A::ENABLED)
185    }
186    #[doc = r"Sets the field bit"]
187    #[inline(always)]
188    pub fn set_bit(self) -> &'a mut W {
189        self.bit(true)
190    }
191    #[doc = r"Clears the field bit"]
192    #[inline(always)]
193    pub fn clear_bit(self) -> &'a mut W {
194        self.bit(false)
195    }
196    #[doc = r"Writes raw bits to the field"]
197    #[inline(always)]
198    pub fn bit(self, value: bool) -> &'a mut W {
199        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
200        self.w
201    }
202}
203#[doc = "Transmit Disable.\n\nValue on reset: 0"]
204#[derive(Clone, Copy, Debug, PartialEq)]
205pub enum TXDIS_A {
206    #[doc = "0: Not disabled. USART transmitter is not disabled."]
207    ENABLED = 0,
208    #[doc = "1: Disabled. USART transmitter is disabled after any character currently being transmitted is complete. This feature can be used to facilitate software flow control."]
209    DISABLED = 1,
210}
211impl From<TXDIS_A> for bool {
212    #[inline(always)]
213    fn from(variant: TXDIS_A) -> Self {
214        variant as u8 != 0
215    }
216}
217#[doc = "Field `TXDIS` reader - Transmit Disable."]
218pub struct TXDIS_R(crate::FieldReader<bool, TXDIS_A>);
219impl TXDIS_R {
220    pub(crate) fn new(bits: bool) -> Self {
221        TXDIS_R(crate::FieldReader::new(bits))
222    }
223    #[doc = r"Get enumerated values variant"]
224    #[inline(always)]
225    pub fn variant(&self) -> TXDIS_A {
226        match self.bits {
227            false => TXDIS_A::ENABLED,
228            true => TXDIS_A::DISABLED,
229        }
230    }
231    #[doc = "Checks if the value of the field is `ENABLED`"]
232    #[inline(always)]
233    pub fn is_enabled(&self) -> bool {
234        **self == TXDIS_A::ENABLED
235    }
236    #[doc = "Checks if the value of the field is `DISABLED`"]
237    #[inline(always)]
238    pub fn is_disabled(&self) -> bool {
239        **self == TXDIS_A::DISABLED
240    }
241}
242impl core::ops::Deref for TXDIS_R {
243    type Target = crate::FieldReader<bool, TXDIS_A>;
244    #[inline(always)]
245    fn deref(&self) -> &Self::Target {
246        &self.0
247    }
248}
249#[doc = "Field `TXDIS` writer - Transmit Disable."]
250pub struct TXDIS_W<'a> {
251    w: &'a mut W,
252}
253impl<'a> TXDIS_W<'a> {
254    #[doc = r"Writes `variant` to the field"]
255    #[inline(always)]
256    pub fn variant(self, variant: TXDIS_A) -> &'a mut W {
257        self.bit(variant.into())
258    }
259    #[doc = "Not disabled. USART transmitter is not disabled."]
260    #[inline(always)]
261    pub fn enabled(self) -> &'a mut W {
262        self.variant(TXDIS_A::ENABLED)
263    }
264    #[doc = "Disabled. USART transmitter is disabled after any character currently being transmitted is complete. This feature can be used to facilitate software flow control."]
265    #[inline(always)]
266    pub fn disabled(self) -> &'a mut W {
267        self.variant(TXDIS_A::DISABLED)
268    }
269    #[doc = r"Sets the field bit"]
270    #[inline(always)]
271    pub fn set_bit(self) -> &'a mut W {
272        self.bit(true)
273    }
274    #[doc = r"Clears the field bit"]
275    #[inline(always)]
276    pub fn clear_bit(self) -> &'a mut W {
277        self.bit(false)
278    }
279    #[doc = r"Writes raw bits to the field"]
280    #[inline(always)]
281    pub fn bit(self, value: bool) -> &'a mut W {
282        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
283        self.w
284    }
285}
286#[doc = "Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode.\n\nValue on reset: 0"]
287#[derive(Clone, Copy, Debug, PartialEq)]
288pub enum CC_A {
289    #[doc = "0: Clock on character. In synchronous mode, SCLK cycles only when characters are being sent on Un_TXD or to complete a character that is being received."]
290    CLOCK_ON_CHARACTER = 0,
291    #[doc = "1: Continuous clock. SCLK runs continuously in synchronous mode, allowing characters to be received on Un_RxD independently from transmission on Un_TXD)."]
292    CONTINOUS_CLOCK = 1,
293}
294impl From<CC_A> for bool {
295    #[inline(always)]
296    fn from(variant: CC_A) -> Self {
297        variant as u8 != 0
298    }
299}
300#[doc = "Field `CC` reader - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode."]
301pub struct CC_R(crate::FieldReader<bool, CC_A>);
302impl CC_R {
303    pub(crate) fn new(bits: bool) -> Self {
304        CC_R(crate::FieldReader::new(bits))
305    }
306    #[doc = r"Get enumerated values variant"]
307    #[inline(always)]
308    pub fn variant(&self) -> CC_A {
309        match self.bits {
310            false => CC_A::CLOCK_ON_CHARACTER,
311            true => CC_A::CONTINOUS_CLOCK,
312        }
313    }
314    #[doc = "Checks if the value of the field is `CLOCK_ON_CHARACTER`"]
315    #[inline(always)]
316    pub fn is_clock_on_character(&self) -> bool {
317        **self == CC_A::CLOCK_ON_CHARACTER
318    }
319    #[doc = "Checks if the value of the field is `CONTINOUS_CLOCK`"]
320    #[inline(always)]
321    pub fn is_continous_clock(&self) -> bool {
322        **self == CC_A::CONTINOUS_CLOCK
323    }
324}
325impl core::ops::Deref for CC_R {
326    type Target = crate::FieldReader<bool, CC_A>;
327    #[inline(always)]
328    fn deref(&self) -> &Self::Target {
329        &self.0
330    }
331}
332#[doc = "Field `CC` writer - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode."]
333pub struct CC_W<'a> {
334    w: &'a mut W,
335}
336impl<'a> CC_W<'a> {
337    #[doc = r"Writes `variant` to the field"]
338    #[inline(always)]
339    pub fn variant(self, variant: CC_A) -> &'a mut W {
340        self.bit(variant.into())
341    }
342    #[doc = "Clock on character. In synchronous mode, SCLK cycles only when characters are being sent on Un_TXD or to complete a character that is being received."]
343    #[inline(always)]
344    pub fn clock_on_character(self) -> &'a mut W {
345        self.variant(CC_A::CLOCK_ON_CHARACTER)
346    }
347    #[doc = "Continuous clock. SCLK runs continuously in synchronous mode, allowing characters to be received on Un_RxD independently from transmission on Un_TXD)."]
348    #[inline(always)]
349    pub fn continous_clock(self) -> &'a mut W {
350        self.variant(CC_A::CONTINOUS_CLOCK)
351    }
352    #[doc = r"Sets the field bit"]
353    #[inline(always)]
354    pub fn set_bit(self) -> &'a mut W {
355        self.bit(true)
356    }
357    #[doc = r"Clears the field bit"]
358    #[inline(always)]
359    pub fn clear_bit(self) -> &'a mut W {
360        self.bit(false)
361    }
362    #[doc = r"Writes raw bits to the field"]
363    #[inline(always)]
364    pub fn bit(self, value: bool) -> &'a mut W {
365        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
366        self.w
367    }
368}
369#[doc = "Clear Continuous Clock.\n\nValue on reset: 0"]
370#[derive(Clone, Copy, Debug, PartialEq)]
371pub enum CLRCCONRX_A {
372    #[doc = "0: No effect. No effect on the CC bit."]
373    NO_EFFECT = 0,
374    #[doc = "1: Auto-clear. The CC bit is automatically cleared when a complete character has been received. This bit is cleared at the same time."]
375    AUTO_CLEAR = 1,
376}
377impl From<CLRCCONRX_A> for bool {
378    #[inline(always)]
379    fn from(variant: CLRCCONRX_A) -> Self {
380        variant as u8 != 0
381    }
382}
383#[doc = "Field `CLRCCONRX` reader - Clear Continuous Clock."]
384pub struct CLRCCONRX_R(crate::FieldReader<bool, CLRCCONRX_A>);
385impl CLRCCONRX_R {
386    pub(crate) fn new(bits: bool) -> Self {
387        CLRCCONRX_R(crate::FieldReader::new(bits))
388    }
389    #[doc = r"Get enumerated values variant"]
390    #[inline(always)]
391    pub fn variant(&self) -> CLRCCONRX_A {
392        match self.bits {
393            false => CLRCCONRX_A::NO_EFFECT,
394            true => CLRCCONRX_A::AUTO_CLEAR,
395        }
396    }
397    #[doc = "Checks if the value of the field is `NO_EFFECT`"]
398    #[inline(always)]
399    pub fn is_no_effect(&self) -> bool {
400        **self == CLRCCONRX_A::NO_EFFECT
401    }
402    #[doc = "Checks if the value of the field is `AUTO_CLEAR`"]
403    #[inline(always)]
404    pub fn is_auto_clear(&self) -> bool {
405        **self == CLRCCONRX_A::AUTO_CLEAR
406    }
407}
408impl core::ops::Deref for CLRCCONRX_R {
409    type Target = crate::FieldReader<bool, CLRCCONRX_A>;
410    #[inline(always)]
411    fn deref(&self) -> &Self::Target {
412        &self.0
413    }
414}
415#[doc = "Field `CLRCCONRX` writer - Clear Continuous Clock."]
416pub struct CLRCCONRX_W<'a> {
417    w: &'a mut W,
418}
419impl<'a> CLRCCONRX_W<'a> {
420    #[doc = r"Writes `variant` to the field"]
421    #[inline(always)]
422    pub fn variant(self, variant: CLRCCONRX_A) -> &'a mut W {
423        self.bit(variant.into())
424    }
425    #[doc = "No effect. No effect on the CC bit."]
426    #[inline(always)]
427    pub fn no_effect(self) -> &'a mut W {
428        self.variant(CLRCCONRX_A::NO_EFFECT)
429    }
430    #[doc = "Auto-clear. The CC bit is automatically cleared when a complete character has been received. This bit is cleared at the same time."]
431    #[inline(always)]
432    pub fn auto_clear(self) -> &'a mut W {
433        self.variant(CLRCCONRX_A::AUTO_CLEAR)
434    }
435    #[doc = r"Sets the field bit"]
436    #[inline(always)]
437    pub fn set_bit(self) -> &'a mut W {
438        self.bit(true)
439    }
440    #[doc = r"Clears the field bit"]
441    #[inline(always)]
442    pub fn clear_bit(self) -> &'a mut W {
443        self.bit(false)
444    }
445    #[doc = r"Writes raw bits to the field"]
446    #[inline(always)]
447    pub fn bit(self, value: bool) -> &'a mut W {
448        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
449        self.w
450    }
451}
452#[doc = "Autobaud enable.\n\nValue on reset: 0"]
453#[derive(Clone, Copy, Debug, PartialEq)]
454pub enum AUTOBAUD_A {
455    #[doc = "0: Disabled. USART is in normal operating mode."]
456    DISABLED = 0,
457    #[doc = "1: Enabled. USART is in autobaud mode. This bit should only be set when the USART receiver is idle. The first start bit of RX is measured and used the update the BRG register to match the received data rate. AUTOBAUD is cleared once this process is complete, or if there is an AERR."]
458    ENABLED = 1,
459}
460impl From<AUTOBAUD_A> for bool {
461    #[inline(always)]
462    fn from(variant: AUTOBAUD_A) -> Self {
463        variant as u8 != 0
464    }
465}
466#[doc = "Field `AUTOBAUD` reader - Autobaud enable."]
467pub struct AUTOBAUD_R(crate::FieldReader<bool, AUTOBAUD_A>);
468impl AUTOBAUD_R {
469    pub(crate) fn new(bits: bool) -> Self {
470        AUTOBAUD_R(crate::FieldReader::new(bits))
471    }
472    #[doc = r"Get enumerated values variant"]
473    #[inline(always)]
474    pub fn variant(&self) -> AUTOBAUD_A {
475        match self.bits {
476            false => AUTOBAUD_A::DISABLED,
477            true => AUTOBAUD_A::ENABLED,
478        }
479    }
480    #[doc = "Checks if the value of the field is `DISABLED`"]
481    #[inline(always)]
482    pub fn is_disabled(&self) -> bool {
483        **self == AUTOBAUD_A::DISABLED
484    }
485    #[doc = "Checks if the value of the field is `ENABLED`"]
486    #[inline(always)]
487    pub fn is_enabled(&self) -> bool {
488        **self == AUTOBAUD_A::ENABLED
489    }
490}
491impl core::ops::Deref for AUTOBAUD_R {
492    type Target = crate::FieldReader<bool, AUTOBAUD_A>;
493    #[inline(always)]
494    fn deref(&self) -> &Self::Target {
495        &self.0
496    }
497}
498#[doc = "Field `AUTOBAUD` writer - Autobaud enable."]
499pub struct AUTOBAUD_W<'a> {
500    w: &'a mut W,
501}
502impl<'a> AUTOBAUD_W<'a> {
503    #[doc = r"Writes `variant` to the field"]
504    #[inline(always)]
505    pub fn variant(self, variant: AUTOBAUD_A) -> &'a mut W {
506        self.bit(variant.into())
507    }
508    #[doc = "Disabled. USART is in normal operating mode."]
509    #[inline(always)]
510    pub fn disabled(self) -> &'a mut W {
511        self.variant(AUTOBAUD_A::DISABLED)
512    }
513    #[doc = "Enabled. USART is in autobaud mode. This bit should only be set when the USART receiver is idle. The first start bit of RX is measured and used the update the BRG register to match the received data rate. AUTOBAUD is cleared once this process is complete, or if there is an AERR."]
514    #[inline(always)]
515    pub fn enabled(self) -> &'a mut W {
516        self.variant(AUTOBAUD_A::ENABLED)
517    }
518    #[doc = r"Sets the field bit"]
519    #[inline(always)]
520    pub fn set_bit(self) -> &'a mut W {
521        self.bit(true)
522    }
523    #[doc = r"Clears the field bit"]
524    #[inline(always)]
525    pub fn clear_bit(self) -> &'a mut W {
526        self.bit(false)
527    }
528    #[doc = r"Writes raw bits to the field"]
529    #[inline(always)]
530    pub fn bit(self, value: bool) -> &'a mut W {
531        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
532        self.w
533    }
534}
535impl R {
536    #[doc = "Bit 1 - Break Enable."]
537    #[inline(always)]
538    pub fn txbrken(&self) -> TXBRKEN_R {
539        TXBRKEN_R::new(((self.bits >> 1) & 0x01) != 0)
540    }
541    #[doc = "Bit 2 - Enable address detect mode."]
542    #[inline(always)]
543    pub fn addrdet(&self) -> ADDRDET_R {
544        ADDRDET_R::new(((self.bits >> 2) & 0x01) != 0)
545    }
546    #[doc = "Bit 6 - Transmit Disable."]
547    #[inline(always)]
548    pub fn txdis(&self) -> TXDIS_R {
549        TXDIS_R::new(((self.bits >> 6) & 0x01) != 0)
550    }
551    #[doc = "Bit 8 - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode."]
552    #[inline(always)]
553    pub fn cc(&self) -> CC_R {
554        CC_R::new(((self.bits >> 8) & 0x01) != 0)
555    }
556    #[doc = "Bit 9 - Clear Continuous Clock."]
557    #[inline(always)]
558    pub fn clrcconrx(&self) -> CLRCCONRX_R {
559        CLRCCONRX_R::new(((self.bits >> 9) & 0x01) != 0)
560    }
561    #[doc = "Bit 16 - Autobaud enable."]
562    #[inline(always)]
563    pub fn autobaud(&self) -> AUTOBAUD_R {
564        AUTOBAUD_R::new(((self.bits >> 16) & 0x01) != 0)
565    }
566}
567impl W {
568    #[doc = "Bit 1 - Break Enable."]
569    #[inline(always)]
570    pub fn txbrken(&mut self) -> TXBRKEN_W {
571        TXBRKEN_W { w: self }
572    }
573    #[doc = "Bit 2 - Enable address detect mode."]
574    #[inline(always)]
575    pub fn addrdet(&mut self) -> ADDRDET_W {
576        ADDRDET_W { w: self }
577    }
578    #[doc = "Bit 6 - Transmit Disable."]
579    #[inline(always)]
580    pub fn txdis(&mut self) -> TXDIS_W {
581        TXDIS_W { w: self }
582    }
583    #[doc = "Bit 8 - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode."]
584    #[inline(always)]
585    pub fn cc(&mut self) -> CC_W {
586        CC_W { w: self }
587    }
588    #[doc = "Bit 9 - Clear Continuous Clock."]
589    #[inline(always)]
590    pub fn clrcconrx(&mut self) -> CLRCCONRX_W {
591        CLRCCONRX_W { w: self }
592    }
593    #[doc = "Bit 16 - Autobaud enable."]
594    #[inline(always)]
595    pub fn autobaud(&mut self) -> AUTOBAUD_W {
596        AUTOBAUD_W { w: self }
597    }
598    #[doc = "Writes raw bits to the register."]
599    #[inline(always)]
600    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
601        self.0.bits(bits);
602        self
603    }
604}
605#[doc = "USART Control register. USART control settings that are more likely to change during operation.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"]
606pub struct CTL_SPEC;
607impl crate::RegisterSpec for CTL_SPEC {
608    type Ux = u32;
609}
610#[doc = "`read()` method returns [ctl::R](R) reader structure"]
611impl crate::Readable for CTL_SPEC {
612    type Reader = R;
613}
614#[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"]
615impl crate::Writable for CTL_SPEC {
616    type Writer = W;
617}
618#[doc = "`reset()` method sets CTL to value 0"]
619impl crate::Resettable for CTL_SPEC {
620    #[inline(always)]
621    fn reset_value() -> Self::Ux {
622        0
623    }
624}
lpc82x_pac/usart0/ctl.rs

lpc82x_pac/usart0/
ctl.rs
