lpc82x_pac/syscon/
syspllclksel.rs

1#[doc = "Register `SYSPLLCLKSEL` reader"]
2pub struct R(crate::R<SYSPLLCLKSEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SYSPLLCLKSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SYSPLLCLKSEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SYSPLLCLKSEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SYSPLLCLKSEL` writer"]
17pub struct W(crate::W<SYSPLLCLKSEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SYSPLLCLKSEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SYSPLLCLKSEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SYSPLLCLKSEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "System PLL clock source\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum SEL_A {
41    #[doc = "0: IRC"]
42    IRC = 0,
43    #[doc = "1: Crystal Oscillator (SYSOSC)"]
44    SYSOSC = 1,
45    #[doc = "3: CLKIN. External clock input."]
46    CLKIN = 3,
47}
48impl From<SEL_A> for u8 {
49    #[inline(always)]
50    fn from(variant: SEL_A) -> Self {
51        variant as _
52    }
53}
54#[doc = "Field `SEL` reader - System PLL clock source"]
55pub struct SEL_R(crate::FieldReader<u8, SEL_A>);
56impl SEL_R {
57    pub(crate) fn new(bits: u8) -> Self {
58        SEL_R(crate::FieldReader::new(bits))
59    }
60    #[doc = r"Get enumerated values variant"]
61    #[inline(always)]
62    pub fn variant(&self) -> Option<SEL_A> {
63        match self.bits {
64            0 => Some(SEL_A::IRC),
65            1 => Some(SEL_A::SYSOSC),
66            3 => Some(SEL_A::CLKIN),
67            _ => None,
68        }
69    }
70    #[doc = "Checks if the value of the field is `IRC`"]
71    #[inline(always)]
72    pub fn is_irc(&self) -> bool {
73        **self == SEL_A::IRC
74    }
75    #[doc = "Checks if the value of the field is `SYSOSC`"]
76    #[inline(always)]
77    pub fn is_sysosc(&self) -> bool {
78        **self == SEL_A::SYSOSC
79    }
80    #[doc = "Checks if the value of the field is `CLKIN`"]
81    #[inline(always)]
82    pub fn is_clkin(&self) -> bool {
83        **self == SEL_A::CLKIN
84    }
85}
86impl core::ops::Deref for SEL_R {
87    type Target = crate::FieldReader<u8, SEL_A>;
88    #[inline(always)]
89    fn deref(&self) -> &Self::Target {
90        &self.0
91    }
92}
93#[doc = "Field `SEL` writer - System PLL clock source"]
94pub struct SEL_W<'a> {
95    w: &'a mut W,
96}
97impl<'a> SEL_W<'a> {
98    #[doc = r"Writes `variant` to the field"]
99    #[inline(always)]
100    pub fn variant(self, variant: SEL_A) -> &'a mut W {
101        unsafe { self.bits(variant.into()) }
102    }
103    #[doc = "IRC"]
104    #[inline(always)]
105    pub fn irc(self) -> &'a mut W {
106        self.variant(SEL_A::IRC)
107    }
108    #[doc = "Crystal Oscillator (SYSOSC)"]
109    #[inline(always)]
110    pub fn sysosc(self) -> &'a mut W {
111        self.variant(SEL_A::SYSOSC)
112    }
113    #[doc = "CLKIN. External clock input."]
114    #[inline(always)]
115    pub fn clkin(self) -> &'a mut W {
116        self.variant(SEL_A::CLKIN)
117    }
118    #[doc = r"Writes raw bits to the field"]
119    #[inline(always)]
120    pub unsafe fn bits(self, value: u8) -> &'a mut W {
121        self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
122        self.w
123    }
124}
125impl R {
126    #[doc = "Bits 0:1 - System PLL clock source"]
127    #[inline(always)]
128    pub fn sel(&self) -> SEL_R {
129        SEL_R::new((self.bits & 0x03) as u8)
130    }
131}
132impl W {
133    #[doc = "Bits 0:1 - System PLL clock source"]
134    #[inline(always)]
135    pub fn sel(&mut self) -> SEL_W {
136        SEL_W { w: self }
137    }
138    #[doc = "Writes raw bits to the register."]
139    #[inline(always)]
140    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
141        self.0.bits(bits);
142        self
143    }
144}
145#[doc = "System PLL clock source select register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syspllclksel](index.html) module"]
146pub struct SYSPLLCLKSEL_SPEC;
147impl crate::RegisterSpec for SYSPLLCLKSEL_SPEC {
148    type Ux = u32;
149}
150#[doc = "`read()` method returns [syspllclksel::R](R) reader structure"]
151impl crate::Readable for SYSPLLCLKSEL_SPEC {
152    type Reader = R;
153}
154#[doc = "`write(|w| ..)` method takes [syspllclksel::W](W) writer structure"]
155impl crate::Writable for SYSPLLCLKSEL_SPEC {
156    type Writer = W;
157}
158#[doc = "`reset()` method sets SYSPLLCLKSEL to value 0"]
159impl crate::Resettable for SYSPLLCLKSEL_SPEC {
160    #[inline(always)]
161    fn reset_value() -> Self::Ux {
162        0
163    }
164}
lpc82x_pac/syscon/syspllclksel.rs

lpc82x_pac/syscon/
syspllclksel.rs
