lpc82x_pac/syscon/
sysoscctrl.rs

1#[doc = "Register `SYSOSCCTRL` reader"]
2pub struct R(crate::R<SYSOSCCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SYSOSCCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SYSOSCCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SYSOSCCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SYSOSCCTRL` writer"]
17pub struct W(crate::W<SYSOSCCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SYSOSCCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SYSOSCCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SYSOSCCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `BYPASS` reader - Bypass system oscillator"]
38pub struct BYPASS_R(crate::FieldReader<bool, bool>);
39impl BYPASS_R {
40    pub(crate) fn new(bits: bool) -> Self {
41        BYPASS_R(crate::FieldReader::new(bits))
42    }
43}
44impl core::ops::Deref for BYPASS_R {
45    type Target = crate::FieldReader<bool, bool>;
46    #[inline(always)]
47    fn deref(&self) -> &Self::Target {
48        &self.0
49    }
50}
51#[doc = "Field `BYPASS` writer - Bypass system oscillator"]
52pub struct BYPASS_W<'a> {
53    w: &'a mut W,
54}
55impl<'a> BYPASS_W<'a> {
56    #[doc = r"Sets the field bit"]
57    #[inline(always)]
58    pub fn set_bit(self) -> &'a mut W {
59        self.bit(true)
60    }
61    #[doc = r"Clears the field bit"]
62    #[inline(always)]
63    pub fn clear_bit(self) -> &'a mut W {
64        self.bit(false)
65    }
66    #[doc = r"Writes raw bits to the field"]
67    #[inline(always)]
68    pub fn bit(self, value: bool) -> &'a mut W {
69        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
70        self.w
71    }
72}
73#[doc = "Field `FREQ_RANGE` reader - oscillator low / high transconductance selection input (Active High) 1-20MHz '0' : 15-50MHz '1'"]
74pub struct FREQ_RANGE_R(crate::FieldReader<bool, bool>);
75impl FREQ_RANGE_R {
76    pub(crate) fn new(bits: bool) -> Self {
77        FREQ_RANGE_R(crate::FieldReader::new(bits))
78    }
79}
80impl core::ops::Deref for FREQ_RANGE_R {
81    type Target = crate::FieldReader<bool, bool>;
82    #[inline(always)]
83    fn deref(&self) -> &Self::Target {
84        &self.0
85    }
86}
87#[doc = "Field `FREQ_RANGE` writer - oscillator low / high transconductance selection input (Active High) 1-20MHz '0' : 15-50MHz '1'"]
88pub struct FREQ_RANGE_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> FREQ_RANGE_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
106        self.w
107    }
108}
109impl R {
110    #[doc = "Bit 0 - Bypass system oscillator"]
111    #[inline(always)]
112    pub fn bypass(&self) -> BYPASS_R {
113        BYPASS_R::new((self.bits & 0x01) != 0)
114    }
115    #[doc = "Bit 1 - oscillator low / high transconductance selection input (Active High) 1-20MHz '0' : 15-50MHz '1'"]
116    #[inline(always)]
117    pub fn freq_range(&self) -> FREQ_RANGE_R {
118        FREQ_RANGE_R::new(((self.bits >> 1) & 0x01) != 0)
119    }
120}
121impl W {
122    #[doc = "Bit 0 - Bypass system oscillator"]
123    #[inline(always)]
124    pub fn bypass(&mut self) -> BYPASS_W {
125        BYPASS_W { w: self }
126    }
127    #[doc = "Bit 1 - oscillator low / high transconductance selection input (Active High) 1-20MHz '0' : 15-50MHz '1'"]
128    #[inline(always)]
129    pub fn freq_range(&mut self) -> FREQ_RANGE_W {
130        FREQ_RANGE_W { w: self }
131    }
132    #[doc = "Writes raw bits to the register."]
133    #[inline(always)]
134    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
135        self.0.bits(bits);
136        self
137    }
138}
139#[doc = "system oscillator control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysoscctrl](index.html) module"]
140pub struct SYSOSCCTRL_SPEC;
141impl crate::RegisterSpec for SYSOSCCTRL_SPEC {
142    type Ux = u32;
143}
144#[doc = "`read()` method returns [sysoscctrl::R](R) reader structure"]
145impl crate::Readable for SYSOSCCTRL_SPEC {
146    type Reader = R;
147}
148#[doc = "`write(|w| ..)` method takes [sysoscctrl::W](W) writer structure"]
149impl crate::Writable for SYSOSCCTRL_SPEC {
150    type Writer = W;
151}
152#[doc = "`reset()` method sets SYSOSCCTRL to value 0"]
153impl crate::Resettable for SYSOSCCTRL_SPEC {
154    #[inline(always)]
155    fn reset_value() -> Self::Ux {
156        0
157    }
158}
lpc82x_pac/syscon/sysoscctrl.rs

lpc82x_pac/syscon/
sysoscctrl.rs
