1#[doc = "Register `SYSAHBCLKCTRL` reader"]
2pub struct R(crate::R<SYSAHBCLKCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SYSAHBCLKCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SYSAHBCLKCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SYSAHBCLKCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SYSAHBCLKCTRL` writer"]
17pub struct W(crate::W<SYSAHBCLKCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SYSAHBCLKCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SYSAHBCLKCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SYSAHBCLKCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SYS` reader - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
38pub struct SYS_R(crate::FieldReader<bool, bool>);
39impl SYS_R {
40 pub(crate) fn new(bits: bool) -> Self {
41 SYS_R(crate::FieldReader::new(bits))
42 }
43}
44impl core::ops::Deref for SYS_R {
45 type Target = crate::FieldReader<bool, bool>;
46 #[inline(always)]
47 fn deref(&self) -> &Self::Target {
48 &self.0
49 }
50}
51#[doc = "Field `SYS` writer - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
52pub struct SYS_W<'a> {
53 w: &'a mut W,
54}
55impl<'a> SYS_W<'a> {
56 #[doc = r"Sets the field bit"]
57 #[inline(always)]
58 pub fn set_bit(self) -> &'a mut W {
59 self.bit(true)
60 }
61 #[doc = r"Clears the field bit"]
62 #[inline(always)]
63 pub fn clear_bit(self) -> &'a mut W {
64 self.bit(false)
65 }
66 #[doc = r"Writes raw bits to the field"]
67 #[inline(always)]
68 pub fn bit(self, value: bool) -> &'a mut W {
69 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
70 self.w
71 }
72}
73#[doc = "Enables clock for ROM.\n\nValue on reset: 1"]
74#[derive(Clone, Copy, Debug, PartialEq)]
75pub enum ROM_A {
76 #[doc = "0: Disable."]
77 ROM_0 = 0,
78 #[doc = "1: Enable."]
79 ROM_1 = 1,
80}
81impl From<ROM_A> for bool {
82 #[inline(always)]
83 fn from(variant: ROM_A) -> Self {
84 variant as u8 != 0
85 }
86}
87#[doc = "Field `ROM` reader - Enables clock for ROM."]
88pub struct ROM_R(crate::FieldReader<bool, ROM_A>);
89impl ROM_R {
90 pub(crate) fn new(bits: bool) -> Self {
91 ROM_R(crate::FieldReader::new(bits))
92 }
93 #[doc = r"Get enumerated values variant"]
94 #[inline(always)]
95 pub fn variant(&self) -> ROM_A {
96 match self.bits {
97 false => ROM_A::ROM_0,
98 true => ROM_A::ROM_1,
99 }
100 }
101 #[doc = "Checks if the value of the field is `ROM_0`"]
102 #[inline(always)]
103 pub fn is_rom_0(&self) -> bool {
104 **self == ROM_A::ROM_0
105 }
106 #[doc = "Checks if the value of the field is `ROM_1`"]
107 #[inline(always)]
108 pub fn is_rom_1(&self) -> bool {
109 **self == ROM_A::ROM_1
110 }
111}
112impl core::ops::Deref for ROM_R {
113 type Target = crate::FieldReader<bool, ROM_A>;
114 #[inline(always)]
115 fn deref(&self) -> &Self::Target {
116 &self.0
117 }
118}
119#[doc = "Field `ROM` writer - Enables clock for ROM."]
120pub struct ROM_W<'a> {
121 w: &'a mut W,
122}
123impl<'a> ROM_W<'a> {
124 #[doc = r"Writes `variant` to the field"]
125 #[inline(always)]
126 pub fn variant(self, variant: ROM_A) -> &'a mut W {
127 self.bit(variant.into())
128 }
129 #[doc = "Disable."]
130 #[inline(always)]
131 pub fn rom_0(self) -> &'a mut W {
132 self.variant(ROM_A::ROM_0)
133 }
134 #[doc = "Enable."]
135 #[inline(always)]
136 pub fn rom_1(self) -> &'a mut W {
137 self.variant(ROM_A::ROM_1)
138 }
139 #[doc = r"Sets the field bit"]
140 #[inline(always)]
141 pub fn set_bit(self) -> &'a mut W {
142 self.bit(true)
143 }
144 #[doc = r"Clears the field bit"]
145 #[inline(always)]
146 pub fn clear_bit(self) -> &'a mut W {
147 self.bit(false)
148 }
149 #[doc = r"Writes raw bits to the field"]
150 #[inline(always)]
151 pub fn bit(self, value: bool) -> &'a mut W {
152 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
153 self.w
154 }
155}
156#[doc = "Enables clock for SRAM0 and SRAM1.\n\nValue on reset: 1"]
157#[derive(Clone, Copy, Debug, PartialEq)]
158pub enum RAM0_1_A {
159 #[doc = "0: Disable."]
160 RAM0_1_0 = 0,
161 #[doc = "1: Enable."]
162 RAM0_1_1 = 1,
163}
164impl From<RAM0_1_A> for bool {
165 #[inline(always)]
166 fn from(variant: RAM0_1_A) -> Self {
167 variant as u8 != 0
168 }
169}
170#[doc = "Field `RAM0_1` reader - Enables clock for SRAM0 and SRAM1."]
171pub struct RAM0_1_R(crate::FieldReader<bool, RAM0_1_A>);
172impl RAM0_1_R {
173 pub(crate) fn new(bits: bool) -> Self {
174 RAM0_1_R(crate::FieldReader::new(bits))
175 }
176 #[doc = r"Get enumerated values variant"]
177 #[inline(always)]
178 pub fn variant(&self) -> RAM0_1_A {
179 match self.bits {
180 false => RAM0_1_A::RAM0_1_0,
181 true => RAM0_1_A::RAM0_1_1,
182 }
183 }
184 #[doc = "Checks if the value of the field is `RAM0_1_0`"]
185 #[inline(always)]
186 pub fn is_ram0_1_0(&self) -> bool {
187 **self == RAM0_1_A::RAM0_1_0
188 }
189 #[doc = "Checks if the value of the field is `RAM0_1_1`"]
190 #[inline(always)]
191 pub fn is_ram0_1_1(&self) -> bool {
192 **self == RAM0_1_A::RAM0_1_1
193 }
194}
195impl core::ops::Deref for RAM0_1_R {
196 type Target = crate::FieldReader<bool, RAM0_1_A>;
197 #[inline(always)]
198 fn deref(&self) -> &Self::Target {
199 &self.0
200 }
201}
202#[doc = "Field `RAM0_1` writer - Enables clock for SRAM0 and SRAM1."]
203pub struct RAM0_1_W<'a> {
204 w: &'a mut W,
205}
206impl<'a> RAM0_1_W<'a> {
207 #[doc = r"Writes `variant` to the field"]
208 #[inline(always)]
209 pub fn variant(self, variant: RAM0_1_A) -> &'a mut W {
210 self.bit(variant.into())
211 }
212 #[doc = "Disable."]
213 #[inline(always)]
214 pub fn ram0_1_0(self) -> &'a mut W {
215 self.variant(RAM0_1_A::RAM0_1_0)
216 }
217 #[doc = "Enable."]
218 #[inline(always)]
219 pub fn ram0_1_1(self) -> &'a mut W {
220 self.variant(RAM0_1_A::RAM0_1_1)
221 }
222 #[doc = r"Sets the field bit"]
223 #[inline(always)]
224 pub fn set_bit(self) -> &'a mut W {
225 self.bit(true)
226 }
227 #[doc = r"Clears the field bit"]
228 #[inline(always)]
229 pub fn clear_bit(self) -> &'a mut W {
230 self.bit(false)
231 }
232 #[doc = r"Writes raw bits to the field"]
233 #[inline(always)]
234 pub fn bit(self, value: bool) -> &'a mut W {
235 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
236 self.w
237 }
238}
239#[doc = "Enables clock for flash register interface.\n\nValue on reset: 1"]
240#[derive(Clone, Copy, Debug, PartialEq)]
241pub enum FLASHREG_A {
242 #[doc = "0: Disable."]
243 FLASHREG_0 = 0,
244 #[doc = "1: Enable."]
245 FLASHREG_1 = 1,
246}
247impl From<FLASHREG_A> for bool {
248 #[inline(always)]
249 fn from(variant: FLASHREG_A) -> Self {
250 variant as u8 != 0
251 }
252}
253#[doc = "Field `FLASHREG` reader - Enables clock for flash register interface."]
254pub struct FLASHREG_R(crate::FieldReader<bool, FLASHREG_A>);
255impl FLASHREG_R {
256 pub(crate) fn new(bits: bool) -> Self {
257 FLASHREG_R(crate::FieldReader::new(bits))
258 }
259 #[doc = r"Get enumerated values variant"]
260 #[inline(always)]
261 pub fn variant(&self) -> FLASHREG_A {
262 match self.bits {
263 false => FLASHREG_A::FLASHREG_0,
264 true => FLASHREG_A::FLASHREG_1,
265 }
266 }
267 #[doc = "Checks if the value of the field is `FLASHREG_0`"]
268 #[inline(always)]
269 pub fn is_flashreg_0(&self) -> bool {
270 **self == FLASHREG_A::FLASHREG_0
271 }
272 #[doc = "Checks if the value of the field is `FLASHREG_1`"]
273 #[inline(always)]
274 pub fn is_flashreg_1(&self) -> bool {
275 **self == FLASHREG_A::FLASHREG_1
276 }
277}
278impl core::ops::Deref for FLASHREG_R {
279 type Target = crate::FieldReader<bool, FLASHREG_A>;
280 #[inline(always)]
281 fn deref(&self) -> &Self::Target {
282 &self.0
283 }
284}
285#[doc = "Field `FLASHREG` writer - Enables clock for flash register interface."]
286pub struct FLASHREG_W<'a> {
287 w: &'a mut W,
288}
289impl<'a> FLASHREG_W<'a> {
290 #[doc = r"Writes `variant` to the field"]
291 #[inline(always)]
292 pub fn variant(self, variant: FLASHREG_A) -> &'a mut W {
293 self.bit(variant.into())
294 }
295 #[doc = "Disable."]
296 #[inline(always)]
297 pub fn flashreg_0(self) -> &'a mut W {
298 self.variant(FLASHREG_A::FLASHREG_0)
299 }
300 #[doc = "Enable."]
301 #[inline(always)]
302 pub fn flashreg_1(self) -> &'a mut W {
303 self.variant(FLASHREG_A::FLASHREG_1)
304 }
305 #[doc = r"Sets the field bit"]
306 #[inline(always)]
307 pub fn set_bit(self) -> &'a mut W {
308 self.bit(true)
309 }
310 #[doc = r"Clears the field bit"]
311 #[inline(always)]
312 pub fn clear_bit(self) -> &'a mut W {
313 self.bit(false)
314 }
315 #[doc = r"Writes raw bits to the field"]
316 #[inline(always)]
317 pub fn bit(self, value: bool) -> &'a mut W {
318 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
319 self.w
320 }
321}
322#[doc = "Enables clock for flash.\n\nValue on reset: 1"]
323#[derive(Clone, Copy, Debug, PartialEq)]
324pub enum FLASH_A {
325 #[doc = "0: Disable."]
326 FLASH_0 = 0,
327 #[doc = "1: Enable."]
328 FLASH_1 = 1,
329}
330impl From<FLASH_A> for bool {
331 #[inline(always)]
332 fn from(variant: FLASH_A) -> Self {
333 variant as u8 != 0
334 }
335}
336#[doc = "Field `FLASH` reader - Enables clock for flash."]
337pub struct FLASH_R(crate::FieldReader<bool, FLASH_A>);
338impl FLASH_R {
339 pub(crate) fn new(bits: bool) -> Self {
340 FLASH_R(crate::FieldReader::new(bits))
341 }
342 #[doc = r"Get enumerated values variant"]
343 #[inline(always)]
344 pub fn variant(&self) -> FLASH_A {
345 match self.bits {
346 false => FLASH_A::FLASH_0,
347 true => FLASH_A::FLASH_1,
348 }
349 }
350 #[doc = "Checks if the value of the field is `FLASH_0`"]
351 #[inline(always)]
352 pub fn is_flash_0(&self) -> bool {
353 **self == FLASH_A::FLASH_0
354 }
355 #[doc = "Checks if the value of the field is `FLASH_1`"]
356 #[inline(always)]
357 pub fn is_flash_1(&self) -> bool {
358 **self == FLASH_A::FLASH_1
359 }
360}
361impl core::ops::Deref for FLASH_R {
362 type Target = crate::FieldReader<bool, FLASH_A>;
363 #[inline(always)]
364 fn deref(&self) -> &Self::Target {
365 &self.0
366 }
367}
368#[doc = "Field `FLASH` writer - Enables clock for flash."]
369pub struct FLASH_W<'a> {
370 w: &'a mut W,
371}
372impl<'a> FLASH_W<'a> {
373 #[doc = r"Writes `variant` to the field"]
374 #[inline(always)]
375 pub fn variant(self, variant: FLASH_A) -> &'a mut W {
376 self.bit(variant.into())
377 }
378 #[doc = "Disable."]
379 #[inline(always)]
380 pub fn flash_0(self) -> &'a mut W {
381 self.variant(FLASH_A::FLASH_0)
382 }
383 #[doc = "Enable."]
384 #[inline(always)]
385 pub fn flash_1(self) -> &'a mut W {
386 self.variant(FLASH_A::FLASH_1)
387 }
388 #[doc = r"Sets the field bit"]
389 #[inline(always)]
390 pub fn set_bit(self) -> &'a mut W {
391 self.bit(true)
392 }
393 #[doc = r"Clears the field bit"]
394 #[inline(always)]
395 pub fn clear_bit(self) -> &'a mut W {
396 self.bit(false)
397 }
398 #[doc = r"Writes raw bits to the field"]
399 #[inline(always)]
400 pub fn bit(self, value: bool) -> &'a mut W {
401 self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
402 self.w
403 }
404}
405#[doc = "Enables clock for I2C0.\n\nValue on reset: 0"]
406#[derive(Clone, Copy, Debug, PartialEq)]
407pub enum I2C0_A {
408 #[doc = "0: Disable."]
409 I2C0_0 = 0,
410 #[doc = "1: Enable."]
411 I2C0_1 = 1,
412}
413impl From<I2C0_A> for bool {
414 #[inline(always)]
415 fn from(variant: I2C0_A) -> Self {
416 variant as u8 != 0
417 }
418}
419#[doc = "Field `I2C0` reader - Enables clock for I2C0."]
420pub struct I2C0_R(crate::FieldReader<bool, I2C0_A>);
421impl I2C0_R {
422 pub(crate) fn new(bits: bool) -> Self {
423 I2C0_R(crate::FieldReader::new(bits))
424 }
425 #[doc = r"Get enumerated values variant"]
426 #[inline(always)]
427 pub fn variant(&self) -> I2C0_A {
428 match self.bits {
429 false => I2C0_A::I2C0_0,
430 true => I2C0_A::I2C0_1,
431 }
432 }
433 #[doc = "Checks if the value of the field is `I2C0_0`"]
434 #[inline(always)]
435 pub fn is_i2c0_0(&self) -> bool {
436 **self == I2C0_A::I2C0_0
437 }
438 #[doc = "Checks if the value of the field is `I2C0_1`"]
439 #[inline(always)]
440 pub fn is_i2c0_1(&self) -> bool {
441 **self == I2C0_A::I2C0_1
442 }
443}
444impl core::ops::Deref for I2C0_R {
445 type Target = crate::FieldReader<bool, I2C0_A>;
446 #[inline(always)]
447 fn deref(&self) -> &Self::Target {
448 &self.0
449 }
450}
451#[doc = "Field `I2C0` writer - Enables clock for I2C0."]
452pub struct I2C0_W<'a> {
453 w: &'a mut W,
454}
455impl<'a> I2C0_W<'a> {
456 #[doc = r"Writes `variant` to the field"]
457 #[inline(always)]
458 pub fn variant(self, variant: I2C0_A) -> &'a mut W {
459 self.bit(variant.into())
460 }
461 #[doc = "Disable."]
462 #[inline(always)]
463 pub fn i2c0_0(self) -> &'a mut W {
464 self.variant(I2C0_A::I2C0_0)
465 }
466 #[doc = "Enable."]
467 #[inline(always)]
468 pub fn i2c0_1(self) -> &'a mut W {
469 self.variant(I2C0_A::I2C0_1)
470 }
471 #[doc = r"Sets the field bit"]
472 #[inline(always)]
473 pub fn set_bit(self) -> &'a mut W {
474 self.bit(true)
475 }
476 #[doc = r"Clears the field bit"]
477 #[inline(always)]
478 pub fn clear_bit(self) -> &'a mut W {
479 self.bit(false)
480 }
481 #[doc = r"Writes raw bits to the field"]
482 #[inline(always)]
483 pub fn bit(self, value: bool) -> &'a mut W {
484 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
485 self.w
486 }
487}
488#[doc = "Enables clock for GPIO port registers and GPIO pin interrupt registers.\n\nValue on reset: 1"]
489#[derive(Clone, Copy, Debug, PartialEq)]
490pub enum GPIO_A {
491 #[doc = "0: Disable."]
492 GPIO_0 = 0,
493 #[doc = "1: Enable."]
494 GPIO_1 = 1,
495}
496impl From<GPIO_A> for bool {
497 #[inline(always)]
498 fn from(variant: GPIO_A) -> Self {
499 variant as u8 != 0
500 }
501}
502#[doc = "Field `GPIO` reader - Enables clock for GPIO port registers and GPIO pin interrupt registers."]
503pub struct GPIO_R(crate::FieldReader<bool, GPIO_A>);
504impl GPIO_R {
505 pub(crate) fn new(bits: bool) -> Self {
506 GPIO_R(crate::FieldReader::new(bits))
507 }
508 #[doc = r"Get enumerated values variant"]
509 #[inline(always)]
510 pub fn variant(&self) -> GPIO_A {
511 match self.bits {
512 false => GPIO_A::GPIO_0,
513 true => GPIO_A::GPIO_1,
514 }
515 }
516 #[doc = "Checks if the value of the field is `GPIO_0`"]
517 #[inline(always)]
518 pub fn is_gpio_0(&self) -> bool {
519 **self == GPIO_A::GPIO_0
520 }
521 #[doc = "Checks if the value of the field is `GPIO_1`"]
522 #[inline(always)]
523 pub fn is_gpio_1(&self) -> bool {
524 **self == GPIO_A::GPIO_1
525 }
526}
527impl core::ops::Deref for GPIO_R {
528 type Target = crate::FieldReader<bool, GPIO_A>;
529 #[inline(always)]
530 fn deref(&self) -> &Self::Target {
531 &self.0
532 }
533}
534#[doc = "Field `GPIO` writer - Enables clock for GPIO port registers and GPIO pin interrupt registers."]
535pub struct GPIO_W<'a> {
536 w: &'a mut W,
537}
538impl<'a> GPIO_W<'a> {
539 #[doc = r"Writes `variant` to the field"]
540 #[inline(always)]
541 pub fn variant(self, variant: GPIO_A) -> &'a mut W {
542 self.bit(variant.into())
543 }
544 #[doc = "Disable."]
545 #[inline(always)]
546 pub fn gpio_0(self) -> &'a mut W {
547 self.variant(GPIO_A::GPIO_0)
548 }
549 #[doc = "Enable."]
550 #[inline(always)]
551 pub fn gpio_1(self) -> &'a mut W {
552 self.variant(GPIO_A::GPIO_1)
553 }
554 #[doc = r"Sets the field bit"]
555 #[inline(always)]
556 pub fn set_bit(self) -> &'a mut W {
557 self.bit(true)
558 }
559 #[doc = r"Clears the field bit"]
560 #[inline(always)]
561 pub fn clear_bit(self) -> &'a mut W {
562 self.bit(false)
563 }
564 #[doc = r"Writes raw bits to the field"]
565 #[inline(always)]
566 pub fn bit(self, value: bool) -> &'a mut W {
567 self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
568 self.w
569 }
570}
571#[doc = "Enables clock for switch matrix.\n\nValue on reset: 1"]
572#[derive(Clone, Copy, Debug, PartialEq)]
573pub enum SWM_A {
574 #[doc = "0: Disable."]
575 SWM_0 = 0,
576 #[doc = "1: Enable."]
577 SWM_1 = 1,
578}
579impl From<SWM_A> for bool {
580 #[inline(always)]
581 fn from(variant: SWM_A) -> Self {
582 variant as u8 != 0
583 }
584}
585#[doc = "Field `SWM` reader - Enables clock for switch matrix."]
586pub struct SWM_R(crate::FieldReader<bool, SWM_A>);
587impl SWM_R {
588 pub(crate) fn new(bits: bool) -> Self {
589 SWM_R(crate::FieldReader::new(bits))
590 }
591 #[doc = r"Get enumerated values variant"]
592 #[inline(always)]
593 pub fn variant(&self) -> SWM_A {
594 match self.bits {
595 false => SWM_A::SWM_0,
596 true => SWM_A::SWM_1,
597 }
598 }
599 #[doc = "Checks if the value of the field is `SWM_0`"]
600 #[inline(always)]
601 pub fn is_swm_0(&self) -> bool {
602 **self == SWM_A::SWM_0
603 }
604 #[doc = "Checks if the value of the field is `SWM_1`"]
605 #[inline(always)]
606 pub fn is_swm_1(&self) -> bool {
607 **self == SWM_A::SWM_1
608 }
609}
610impl core::ops::Deref for SWM_R {
611 type Target = crate::FieldReader<bool, SWM_A>;
612 #[inline(always)]
613 fn deref(&self) -> &Self::Target {
614 &self.0
615 }
616}
617#[doc = "Field `SWM` writer - Enables clock for switch matrix."]
618pub struct SWM_W<'a> {
619 w: &'a mut W,
620}
621impl<'a> SWM_W<'a> {
622 #[doc = r"Writes `variant` to the field"]
623 #[inline(always)]
624 pub fn variant(self, variant: SWM_A) -> &'a mut W {
625 self.bit(variant.into())
626 }
627 #[doc = "Disable."]
628 #[inline(always)]
629 pub fn swm_0(self) -> &'a mut W {
630 self.variant(SWM_A::SWM_0)
631 }
632 #[doc = "Enable."]
633 #[inline(always)]
634 pub fn swm_1(self) -> &'a mut W {
635 self.variant(SWM_A::SWM_1)
636 }
637 #[doc = r"Sets the field bit"]
638 #[inline(always)]
639 pub fn set_bit(self) -> &'a mut W {
640 self.bit(true)
641 }
642 #[doc = r"Clears the field bit"]
643 #[inline(always)]
644 pub fn clear_bit(self) -> &'a mut W {
645 self.bit(false)
646 }
647 #[doc = r"Writes raw bits to the field"]
648 #[inline(always)]
649 pub fn bit(self, value: bool) -> &'a mut W {
650 self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
651 self.w
652 }
653}
654#[doc = "Enables clock for state configurable timer SCTimer/PWM.\n\nValue on reset: 0"]
655#[derive(Clone, Copy, Debug, PartialEq)]
656pub enum SCT_A {
657 #[doc = "0: Disable."]
658 SCT_0 = 0,
659 #[doc = "1: Enable."]
660 SCT_1 = 1,
661}
662impl From<SCT_A> for bool {
663 #[inline(always)]
664 fn from(variant: SCT_A) -> Self {
665 variant as u8 != 0
666 }
667}
668#[doc = "Field `SCT` reader - Enables clock for state configurable timer SCTimer/PWM."]
669pub struct SCT_R(crate::FieldReader<bool, SCT_A>);
670impl SCT_R {
671 pub(crate) fn new(bits: bool) -> Self {
672 SCT_R(crate::FieldReader::new(bits))
673 }
674 #[doc = r"Get enumerated values variant"]
675 #[inline(always)]
676 pub fn variant(&self) -> SCT_A {
677 match self.bits {
678 false => SCT_A::SCT_0,
679 true => SCT_A::SCT_1,
680 }
681 }
682 #[doc = "Checks if the value of the field is `SCT_0`"]
683 #[inline(always)]
684 pub fn is_sct_0(&self) -> bool {
685 **self == SCT_A::SCT_0
686 }
687 #[doc = "Checks if the value of the field is `SCT_1`"]
688 #[inline(always)]
689 pub fn is_sct_1(&self) -> bool {
690 **self == SCT_A::SCT_1
691 }
692}
693impl core::ops::Deref for SCT_R {
694 type Target = crate::FieldReader<bool, SCT_A>;
695 #[inline(always)]
696 fn deref(&self) -> &Self::Target {
697 &self.0
698 }
699}
700#[doc = "Field `SCT` writer - Enables clock for state configurable timer SCTimer/PWM."]
701pub struct SCT_W<'a> {
702 w: &'a mut W,
703}
704impl<'a> SCT_W<'a> {
705 #[doc = r"Writes `variant` to the field"]
706 #[inline(always)]
707 pub fn variant(self, variant: SCT_A) -> &'a mut W {
708 self.bit(variant.into())
709 }
710 #[doc = "Disable."]
711 #[inline(always)]
712 pub fn sct_0(self) -> &'a mut W {
713 self.variant(SCT_A::SCT_0)
714 }
715 #[doc = "Enable."]
716 #[inline(always)]
717 pub fn sct_1(self) -> &'a mut W {
718 self.variant(SCT_A::SCT_1)
719 }
720 #[doc = r"Sets the field bit"]
721 #[inline(always)]
722 pub fn set_bit(self) -> &'a mut W {
723 self.bit(true)
724 }
725 #[doc = r"Clears the field bit"]
726 #[inline(always)]
727 pub fn clear_bit(self) -> &'a mut W {
728 self.bit(false)
729 }
730 #[doc = r"Writes raw bits to the field"]
731 #[inline(always)]
732 pub fn bit(self, value: bool) -> &'a mut W {
733 self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
734 self.w
735 }
736}
737#[doc = "Enables clock for self-wake-up timer.\n\nValue on reset: 0"]
738#[derive(Clone, Copy, Debug, PartialEq)]
739pub enum WKT_A {
740 #[doc = "0: Disable."]
741 WKT_0 = 0,
742 #[doc = "1: Enable."]
743 WKT_1 = 1,
744}
745impl From<WKT_A> for bool {
746 #[inline(always)]
747 fn from(variant: WKT_A) -> Self {
748 variant as u8 != 0
749 }
750}
751#[doc = "Field `WKT` reader - Enables clock for self-wake-up timer."]
752pub struct WKT_R(crate::FieldReader<bool, WKT_A>);
753impl WKT_R {
754 pub(crate) fn new(bits: bool) -> Self {
755 WKT_R(crate::FieldReader::new(bits))
756 }
757 #[doc = r"Get enumerated values variant"]
758 #[inline(always)]
759 pub fn variant(&self) -> WKT_A {
760 match self.bits {
761 false => WKT_A::WKT_0,
762 true => WKT_A::WKT_1,
763 }
764 }
765 #[doc = "Checks if the value of the field is `WKT_0`"]
766 #[inline(always)]
767 pub fn is_wkt_0(&self) -> bool {
768 **self == WKT_A::WKT_0
769 }
770 #[doc = "Checks if the value of the field is `WKT_1`"]
771 #[inline(always)]
772 pub fn is_wkt_1(&self) -> bool {
773 **self == WKT_A::WKT_1
774 }
775}
776impl core::ops::Deref for WKT_R {
777 type Target = crate::FieldReader<bool, WKT_A>;
778 #[inline(always)]
779 fn deref(&self) -> &Self::Target {
780 &self.0
781 }
782}
783#[doc = "Field `WKT` writer - Enables clock for self-wake-up timer."]
784pub struct WKT_W<'a> {
785 w: &'a mut W,
786}
787impl<'a> WKT_W<'a> {
788 #[doc = r"Writes `variant` to the field"]
789 #[inline(always)]
790 pub fn variant(self, variant: WKT_A) -> &'a mut W {
791 self.bit(variant.into())
792 }
793 #[doc = "Disable."]
794 #[inline(always)]
795 pub fn wkt_0(self) -> &'a mut W {
796 self.variant(WKT_A::WKT_0)
797 }
798 #[doc = "Enable."]
799 #[inline(always)]
800 pub fn wkt_1(self) -> &'a mut W {
801 self.variant(WKT_A::WKT_1)
802 }
803 #[doc = r"Sets the field bit"]
804 #[inline(always)]
805 pub fn set_bit(self) -> &'a mut W {
806 self.bit(true)
807 }
808 #[doc = r"Clears the field bit"]
809 #[inline(always)]
810 pub fn clear_bit(self) -> &'a mut W {
811 self.bit(false)
812 }
813 #[doc = r"Writes raw bits to the field"]
814 #[inline(always)]
815 pub fn bit(self, value: bool) -> &'a mut W {
816 self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
817 self.w
818 }
819}
820#[doc = "Enables clock for multi-rate timer.\n\nValue on reset: 0"]
821#[derive(Clone, Copy, Debug, PartialEq)]
822pub enum MRT_A {
823 #[doc = "0: Disable."]
824 MRT_0 = 0,
825 #[doc = "1: Enable."]
826 MRT_1 = 1,
827}
828impl From<MRT_A> for bool {
829 #[inline(always)]
830 fn from(variant: MRT_A) -> Self {
831 variant as u8 != 0
832 }
833}
834#[doc = "Field `MRT` reader - Enables clock for multi-rate timer."]
835pub struct MRT_R(crate::FieldReader<bool, MRT_A>);
836impl MRT_R {
837 pub(crate) fn new(bits: bool) -> Self {
838 MRT_R(crate::FieldReader::new(bits))
839 }
840 #[doc = r"Get enumerated values variant"]
841 #[inline(always)]
842 pub fn variant(&self) -> MRT_A {
843 match self.bits {
844 false => MRT_A::MRT_0,
845 true => MRT_A::MRT_1,
846 }
847 }
848 #[doc = "Checks if the value of the field is `MRT_0`"]
849 #[inline(always)]
850 pub fn is_mrt_0(&self) -> bool {
851 **self == MRT_A::MRT_0
852 }
853 #[doc = "Checks if the value of the field is `MRT_1`"]
854 #[inline(always)]
855 pub fn is_mrt_1(&self) -> bool {
856 **self == MRT_A::MRT_1
857 }
858}
859impl core::ops::Deref for MRT_R {
860 type Target = crate::FieldReader<bool, MRT_A>;
861 #[inline(always)]
862 fn deref(&self) -> &Self::Target {
863 &self.0
864 }
865}
866#[doc = "Field `MRT` writer - Enables clock for multi-rate timer."]
867pub struct MRT_W<'a> {
868 w: &'a mut W,
869}
870impl<'a> MRT_W<'a> {
871 #[doc = r"Writes `variant` to the field"]
872 #[inline(always)]
873 pub fn variant(self, variant: MRT_A) -> &'a mut W {
874 self.bit(variant.into())
875 }
876 #[doc = "Disable."]
877 #[inline(always)]
878 pub fn mrt_0(self) -> &'a mut W {
879 self.variant(MRT_A::MRT_0)
880 }
881 #[doc = "Enable."]
882 #[inline(always)]
883 pub fn mrt_1(self) -> &'a mut W {
884 self.variant(MRT_A::MRT_1)
885 }
886 #[doc = r"Sets the field bit"]
887 #[inline(always)]
888 pub fn set_bit(self) -> &'a mut W {
889 self.bit(true)
890 }
891 #[doc = r"Clears the field bit"]
892 #[inline(always)]
893 pub fn clear_bit(self) -> &'a mut W {
894 self.bit(false)
895 }
896 #[doc = r"Writes raw bits to the field"]
897 #[inline(always)]
898 pub fn bit(self, value: bool) -> &'a mut W {
899 self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
900 self.w
901 }
902}
903#[doc = "Enables clock for SPI0.\n\nValue on reset: 0"]
904#[derive(Clone, Copy, Debug, PartialEq)]
905pub enum SPI0_A {
906 #[doc = "0: Disable."]
907 SPI0_0 = 0,
908 #[doc = "1: Enable."]
909 SPI0_1 = 1,
910}
911impl From<SPI0_A> for bool {
912 #[inline(always)]
913 fn from(variant: SPI0_A) -> Self {
914 variant as u8 != 0
915 }
916}
917#[doc = "Field `SPI0` reader - Enables clock for SPI0."]
918pub struct SPI0_R(crate::FieldReader<bool, SPI0_A>);
919impl SPI0_R {
920 pub(crate) fn new(bits: bool) -> Self {
921 SPI0_R(crate::FieldReader::new(bits))
922 }
923 #[doc = r"Get enumerated values variant"]
924 #[inline(always)]
925 pub fn variant(&self) -> SPI0_A {
926 match self.bits {
927 false => SPI0_A::SPI0_0,
928 true => SPI0_A::SPI0_1,
929 }
930 }
931 #[doc = "Checks if the value of the field is `SPI0_0`"]
932 #[inline(always)]
933 pub fn is_spi0_0(&self) -> bool {
934 **self == SPI0_A::SPI0_0
935 }
936 #[doc = "Checks if the value of the field is `SPI0_1`"]
937 #[inline(always)]
938 pub fn is_spi0_1(&self) -> bool {
939 **self == SPI0_A::SPI0_1
940 }
941}
942impl core::ops::Deref for SPI0_R {
943 type Target = crate::FieldReader<bool, SPI0_A>;
944 #[inline(always)]
945 fn deref(&self) -> &Self::Target {
946 &self.0
947 }
948}
949#[doc = "Field `SPI0` writer - Enables clock for SPI0."]
950pub struct SPI0_W<'a> {
951 w: &'a mut W,
952}
953impl<'a> SPI0_W<'a> {
954 #[doc = r"Writes `variant` to the field"]
955 #[inline(always)]
956 pub fn variant(self, variant: SPI0_A) -> &'a mut W {
957 self.bit(variant.into())
958 }
959 #[doc = "Disable."]
960 #[inline(always)]
961 pub fn spi0_0(self) -> &'a mut W {
962 self.variant(SPI0_A::SPI0_0)
963 }
964 #[doc = "Enable."]
965 #[inline(always)]
966 pub fn spi0_1(self) -> &'a mut W {
967 self.variant(SPI0_A::SPI0_1)
968 }
969 #[doc = r"Sets the field bit"]
970 #[inline(always)]
971 pub fn set_bit(self) -> &'a mut W {
972 self.bit(true)
973 }
974 #[doc = r"Clears the field bit"]
975 #[inline(always)]
976 pub fn clear_bit(self) -> &'a mut W {
977 self.bit(false)
978 }
979 #[doc = r"Writes raw bits to the field"]
980 #[inline(always)]
981 pub fn bit(self, value: bool) -> &'a mut W {
982 self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
983 self.w
984 }
985}
986#[doc = "Enables clock for SPI1.\n\nValue on reset: 0"]
987#[derive(Clone, Copy, Debug, PartialEq)]
988pub enum SPI1_A {
989 #[doc = "0: Disable."]
990 SPI1_0 = 0,
991 #[doc = "1: Enable."]
992 SPI1_1 = 1,
993}
994impl From<SPI1_A> for bool {
995 #[inline(always)]
996 fn from(variant: SPI1_A) -> Self {
997 variant as u8 != 0
998 }
999}
1000#[doc = "Field `SPI1` reader - Enables clock for SPI1."]
1001pub struct SPI1_R(crate::FieldReader<bool, SPI1_A>);
1002impl SPI1_R {
1003 pub(crate) fn new(bits: bool) -> Self {
1004 SPI1_R(crate::FieldReader::new(bits))
1005 }
1006 #[doc = r"Get enumerated values variant"]
1007 #[inline(always)]
1008 pub fn variant(&self) -> SPI1_A {
1009 match self.bits {
1010 false => SPI1_A::SPI1_0,
1011 true => SPI1_A::SPI1_1,
1012 }
1013 }
1014 #[doc = "Checks if the value of the field is `SPI1_0`"]
1015 #[inline(always)]
1016 pub fn is_spi1_0(&self) -> bool {
1017 **self == SPI1_A::SPI1_0
1018 }
1019 #[doc = "Checks if the value of the field is `SPI1_1`"]
1020 #[inline(always)]
1021 pub fn is_spi1_1(&self) -> bool {
1022 **self == SPI1_A::SPI1_1
1023 }
1024}
1025impl core::ops::Deref for SPI1_R {
1026 type Target = crate::FieldReader<bool, SPI1_A>;
1027 #[inline(always)]
1028 fn deref(&self) -> &Self::Target {
1029 &self.0
1030 }
1031}
1032#[doc = "Field `SPI1` writer - Enables clock for SPI1."]
1033pub struct SPI1_W<'a> {
1034 w: &'a mut W,
1035}
1036impl<'a> SPI1_W<'a> {
1037 #[doc = r"Writes `variant` to the field"]
1038 #[inline(always)]
1039 pub fn variant(self, variant: SPI1_A) -> &'a mut W {
1040 self.bit(variant.into())
1041 }
1042 #[doc = "Disable."]
1043 #[inline(always)]
1044 pub fn spi1_0(self) -> &'a mut W {
1045 self.variant(SPI1_A::SPI1_0)
1046 }
1047 #[doc = "Enable."]
1048 #[inline(always)]
1049 pub fn spi1_1(self) -> &'a mut W {
1050 self.variant(SPI1_A::SPI1_1)
1051 }
1052 #[doc = r"Sets the field bit"]
1053 #[inline(always)]
1054 pub fn set_bit(self) -> &'a mut W {
1055 self.bit(true)
1056 }
1057 #[doc = r"Clears the field bit"]
1058 #[inline(always)]
1059 pub fn clear_bit(self) -> &'a mut W {
1060 self.bit(false)
1061 }
1062 #[doc = r"Writes raw bits to the field"]
1063 #[inline(always)]
1064 pub fn bit(self, value: bool) -> &'a mut W {
1065 self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
1066 self.w
1067 }
1068}
1069#[doc = "Enables clock for CRC.\n\nValue on reset: 0"]
1070#[derive(Clone, Copy, Debug, PartialEq)]
1071pub enum CRC_A {
1072 #[doc = "0: Disable."]
1073 CRC_0 = 0,
1074 #[doc = "1: Enable."]
1075 CRC_1 = 1,
1076}
1077impl From<CRC_A> for bool {
1078 #[inline(always)]
1079 fn from(variant: CRC_A) -> Self {
1080 variant as u8 != 0
1081 }
1082}
1083#[doc = "Field `CRC` reader - Enables clock for CRC."]
1084pub struct CRC_R(crate::FieldReader<bool, CRC_A>);
1085impl CRC_R {
1086 pub(crate) fn new(bits: bool) -> Self {
1087 CRC_R(crate::FieldReader::new(bits))
1088 }
1089 #[doc = r"Get enumerated values variant"]
1090 #[inline(always)]
1091 pub fn variant(&self) -> CRC_A {
1092 match self.bits {
1093 false => CRC_A::CRC_0,
1094 true => CRC_A::CRC_1,
1095 }
1096 }
1097 #[doc = "Checks if the value of the field is `CRC_0`"]
1098 #[inline(always)]
1099 pub fn is_crc_0(&self) -> bool {
1100 **self == CRC_A::CRC_0
1101 }
1102 #[doc = "Checks if the value of the field is `CRC_1`"]
1103 #[inline(always)]
1104 pub fn is_crc_1(&self) -> bool {
1105 **self == CRC_A::CRC_1
1106 }
1107}
1108impl core::ops::Deref for CRC_R {
1109 type Target = crate::FieldReader<bool, CRC_A>;
1110 #[inline(always)]
1111 fn deref(&self) -> &Self::Target {
1112 &self.0
1113 }
1114}
1115#[doc = "Field `CRC` writer - Enables clock for CRC."]
1116pub struct CRC_W<'a> {
1117 w: &'a mut W,
1118}
1119impl<'a> CRC_W<'a> {
1120 #[doc = r"Writes `variant` to the field"]
1121 #[inline(always)]
1122 pub fn variant(self, variant: CRC_A) -> &'a mut W {
1123 self.bit(variant.into())
1124 }
1125 #[doc = "Disable."]
1126 #[inline(always)]
1127 pub fn crc_0(self) -> &'a mut W {
1128 self.variant(CRC_A::CRC_0)
1129 }
1130 #[doc = "Enable."]
1131 #[inline(always)]
1132 pub fn crc_1(self) -> &'a mut W {
1133 self.variant(CRC_A::CRC_1)
1134 }
1135 #[doc = r"Sets the field bit"]
1136 #[inline(always)]
1137 pub fn set_bit(self) -> &'a mut W {
1138 self.bit(true)
1139 }
1140 #[doc = r"Clears the field bit"]
1141 #[inline(always)]
1142 pub fn clear_bit(self) -> &'a mut W {
1143 self.bit(false)
1144 }
1145 #[doc = r"Writes raw bits to the field"]
1146 #[inline(always)]
1147 pub fn bit(self, value: bool) -> &'a mut W {
1148 self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
1149 self.w
1150 }
1151}
1152#[doc = "Enables clock for USART0.\n\nValue on reset: 0"]
1153#[derive(Clone, Copy, Debug, PartialEq)]
1154pub enum UART0_A {
1155 #[doc = "0: Disable."]
1156 UART0_0 = 0,
1157 #[doc = "1: Enable."]
1158 UART0_1 = 1,
1159}
1160impl From<UART0_A> for bool {
1161 #[inline(always)]
1162 fn from(variant: UART0_A) -> Self {
1163 variant as u8 != 0
1164 }
1165}
1166#[doc = "Field `UART0` reader - Enables clock for USART0."]
1167pub struct UART0_R(crate::FieldReader<bool, UART0_A>);
1168impl UART0_R {
1169 pub(crate) fn new(bits: bool) -> Self {
1170 UART0_R(crate::FieldReader::new(bits))
1171 }
1172 #[doc = r"Get enumerated values variant"]
1173 #[inline(always)]
1174 pub fn variant(&self) -> UART0_A {
1175 match self.bits {
1176 false => UART0_A::UART0_0,
1177 true => UART0_A::UART0_1,
1178 }
1179 }
1180 #[doc = "Checks if the value of the field is `UART0_0`"]
1181 #[inline(always)]
1182 pub fn is_uart0_0(&self) -> bool {
1183 **self == UART0_A::UART0_0
1184 }
1185 #[doc = "Checks if the value of the field is `UART0_1`"]
1186 #[inline(always)]
1187 pub fn is_uart0_1(&self) -> bool {
1188 **self == UART0_A::UART0_1
1189 }
1190}
1191impl core::ops::Deref for UART0_R {
1192 type Target = crate::FieldReader<bool, UART0_A>;
1193 #[inline(always)]
1194 fn deref(&self) -> &Self::Target {
1195 &self.0
1196 }
1197}
1198#[doc = "Field `UART0` writer - Enables clock for USART0."]
1199pub struct UART0_W<'a> {
1200 w: &'a mut W,
1201}
1202impl<'a> UART0_W<'a> {
1203 #[doc = r"Writes `variant` to the field"]
1204 #[inline(always)]
1205 pub fn variant(self, variant: UART0_A) -> &'a mut W {
1206 self.bit(variant.into())
1207 }
1208 #[doc = "Disable."]
1209 #[inline(always)]
1210 pub fn uart0_0(self) -> &'a mut W {
1211 self.variant(UART0_A::UART0_0)
1212 }
1213 #[doc = "Enable."]
1214 #[inline(always)]
1215 pub fn uart0_1(self) -> &'a mut W {
1216 self.variant(UART0_A::UART0_1)
1217 }
1218 #[doc = r"Sets the field bit"]
1219 #[inline(always)]
1220 pub fn set_bit(self) -> &'a mut W {
1221 self.bit(true)
1222 }
1223 #[doc = r"Clears the field bit"]
1224 #[inline(always)]
1225 pub fn clear_bit(self) -> &'a mut W {
1226 self.bit(false)
1227 }
1228 #[doc = r"Writes raw bits to the field"]
1229 #[inline(always)]
1230 pub fn bit(self, value: bool) -> &'a mut W {
1231 self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
1232 self.w
1233 }
1234}
1235#[doc = "Enables clock for USART1.\n\nValue on reset: 0"]
1236#[derive(Clone, Copy, Debug, PartialEq)]
1237pub enum UART1_A {
1238 #[doc = "0: Disable."]
1239 UART1_0 = 0,
1240 #[doc = "1: Enable."]
1241 UART1_1 = 1,
1242}
1243impl From<UART1_A> for bool {
1244 #[inline(always)]
1245 fn from(variant: UART1_A) -> Self {
1246 variant as u8 != 0
1247 }
1248}
1249#[doc = "Field `UART1` reader - Enables clock for USART1."]
1250pub struct UART1_R(crate::FieldReader<bool, UART1_A>);
1251impl UART1_R {
1252 pub(crate) fn new(bits: bool) -> Self {
1253 UART1_R(crate::FieldReader::new(bits))
1254 }
1255 #[doc = r"Get enumerated values variant"]
1256 #[inline(always)]
1257 pub fn variant(&self) -> UART1_A {
1258 match self.bits {
1259 false => UART1_A::UART1_0,
1260 true => UART1_A::UART1_1,
1261 }
1262 }
1263 #[doc = "Checks if the value of the field is `UART1_0`"]
1264 #[inline(always)]
1265 pub fn is_uart1_0(&self) -> bool {
1266 **self == UART1_A::UART1_0
1267 }
1268 #[doc = "Checks if the value of the field is `UART1_1`"]
1269 #[inline(always)]
1270 pub fn is_uart1_1(&self) -> bool {
1271 **self == UART1_A::UART1_1
1272 }
1273}
1274impl core::ops::Deref for UART1_R {
1275 type Target = crate::FieldReader<bool, UART1_A>;
1276 #[inline(always)]
1277 fn deref(&self) -> &Self::Target {
1278 &self.0
1279 }
1280}
1281#[doc = "Field `UART1` writer - Enables clock for USART1."]
1282pub struct UART1_W<'a> {
1283 w: &'a mut W,
1284}
1285impl<'a> UART1_W<'a> {
1286 #[doc = r"Writes `variant` to the field"]
1287 #[inline(always)]
1288 pub fn variant(self, variant: UART1_A) -> &'a mut W {
1289 self.bit(variant.into())
1290 }
1291 #[doc = "Disable."]
1292 #[inline(always)]
1293 pub fn uart1_0(self) -> &'a mut W {
1294 self.variant(UART1_A::UART1_0)
1295 }
1296 #[doc = "Enable."]
1297 #[inline(always)]
1298 pub fn uart1_1(self) -> &'a mut W {
1299 self.variant(UART1_A::UART1_1)
1300 }
1301 #[doc = r"Sets the field bit"]
1302 #[inline(always)]
1303 pub fn set_bit(self) -> &'a mut W {
1304 self.bit(true)
1305 }
1306 #[doc = r"Clears the field bit"]
1307 #[inline(always)]
1308 pub fn clear_bit(self) -> &'a mut W {
1309 self.bit(false)
1310 }
1311 #[doc = r"Writes raw bits to the field"]
1312 #[inline(always)]
1313 pub fn bit(self, value: bool) -> &'a mut W {
1314 self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
1315 self.w
1316 }
1317}
1318#[doc = "Enables clock for USART2.\n\nValue on reset: 0"]
1319#[derive(Clone, Copy, Debug, PartialEq)]
1320pub enum UART2_A {
1321 #[doc = "0: Disable."]
1322 UART2_0 = 0,
1323 #[doc = "1: Enable."]
1324 UART2_1 = 1,
1325}
1326impl From<UART2_A> for bool {
1327 #[inline(always)]
1328 fn from(variant: UART2_A) -> Self {
1329 variant as u8 != 0
1330 }
1331}
1332#[doc = "Field `UART2` reader - Enables clock for USART2."]
1333pub struct UART2_R(crate::FieldReader<bool, UART2_A>);
1334impl UART2_R {
1335 pub(crate) fn new(bits: bool) -> Self {
1336 UART2_R(crate::FieldReader::new(bits))
1337 }
1338 #[doc = r"Get enumerated values variant"]
1339 #[inline(always)]
1340 pub fn variant(&self) -> UART2_A {
1341 match self.bits {
1342 false => UART2_A::UART2_0,
1343 true => UART2_A::UART2_1,
1344 }
1345 }
1346 #[doc = "Checks if the value of the field is `UART2_0`"]
1347 #[inline(always)]
1348 pub fn is_uart2_0(&self) -> bool {
1349 **self == UART2_A::UART2_0
1350 }
1351 #[doc = "Checks if the value of the field is `UART2_1`"]
1352 #[inline(always)]
1353 pub fn is_uart2_1(&self) -> bool {
1354 **self == UART2_A::UART2_1
1355 }
1356}
1357impl core::ops::Deref for UART2_R {
1358 type Target = crate::FieldReader<bool, UART2_A>;
1359 #[inline(always)]
1360 fn deref(&self) -> &Self::Target {
1361 &self.0
1362 }
1363}
1364#[doc = "Field `UART2` writer - Enables clock for USART2."]
1365pub struct UART2_W<'a> {
1366 w: &'a mut W,
1367}
1368impl<'a> UART2_W<'a> {
1369 #[doc = r"Writes `variant` to the field"]
1370 #[inline(always)]
1371 pub fn variant(self, variant: UART2_A) -> &'a mut W {
1372 self.bit(variant.into())
1373 }
1374 #[doc = "Disable."]
1375 #[inline(always)]
1376 pub fn uart2_0(self) -> &'a mut W {
1377 self.variant(UART2_A::UART2_0)
1378 }
1379 #[doc = "Enable."]
1380 #[inline(always)]
1381 pub fn uart2_1(self) -> &'a mut W {
1382 self.variant(UART2_A::UART2_1)
1383 }
1384 #[doc = r"Sets the field bit"]
1385 #[inline(always)]
1386 pub fn set_bit(self) -> &'a mut W {
1387 self.bit(true)
1388 }
1389 #[doc = r"Clears the field bit"]
1390 #[inline(always)]
1391 pub fn clear_bit(self) -> &'a mut W {
1392 self.bit(false)
1393 }
1394 #[doc = r"Writes raw bits to the field"]
1395 #[inline(always)]
1396 pub fn bit(self, value: bool) -> &'a mut W {
1397 self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
1398 self.w
1399 }
1400}
1401#[doc = "Enables clock for WWDT.\n\nValue on reset: 0"]
1402#[derive(Clone, Copy, Debug, PartialEq)]
1403pub enum WWDT_A {
1404 #[doc = "0: Disable."]
1405 WWDT_0 = 0,
1406 #[doc = "1: Enable."]
1407 WWDT_1 = 1,
1408}
1409impl From<WWDT_A> for bool {
1410 #[inline(always)]
1411 fn from(variant: WWDT_A) -> Self {
1412 variant as u8 != 0
1413 }
1414}
1415#[doc = "Field `WWDT` reader - Enables clock for WWDT."]
1416pub struct WWDT_R(crate::FieldReader<bool, WWDT_A>);
1417impl WWDT_R {
1418 pub(crate) fn new(bits: bool) -> Self {
1419 WWDT_R(crate::FieldReader::new(bits))
1420 }
1421 #[doc = r"Get enumerated values variant"]
1422 #[inline(always)]
1423 pub fn variant(&self) -> WWDT_A {
1424 match self.bits {
1425 false => WWDT_A::WWDT_0,
1426 true => WWDT_A::WWDT_1,
1427 }
1428 }
1429 #[doc = "Checks if the value of the field is `WWDT_0`"]
1430 #[inline(always)]
1431 pub fn is_wwdt_0(&self) -> bool {
1432 **self == WWDT_A::WWDT_0
1433 }
1434 #[doc = "Checks if the value of the field is `WWDT_1`"]
1435 #[inline(always)]
1436 pub fn is_wwdt_1(&self) -> bool {
1437 **self == WWDT_A::WWDT_1
1438 }
1439}
1440impl core::ops::Deref for WWDT_R {
1441 type Target = crate::FieldReader<bool, WWDT_A>;
1442 #[inline(always)]
1443 fn deref(&self) -> &Self::Target {
1444 &self.0
1445 }
1446}
1447#[doc = "Field `WWDT` writer - Enables clock for WWDT."]
1448pub struct WWDT_W<'a> {
1449 w: &'a mut W,
1450}
1451impl<'a> WWDT_W<'a> {
1452 #[doc = r"Writes `variant` to the field"]
1453 #[inline(always)]
1454 pub fn variant(self, variant: WWDT_A) -> &'a mut W {
1455 self.bit(variant.into())
1456 }
1457 #[doc = "Disable."]
1458 #[inline(always)]
1459 pub fn wwdt_0(self) -> &'a mut W {
1460 self.variant(WWDT_A::WWDT_0)
1461 }
1462 #[doc = "Enable."]
1463 #[inline(always)]
1464 pub fn wwdt_1(self) -> &'a mut W {
1465 self.variant(WWDT_A::WWDT_1)
1466 }
1467 #[doc = r"Sets the field bit"]
1468 #[inline(always)]
1469 pub fn set_bit(self) -> &'a mut W {
1470 self.bit(true)
1471 }
1472 #[doc = r"Clears the field bit"]
1473 #[inline(always)]
1474 pub fn clear_bit(self) -> &'a mut W {
1475 self.bit(false)
1476 }
1477 #[doc = r"Writes raw bits to the field"]
1478 #[inline(always)]
1479 pub fn bit(self, value: bool) -> &'a mut W {
1480 self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
1481 self.w
1482 }
1483}
1484#[doc = "Enables clock for IOCON block.\n\nValue on reset: 0"]
1485#[derive(Clone, Copy, Debug, PartialEq)]
1486pub enum IOCON_A {
1487 #[doc = "0: Disable."]
1488 IOCON_0 = 0,
1489 #[doc = "1: Enable."]
1490 IOCON_1 = 1,
1491}
1492impl From<IOCON_A> for bool {
1493 #[inline(always)]
1494 fn from(variant: IOCON_A) -> Self {
1495 variant as u8 != 0
1496 }
1497}
1498#[doc = "Field `IOCON` reader - Enables clock for IOCON block."]
1499pub struct IOCON_R(crate::FieldReader<bool, IOCON_A>);
1500impl IOCON_R {
1501 pub(crate) fn new(bits: bool) -> Self {
1502 IOCON_R(crate::FieldReader::new(bits))
1503 }
1504 #[doc = r"Get enumerated values variant"]
1505 #[inline(always)]
1506 pub fn variant(&self) -> IOCON_A {
1507 match self.bits {
1508 false => IOCON_A::IOCON_0,
1509 true => IOCON_A::IOCON_1,
1510 }
1511 }
1512 #[doc = "Checks if the value of the field is `IOCON_0`"]
1513 #[inline(always)]
1514 pub fn is_iocon_0(&self) -> bool {
1515 **self == IOCON_A::IOCON_0
1516 }
1517 #[doc = "Checks if the value of the field is `IOCON_1`"]
1518 #[inline(always)]
1519 pub fn is_iocon_1(&self) -> bool {
1520 **self == IOCON_A::IOCON_1
1521 }
1522}
1523impl core::ops::Deref for IOCON_R {
1524 type Target = crate::FieldReader<bool, IOCON_A>;
1525 #[inline(always)]
1526 fn deref(&self) -> &Self::Target {
1527 &self.0
1528 }
1529}
1530#[doc = "Field `IOCON` writer - Enables clock for IOCON block."]
1531pub struct IOCON_W<'a> {
1532 w: &'a mut W,
1533}
1534impl<'a> IOCON_W<'a> {
1535 #[doc = r"Writes `variant` to the field"]
1536 #[inline(always)]
1537 pub fn variant(self, variant: IOCON_A) -> &'a mut W {
1538 self.bit(variant.into())
1539 }
1540 #[doc = "Disable."]
1541 #[inline(always)]
1542 pub fn iocon_0(self) -> &'a mut W {
1543 self.variant(IOCON_A::IOCON_0)
1544 }
1545 #[doc = "Enable."]
1546 #[inline(always)]
1547 pub fn iocon_1(self) -> &'a mut W {
1548 self.variant(IOCON_A::IOCON_1)
1549 }
1550 #[doc = r"Sets the field bit"]
1551 #[inline(always)]
1552 pub fn set_bit(self) -> &'a mut W {
1553 self.bit(true)
1554 }
1555 #[doc = r"Clears the field bit"]
1556 #[inline(always)]
1557 pub fn clear_bit(self) -> &'a mut W {
1558 self.bit(false)
1559 }
1560 #[doc = r"Writes raw bits to the field"]
1561 #[inline(always)]
1562 pub fn bit(self, value: bool) -> &'a mut W {
1563 self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
1564 self.w
1565 }
1566}
1567#[doc = "Enables clock to analog comparator.\n\nValue on reset: 0"]
1568#[derive(Clone, Copy, Debug, PartialEq)]
1569pub enum ACMP_A {
1570 #[doc = "0: Disable."]
1571 ACMP_0 = 0,
1572 #[doc = "1: Enable."]
1573 ACMP_1 = 1,
1574}
1575impl From<ACMP_A> for bool {
1576 #[inline(always)]
1577 fn from(variant: ACMP_A) -> Self {
1578 variant as u8 != 0
1579 }
1580}
1581#[doc = "Field `ACMP` reader - Enables clock to analog comparator."]
1582pub struct ACMP_R(crate::FieldReader<bool, ACMP_A>);
1583impl ACMP_R {
1584 pub(crate) fn new(bits: bool) -> Self {
1585 ACMP_R(crate::FieldReader::new(bits))
1586 }
1587 #[doc = r"Get enumerated values variant"]
1588 #[inline(always)]
1589 pub fn variant(&self) -> ACMP_A {
1590 match self.bits {
1591 false => ACMP_A::ACMP_0,
1592 true => ACMP_A::ACMP_1,
1593 }
1594 }
1595 #[doc = "Checks if the value of the field is `ACMP_0`"]
1596 #[inline(always)]
1597 pub fn is_acmp_0(&self) -> bool {
1598 **self == ACMP_A::ACMP_0
1599 }
1600 #[doc = "Checks if the value of the field is `ACMP_1`"]
1601 #[inline(always)]
1602 pub fn is_acmp_1(&self) -> bool {
1603 **self == ACMP_A::ACMP_1
1604 }
1605}
1606impl core::ops::Deref for ACMP_R {
1607 type Target = crate::FieldReader<bool, ACMP_A>;
1608 #[inline(always)]
1609 fn deref(&self) -> &Self::Target {
1610 &self.0
1611 }
1612}
1613#[doc = "Field `ACMP` writer - Enables clock to analog comparator."]
1614pub struct ACMP_W<'a> {
1615 w: &'a mut W,
1616}
1617impl<'a> ACMP_W<'a> {
1618 #[doc = r"Writes `variant` to the field"]
1619 #[inline(always)]
1620 pub fn variant(self, variant: ACMP_A) -> &'a mut W {
1621 self.bit(variant.into())
1622 }
1623 #[doc = "Disable."]
1624 #[inline(always)]
1625 pub fn acmp_0(self) -> &'a mut W {
1626 self.variant(ACMP_A::ACMP_0)
1627 }
1628 #[doc = "Enable."]
1629 #[inline(always)]
1630 pub fn acmp_1(self) -> &'a mut W {
1631 self.variant(ACMP_A::ACMP_1)
1632 }
1633 #[doc = r"Sets the field bit"]
1634 #[inline(always)]
1635 pub fn set_bit(self) -> &'a mut W {
1636 self.bit(true)
1637 }
1638 #[doc = r"Clears the field bit"]
1639 #[inline(always)]
1640 pub fn clear_bit(self) -> &'a mut W {
1641 self.bit(false)
1642 }
1643 #[doc = r"Writes raw bits to the field"]
1644 #[inline(always)]
1645 pub fn bit(self, value: bool) -> &'a mut W {
1646 self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
1647 self.w
1648 }
1649}
1650#[doc = "Enables clock to I2C1.\n\nValue on reset: 0"]
1651#[derive(Clone, Copy, Debug, PartialEq)]
1652pub enum I2C1_A {
1653 #[doc = "0: Disable."]
1654 I2C1_0 = 0,
1655 #[doc = "1: Enable."]
1656 I2C1_1 = 1,
1657}
1658impl From<I2C1_A> for bool {
1659 #[inline(always)]
1660 fn from(variant: I2C1_A) -> Self {
1661 variant as u8 != 0
1662 }
1663}
1664#[doc = "Field `I2C1` reader - Enables clock to I2C1."]
1665pub struct I2C1_R(crate::FieldReader<bool, I2C1_A>);
1666impl I2C1_R {
1667 pub(crate) fn new(bits: bool) -> Self {
1668 I2C1_R(crate::FieldReader::new(bits))
1669 }
1670 #[doc = r"Get enumerated values variant"]
1671 #[inline(always)]
1672 pub fn variant(&self) -> I2C1_A {
1673 match self.bits {
1674 false => I2C1_A::I2C1_0,
1675 true => I2C1_A::I2C1_1,
1676 }
1677 }
1678 #[doc = "Checks if the value of the field is `I2C1_0`"]
1679 #[inline(always)]
1680 pub fn is_i2c1_0(&self) -> bool {
1681 **self == I2C1_A::I2C1_0
1682 }
1683 #[doc = "Checks if the value of the field is `I2C1_1`"]
1684 #[inline(always)]
1685 pub fn is_i2c1_1(&self) -> bool {
1686 **self == I2C1_A::I2C1_1
1687 }
1688}
1689impl core::ops::Deref for I2C1_R {
1690 type Target = crate::FieldReader<bool, I2C1_A>;
1691 #[inline(always)]
1692 fn deref(&self) -> &Self::Target {
1693 &self.0
1694 }
1695}
1696#[doc = "Field `I2C1` writer - Enables clock to I2C1."]
1697pub struct I2C1_W<'a> {
1698 w: &'a mut W,
1699}
1700impl<'a> I2C1_W<'a> {
1701 #[doc = r"Writes `variant` to the field"]
1702 #[inline(always)]
1703 pub fn variant(self, variant: I2C1_A) -> &'a mut W {
1704 self.bit(variant.into())
1705 }
1706 #[doc = "Disable."]
1707 #[inline(always)]
1708 pub fn i2c1_0(self) -> &'a mut W {
1709 self.variant(I2C1_A::I2C1_0)
1710 }
1711 #[doc = "Enable."]
1712 #[inline(always)]
1713 pub fn i2c1_1(self) -> &'a mut W {
1714 self.variant(I2C1_A::I2C1_1)
1715 }
1716 #[doc = r"Sets the field bit"]
1717 #[inline(always)]
1718 pub fn set_bit(self) -> &'a mut W {
1719 self.bit(true)
1720 }
1721 #[doc = r"Clears the field bit"]
1722 #[inline(always)]
1723 pub fn clear_bit(self) -> &'a mut W {
1724 self.bit(false)
1725 }
1726 #[doc = r"Writes raw bits to the field"]
1727 #[inline(always)]
1728 pub fn bit(self, value: bool) -> &'a mut W {
1729 self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
1730 self.w
1731 }
1732}
1733#[doc = "Enables clock to I2C2.\n\nValue on reset: 0"]
1734#[derive(Clone, Copy, Debug, PartialEq)]
1735pub enum I2C2_A {
1736 #[doc = "0: Disable."]
1737 I2C2_0 = 0,
1738 #[doc = "1: Enable."]
1739 I2C2_1 = 1,
1740}
1741impl From<I2C2_A> for bool {
1742 #[inline(always)]
1743 fn from(variant: I2C2_A) -> Self {
1744 variant as u8 != 0
1745 }
1746}
1747#[doc = "Field `I2C2` reader - Enables clock to I2C2."]
1748pub struct I2C2_R(crate::FieldReader<bool, I2C2_A>);
1749impl I2C2_R {
1750 pub(crate) fn new(bits: bool) -> Self {
1751 I2C2_R(crate::FieldReader::new(bits))
1752 }
1753 #[doc = r"Get enumerated values variant"]
1754 #[inline(always)]
1755 pub fn variant(&self) -> I2C2_A {
1756 match self.bits {
1757 false => I2C2_A::I2C2_0,
1758 true => I2C2_A::I2C2_1,
1759 }
1760 }
1761 #[doc = "Checks if the value of the field is `I2C2_0`"]
1762 #[inline(always)]
1763 pub fn is_i2c2_0(&self) -> bool {
1764 **self == I2C2_A::I2C2_0
1765 }
1766 #[doc = "Checks if the value of the field is `I2C2_1`"]
1767 #[inline(always)]
1768 pub fn is_i2c2_1(&self) -> bool {
1769 **self == I2C2_A::I2C2_1
1770 }
1771}
1772impl core::ops::Deref for I2C2_R {
1773 type Target = crate::FieldReader<bool, I2C2_A>;
1774 #[inline(always)]
1775 fn deref(&self) -> &Self::Target {
1776 &self.0
1777 }
1778}
1779#[doc = "Field `I2C2` writer - Enables clock to I2C2."]
1780pub struct I2C2_W<'a> {
1781 w: &'a mut W,
1782}
1783impl<'a> I2C2_W<'a> {
1784 #[doc = r"Writes `variant` to the field"]
1785 #[inline(always)]
1786 pub fn variant(self, variant: I2C2_A) -> &'a mut W {
1787 self.bit(variant.into())
1788 }
1789 #[doc = "Disable."]
1790 #[inline(always)]
1791 pub fn i2c2_0(self) -> &'a mut W {
1792 self.variant(I2C2_A::I2C2_0)
1793 }
1794 #[doc = "Enable."]
1795 #[inline(always)]
1796 pub fn i2c2_1(self) -> &'a mut W {
1797 self.variant(I2C2_A::I2C2_1)
1798 }
1799 #[doc = r"Sets the field bit"]
1800 #[inline(always)]
1801 pub fn set_bit(self) -> &'a mut W {
1802 self.bit(true)
1803 }
1804 #[doc = r"Clears the field bit"]
1805 #[inline(always)]
1806 pub fn clear_bit(self) -> &'a mut W {
1807 self.bit(false)
1808 }
1809 #[doc = r"Writes raw bits to the field"]
1810 #[inline(always)]
1811 pub fn bit(self, value: bool) -> &'a mut W {
1812 self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
1813 self.w
1814 }
1815}
1816#[doc = "Enables clock to I2C3.\n\nValue on reset: 0"]
1817#[derive(Clone, Copy, Debug, PartialEq)]
1818pub enum I2C3_A {
1819 #[doc = "0: Disable."]
1820 I2C3_0 = 0,
1821 #[doc = "1: Enable."]
1822 I2C3_1 = 1,
1823}
1824impl From<I2C3_A> for bool {
1825 #[inline(always)]
1826 fn from(variant: I2C3_A) -> Self {
1827 variant as u8 != 0
1828 }
1829}
1830#[doc = "Field `I2C3` reader - Enables clock to I2C3."]
1831pub struct I2C3_R(crate::FieldReader<bool, I2C3_A>);
1832impl I2C3_R {
1833 pub(crate) fn new(bits: bool) -> Self {
1834 I2C3_R(crate::FieldReader::new(bits))
1835 }
1836 #[doc = r"Get enumerated values variant"]
1837 #[inline(always)]
1838 pub fn variant(&self) -> I2C3_A {
1839 match self.bits {
1840 false => I2C3_A::I2C3_0,
1841 true => I2C3_A::I2C3_1,
1842 }
1843 }
1844 #[doc = "Checks if the value of the field is `I2C3_0`"]
1845 #[inline(always)]
1846 pub fn is_i2c3_0(&self) -> bool {
1847 **self == I2C3_A::I2C3_0
1848 }
1849 #[doc = "Checks if the value of the field is `I2C3_1`"]
1850 #[inline(always)]
1851 pub fn is_i2c3_1(&self) -> bool {
1852 **self == I2C3_A::I2C3_1
1853 }
1854}
1855impl core::ops::Deref for I2C3_R {
1856 type Target = crate::FieldReader<bool, I2C3_A>;
1857 #[inline(always)]
1858 fn deref(&self) -> &Self::Target {
1859 &self.0
1860 }
1861}
1862#[doc = "Field `I2C3` writer - Enables clock to I2C3."]
1863pub struct I2C3_W<'a> {
1864 w: &'a mut W,
1865}
1866impl<'a> I2C3_W<'a> {
1867 #[doc = r"Writes `variant` to the field"]
1868 #[inline(always)]
1869 pub fn variant(self, variant: I2C3_A) -> &'a mut W {
1870 self.bit(variant.into())
1871 }
1872 #[doc = "Disable."]
1873 #[inline(always)]
1874 pub fn i2c3_0(self) -> &'a mut W {
1875 self.variant(I2C3_A::I2C3_0)
1876 }
1877 #[doc = "Enable."]
1878 #[inline(always)]
1879 pub fn i2c3_1(self) -> &'a mut W {
1880 self.variant(I2C3_A::I2C3_1)
1881 }
1882 #[doc = r"Sets the field bit"]
1883 #[inline(always)]
1884 pub fn set_bit(self) -> &'a mut W {
1885 self.bit(true)
1886 }
1887 #[doc = r"Clears the field bit"]
1888 #[inline(always)]
1889 pub fn clear_bit(self) -> &'a mut W {
1890 self.bit(false)
1891 }
1892 #[doc = r"Writes raw bits to the field"]
1893 #[inline(always)]
1894 pub fn bit(self, value: bool) -> &'a mut W {
1895 self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
1896 self.w
1897 }
1898}
1899#[doc = "Enables clock to ADC.\n\nValue on reset: 0"]
1900#[derive(Clone, Copy, Debug, PartialEq)]
1901pub enum ADC_A {
1902 #[doc = "0: Disable."]
1903 ADC_0 = 0,
1904 #[doc = "1: Enable."]
1905 ADC_1 = 1,
1906}
1907impl From<ADC_A> for bool {
1908 #[inline(always)]
1909 fn from(variant: ADC_A) -> Self {
1910 variant as u8 != 0
1911 }
1912}
1913#[doc = "Field `ADC` reader - Enables clock to ADC."]
1914pub struct ADC_R(crate::FieldReader<bool, ADC_A>);
1915impl ADC_R {
1916 pub(crate) fn new(bits: bool) -> Self {
1917 ADC_R(crate::FieldReader::new(bits))
1918 }
1919 #[doc = r"Get enumerated values variant"]
1920 #[inline(always)]
1921 pub fn variant(&self) -> ADC_A {
1922 match self.bits {
1923 false => ADC_A::ADC_0,
1924 true => ADC_A::ADC_1,
1925 }
1926 }
1927 #[doc = "Checks if the value of the field is `ADC_0`"]
1928 #[inline(always)]
1929 pub fn is_adc_0(&self) -> bool {
1930 **self == ADC_A::ADC_0
1931 }
1932 #[doc = "Checks if the value of the field is `ADC_1`"]
1933 #[inline(always)]
1934 pub fn is_adc_1(&self) -> bool {
1935 **self == ADC_A::ADC_1
1936 }
1937}
1938impl core::ops::Deref for ADC_R {
1939 type Target = crate::FieldReader<bool, ADC_A>;
1940 #[inline(always)]
1941 fn deref(&self) -> &Self::Target {
1942 &self.0
1943 }
1944}
1945#[doc = "Field `ADC` writer - Enables clock to ADC."]
1946pub struct ADC_W<'a> {
1947 w: &'a mut W,
1948}
1949impl<'a> ADC_W<'a> {
1950 #[doc = r"Writes `variant` to the field"]
1951 #[inline(always)]
1952 pub fn variant(self, variant: ADC_A) -> &'a mut W {
1953 self.bit(variant.into())
1954 }
1955 #[doc = "Disable."]
1956 #[inline(always)]
1957 pub fn adc_0(self) -> &'a mut W {
1958 self.variant(ADC_A::ADC_0)
1959 }
1960 #[doc = "Enable."]
1961 #[inline(always)]
1962 pub fn adc_1(self) -> &'a mut W {
1963 self.variant(ADC_A::ADC_1)
1964 }
1965 #[doc = r"Sets the field bit"]
1966 #[inline(always)]
1967 pub fn set_bit(self) -> &'a mut W {
1968 self.bit(true)
1969 }
1970 #[doc = r"Clears the field bit"]
1971 #[inline(always)]
1972 pub fn clear_bit(self) -> &'a mut W {
1973 self.bit(false)
1974 }
1975 #[doc = r"Writes raw bits to the field"]
1976 #[inline(always)]
1977 pub fn bit(self, value: bool) -> &'a mut W {
1978 self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
1979 self.w
1980 }
1981}
1982#[doc = "Enables clock to micro-trace buffer control registers.Turn on this clock when using the micro-trace buffer for debug purposes.\n\nValue on reset: 0"]
1983#[derive(Clone, Copy, Debug, PartialEq)]
1984pub enum MTB_A {
1985 #[doc = "0: Disable."]
1986 MTB_0 = 0,
1987 #[doc = "1: Enable."]
1988 MTB_1 = 1,
1989}
1990impl From<MTB_A> for bool {
1991 #[inline(always)]
1992 fn from(variant: MTB_A) -> Self {
1993 variant as u8 != 0
1994 }
1995}
1996#[doc = "Field `MTB` reader - Enables clock to micro-trace buffer control registers.Turn on this clock when using the micro-trace buffer for debug purposes."]
1997pub struct MTB_R(crate::FieldReader<bool, MTB_A>);
1998impl MTB_R {
1999 pub(crate) fn new(bits: bool) -> Self {
2000 MTB_R(crate::FieldReader::new(bits))
2001 }
2002 #[doc = r"Get enumerated values variant"]
2003 #[inline(always)]
2004 pub fn variant(&self) -> MTB_A {
2005 match self.bits {
2006 false => MTB_A::MTB_0,
2007 true => MTB_A::MTB_1,
2008 }
2009 }
2010 #[doc = "Checks if the value of the field is `MTB_0`"]
2011 #[inline(always)]
2012 pub fn is_mtb_0(&self) -> bool {
2013 **self == MTB_A::MTB_0
2014 }
2015 #[doc = "Checks if the value of the field is `MTB_1`"]
2016 #[inline(always)]
2017 pub fn is_mtb_1(&self) -> bool {
2018 **self == MTB_A::MTB_1
2019 }
2020}
2021impl core::ops::Deref for MTB_R {
2022 type Target = crate::FieldReader<bool, MTB_A>;
2023 #[inline(always)]
2024 fn deref(&self) -> &Self::Target {
2025 &self.0
2026 }
2027}
2028#[doc = "Field `MTB` writer - Enables clock to micro-trace buffer control registers.Turn on this clock when using the micro-trace buffer for debug purposes."]
2029pub struct MTB_W<'a> {
2030 w: &'a mut W,
2031}
2032impl<'a> MTB_W<'a> {
2033 #[doc = r"Writes `variant` to the field"]
2034 #[inline(always)]
2035 pub fn variant(self, variant: MTB_A) -> &'a mut W {
2036 self.bit(variant.into())
2037 }
2038 #[doc = "Disable."]
2039 #[inline(always)]
2040 pub fn mtb_0(self) -> &'a mut W {
2041 self.variant(MTB_A::MTB_0)
2042 }
2043 #[doc = "Enable."]
2044 #[inline(always)]
2045 pub fn mtb_1(self) -> &'a mut W {
2046 self.variant(MTB_A::MTB_1)
2047 }
2048 #[doc = r"Sets the field bit"]
2049 #[inline(always)]
2050 pub fn set_bit(self) -> &'a mut W {
2051 self.bit(true)
2052 }
2053 #[doc = r"Clears the field bit"]
2054 #[inline(always)]
2055 pub fn clear_bit(self) -> &'a mut W {
2056 self.bit(false)
2057 }
2058 #[doc = r"Writes raw bits to the field"]
2059 #[inline(always)]
2060 pub fn bit(self, value: bool) -> &'a mut W {
2061 self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
2062 self.w
2063 }
2064}
2065#[doc = "Enables clock to DMA.\n\nValue on reset: 0"]
2066#[derive(Clone, Copy, Debug, PartialEq)]
2067pub enum DMA_A {
2068 #[doc = "0: Disable."]
2069 DMA_0 = 0,
2070 #[doc = "1: Enable."]
2071 DMA_1 = 1,
2072}
2073impl From<DMA_A> for bool {
2074 #[inline(always)]
2075 fn from(variant: DMA_A) -> Self {
2076 variant as u8 != 0
2077 }
2078}
2079#[doc = "Field `DMA` reader - Enables clock to DMA."]
2080pub struct DMA_R(crate::FieldReader<bool, DMA_A>);
2081impl DMA_R {
2082 pub(crate) fn new(bits: bool) -> Self {
2083 DMA_R(crate::FieldReader::new(bits))
2084 }
2085 #[doc = r"Get enumerated values variant"]
2086 #[inline(always)]
2087 pub fn variant(&self) -> DMA_A {
2088 match self.bits {
2089 false => DMA_A::DMA_0,
2090 true => DMA_A::DMA_1,
2091 }
2092 }
2093 #[doc = "Checks if the value of the field is `DMA_0`"]
2094 #[inline(always)]
2095 pub fn is_dma_0(&self) -> bool {
2096 **self == DMA_A::DMA_0
2097 }
2098 #[doc = "Checks if the value of the field is `DMA_1`"]
2099 #[inline(always)]
2100 pub fn is_dma_1(&self) -> bool {
2101 **self == DMA_A::DMA_1
2102 }
2103}
2104impl core::ops::Deref for DMA_R {
2105 type Target = crate::FieldReader<bool, DMA_A>;
2106 #[inline(always)]
2107 fn deref(&self) -> &Self::Target {
2108 &self.0
2109 }
2110}
2111#[doc = "Field `DMA` writer - Enables clock to DMA."]
2112pub struct DMA_W<'a> {
2113 w: &'a mut W,
2114}
2115impl<'a> DMA_W<'a> {
2116 #[doc = r"Writes `variant` to the field"]
2117 #[inline(always)]
2118 pub fn variant(self, variant: DMA_A) -> &'a mut W {
2119 self.bit(variant.into())
2120 }
2121 #[doc = "Disable."]
2122 #[inline(always)]
2123 pub fn dma_0(self) -> &'a mut W {
2124 self.variant(DMA_A::DMA_0)
2125 }
2126 #[doc = "Enable."]
2127 #[inline(always)]
2128 pub fn dma_1(self) -> &'a mut W {
2129 self.variant(DMA_A::DMA_1)
2130 }
2131 #[doc = r"Sets the field bit"]
2132 #[inline(always)]
2133 pub fn set_bit(self) -> &'a mut W {
2134 self.bit(true)
2135 }
2136 #[doc = r"Clears the field bit"]
2137 #[inline(always)]
2138 pub fn clear_bit(self) -> &'a mut W {
2139 self.bit(false)
2140 }
2141 #[doc = r"Writes raw bits to the field"]
2142 #[inline(always)]
2143 pub fn bit(self, value: bool) -> &'a mut W {
2144 self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
2145 self.w
2146 }
2147}
2148impl R {
2149 #[doc = "Bit 0 - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
2150 #[inline(always)]
2151 pub fn sys(&self) -> SYS_R {
2152 SYS_R::new((self.bits & 0x01) != 0)
2153 }
2154 #[doc = "Bit 1 - Enables clock for ROM."]
2155 #[inline(always)]
2156 pub fn rom(&self) -> ROM_R {
2157 ROM_R::new(((self.bits >> 1) & 0x01) != 0)
2158 }
2159 #[doc = "Bit 2 - Enables clock for SRAM0 and SRAM1."]
2160 #[inline(always)]
2161 pub fn ram0_1(&self) -> RAM0_1_R {
2162 RAM0_1_R::new(((self.bits >> 2) & 0x01) != 0)
2163 }
2164 #[doc = "Bit 3 - Enables clock for flash register interface."]
2165 #[inline(always)]
2166 pub fn flashreg(&self) -> FLASHREG_R {
2167 FLASHREG_R::new(((self.bits >> 3) & 0x01) != 0)
2168 }
2169 #[doc = "Bit 4 - Enables clock for flash."]
2170 #[inline(always)]
2171 pub fn flash(&self) -> FLASH_R {
2172 FLASH_R::new(((self.bits >> 4) & 0x01) != 0)
2173 }
2174 #[doc = "Bit 5 - Enables clock for I2C0."]
2175 #[inline(always)]
2176 pub fn i2c0(&self) -> I2C0_R {
2177 I2C0_R::new(((self.bits >> 5) & 0x01) != 0)
2178 }
2179 #[doc = "Bit 6 - Enables clock for GPIO port registers and GPIO pin interrupt registers."]
2180 #[inline(always)]
2181 pub fn gpio(&self) -> GPIO_R {
2182 GPIO_R::new(((self.bits >> 6) & 0x01) != 0)
2183 }
2184 #[doc = "Bit 7 - Enables clock for switch matrix."]
2185 #[inline(always)]
2186 pub fn swm(&self) -> SWM_R {
2187 SWM_R::new(((self.bits >> 7) & 0x01) != 0)
2188 }
2189 #[doc = "Bit 8 - Enables clock for state configurable timer SCTimer/PWM."]
2190 #[inline(always)]
2191 pub fn sct(&self) -> SCT_R {
2192 SCT_R::new(((self.bits >> 8) & 0x01) != 0)
2193 }
2194 #[doc = "Bit 9 - Enables clock for self-wake-up timer."]
2195 #[inline(always)]
2196 pub fn wkt(&self) -> WKT_R {
2197 WKT_R::new(((self.bits >> 9) & 0x01) != 0)
2198 }
2199 #[doc = "Bit 10 - Enables clock for multi-rate timer."]
2200 #[inline(always)]
2201 pub fn mrt(&self) -> MRT_R {
2202 MRT_R::new(((self.bits >> 10) & 0x01) != 0)
2203 }
2204 #[doc = "Bit 11 - Enables clock for SPI0."]
2205 #[inline(always)]
2206 pub fn spi0(&self) -> SPI0_R {
2207 SPI0_R::new(((self.bits >> 11) & 0x01) != 0)
2208 }
2209 #[doc = "Bit 12 - Enables clock for SPI1."]
2210 #[inline(always)]
2211 pub fn spi1(&self) -> SPI1_R {
2212 SPI1_R::new(((self.bits >> 12) & 0x01) != 0)
2213 }
2214 #[doc = "Bit 13 - Enables clock for CRC."]
2215 #[inline(always)]
2216 pub fn crc(&self) -> CRC_R {
2217 CRC_R::new(((self.bits >> 13) & 0x01) != 0)
2218 }
2219 #[doc = "Bit 14 - Enables clock for USART0."]
2220 #[inline(always)]
2221 pub fn uart0(&self) -> UART0_R {
2222 UART0_R::new(((self.bits >> 14) & 0x01) != 0)
2223 }
2224 #[doc = "Bit 15 - Enables clock for USART1."]
2225 #[inline(always)]
2226 pub fn uart1(&self) -> UART1_R {
2227 UART1_R::new(((self.bits >> 15) & 0x01) != 0)
2228 }
2229 #[doc = "Bit 16 - Enables clock for USART2."]
2230 #[inline(always)]
2231 pub fn uart2(&self) -> UART2_R {
2232 UART2_R::new(((self.bits >> 16) & 0x01) != 0)
2233 }
2234 #[doc = "Bit 17 - Enables clock for WWDT."]
2235 #[inline(always)]
2236 pub fn wwdt(&self) -> WWDT_R {
2237 WWDT_R::new(((self.bits >> 17) & 0x01) != 0)
2238 }
2239 #[doc = "Bit 18 - Enables clock for IOCON block."]
2240 #[inline(always)]
2241 pub fn iocon(&self) -> IOCON_R {
2242 IOCON_R::new(((self.bits >> 18) & 0x01) != 0)
2243 }
2244 #[doc = "Bit 19 - Enables clock to analog comparator."]
2245 #[inline(always)]
2246 pub fn acmp(&self) -> ACMP_R {
2247 ACMP_R::new(((self.bits >> 19) & 0x01) != 0)
2248 }
2249 #[doc = "Bit 21 - Enables clock to I2C1."]
2250 #[inline(always)]
2251 pub fn i2c1(&self) -> I2C1_R {
2252 I2C1_R::new(((self.bits >> 21) & 0x01) != 0)
2253 }
2254 #[doc = "Bit 22 - Enables clock to I2C2."]
2255 #[inline(always)]
2256 pub fn i2c2(&self) -> I2C2_R {
2257 I2C2_R::new(((self.bits >> 22) & 0x01) != 0)
2258 }
2259 #[doc = "Bit 23 - Enables clock to I2C3."]
2260 #[inline(always)]
2261 pub fn i2c3(&self) -> I2C3_R {
2262 I2C3_R::new(((self.bits >> 23) & 0x01) != 0)
2263 }
2264 #[doc = "Bit 24 - Enables clock to ADC."]
2265 #[inline(always)]
2266 pub fn adc(&self) -> ADC_R {
2267 ADC_R::new(((self.bits >> 24) & 0x01) != 0)
2268 }
2269 #[doc = "Bit 26 - Enables clock to micro-trace buffer control registers.Turn on this clock when using the micro-trace buffer for debug purposes."]
2270 #[inline(always)]
2271 pub fn mtb(&self) -> MTB_R {
2272 MTB_R::new(((self.bits >> 26) & 0x01) != 0)
2273 }
2274 #[doc = "Bit 29 - Enables clock to DMA."]
2275 #[inline(always)]
2276 pub fn dma(&self) -> DMA_R {
2277 DMA_R::new(((self.bits >> 29) & 0x01) != 0)
2278 }
2279}
2280impl W {
2281 #[doc = "Bit 0 - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
2282 #[inline(always)]
2283 pub fn sys(&mut self) -> SYS_W {
2284 SYS_W { w: self }
2285 }
2286 #[doc = "Bit 1 - Enables clock for ROM."]
2287 #[inline(always)]
2288 pub fn rom(&mut self) -> ROM_W {
2289 ROM_W { w: self }
2290 }
2291 #[doc = "Bit 2 - Enables clock for SRAM0 and SRAM1."]
2292 #[inline(always)]
2293 pub fn ram0_1(&mut self) -> RAM0_1_W {
2294 RAM0_1_W { w: self }
2295 }
2296 #[doc = "Bit 3 - Enables clock for flash register interface."]
2297 #[inline(always)]
2298 pub fn flashreg(&mut self) -> FLASHREG_W {
2299 FLASHREG_W { w: self }
2300 }
2301 #[doc = "Bit 4 - Enables clock for flash."]
2302 #[inline(always)]
2303 pub fn flash(&mut self) -> FLASH_W {
2304 FLASH_W { w: self }
2305 }
2306 #[doc = "Bit 5 - Enables clock for I2C0."]
2307 #[inline(always)]
2308 pub fn i2c0(&mut self) -> I2C0_W {
2309 I2C0_W { w: self }
2310 }
2311 #[doc = "Bit 6 - Enables clock for GPIO port registers and GPIO pin interrupt registers."]
2312 #[inline(always)]
2313 pub fn gpio(&mut self) -> GPIO_W {
2314 GPIO_W { w: self }
2315 }
2316 #[doc = "Bit 7 - Enables clock for switch matrix."]
2317 #[inline(always)]
2318 pub fn swm(&mut self) -> SWM_W {
2319 SWM_W { w: self }
2320 }
2321 #[doc = "Bit 8 - Enables clock for state configurable timer SCTimer/PWM."]
2322 #[inline(always)]
2323 pub fn sct(&mut self) -> SCT_W {
2324 SCT_W { w: self }
2325 }
2326 #[doc = "Bit 9 - Enables clock for self-wake-up timer."]
2327 #[inline(always)]
2328 pub fn wkt(&mut self) -> WKT_W {
2329 WKT_W { w: self }
2330 }
2331 #[doc = "Bit 10 - Enables clock for multi-rate timer."]
2332 #[inline(always)]
2333 pub fn mrt(&mut self) -> MRT_W {
2334 MRT_W { w: self }
2335 }
2336 #[doc = "Bit 11 - Enables clock for SPI0."]
2337 #[inline(always)]
2338 pub fn spi0(&mut self) -> SPI0_W {
2339 SPI0_W { w: self }
2340 }
2341 #[doc = "Bit 12 - Enables clock for SPI1."]
2342 #[inline(always)]
2343 pub fn spi1(&mut self) -> SPI1_W {
2344 SPI1_W { w: self }
2345 }
2346 #[doc = "Bit 13 - Enables clock for CRC."]
2347 #[inline(always)]
2348 pub fn crc(&mut self) -> CRC_W {
2349 CRC_W { w: self }
2350 }
2351 #[doc = "Bit 14 - Enables clock for USART0."]
2352 #[inline(always)]
2353 pub fn uart0(&mut self) -> UART0_W {
2354 UART0_W { w: self }
2355 }
2356 #[doc = "Bit 15 - Enables clock for USART1."]
2357 #[inline(always)]
2358 pub fn uart1(&mut self) -> UART1_W {
2359 UART1_W { w: self }
2360 }
2361 #[doc = "Bit 16 - Enables clock for USART2."]
2362 #[inline(always)]
2363 pub fn uart2(&mut self) -> UART2_W {
2364 UART2_W { w: self }
2365 }
2366 #[doc = "Bit 17 - Enables clock for WWDT."]
2367 #[inline(always)]
2368 pub fn wwdt(&mut self) -> WWDT_W {
2369 WWDT_W { w: self }
2370 }
2371 #[doc = "Bit 18 - Enables clock for IOCON block."]
2372 #[inline(always)]
2373 pub fn iocon(&mut self) -> IOCON_W {
2374 IOCON_W { w: self }
2375 }
2376 #[doc = "Bit 19 - Enables clock to analog comparator."]
2377 #[inline(always)]
2378 pub fn acmp(&mut self) -> ACMP_W {
2379 ACMP_W { w: self }
2380 }
2381 #[doc = "Bit 21 - Enables clock to I2C1."]
2382 #[inline(always)]
2383 pub fn i2c1(&mut self) -> I2C1_W {
2384 I2C1_W { w: self }
2385 }
2386 #[doc = "Bit 22 - Enables clock to I2C2."]
2387 #[inline(always)]
2388 pub fn i2c2(&mut self) -> I2C2_W {
2389 I2C2_W { w: self }
2390 }
2391 #[doc = "Bit 23 - Enables clock to I2C3."]
2392 #[inline(always)]
2393 pub fn i2c3(&mut self) -> I2C3_W {
2394 I2C3_W { w: self }
2395 }
2396 #[doc = "Bit 24 - Enables clock to ADC."]
2397 #[inline(always)]
2398 pub fn adc(&mut self) -> ADC_W {
2399 ADC_W { w: self }
2400 }
2401 #[doc = "Bit 26 - Enables clock to micro-trace buffer control registers.Turn on this clock when using the micro-trace buffer for debug purposes."]
2402 #[inline(always)]
2403 pub fn mtb(&mut self) -> MTB_W {
2404 MTB_W { w: self }
2405 }
2406 #[doc = "Bit 29 - Enables clock to DMA."]
2407 #[inline(always)]
2408 pub fn dma(&mut self) -> DMA_W {
2409 DMA_W { w: self }
2410 }
2411 #[doc = "Writes raw bits to the register."]
2412 #[inline(always)]
2413 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
2414 self.0.bits(bits);
2415 self
2416 }
2417}
2418#[doc = "System clock control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysahbclkctrl](index.html) module"]
2419pub struct SYSAHBCLKCTRL_SPEC;
2420impl crate::RegisterSpec for SYSAHBCLKCTRL_SPEC {
2421 type Ux = u32;
2422}
2423#[doc = "`read()` method returns [sysahbclkctrl::R](R) reader structure"]
2424impl crate::Readable for SYSAHBCLKCTRL_SPEC {
2425 type Reader = R;
2426}
2427#[doc = "`write(|w| ..)` method takes [sysahbclkctrl::W](W) writer structure"]
2428impl crate::Writable for SYSAHBCLKCTRL_SPEC {
2429 type Writer = W;
2430}
2431#[doc = "`reset()` method sets SYSAHBCLKCTRL to value 0xdf"]
2432impl crate::Resettable for SYSAHBCLKCTRL_SPEC {
2433 #[inline(always)]
2434 fn reset_value() -> Self::Ux {
2435 0xdf
2436 }
2437}